| @@ -1,14 +1,14 @@ | | | @@ -1,14 +1,14 @@ |
1 | /* $NetBSD: pmc.c,v 1.19 2010/04/27 18:41:52 dyoung Exp $ */ | | 1 | /* $NetBSD: pmc.c,v 1.20 2012/01/30 21:35:22 rmind Exp $ */ |
2 | | | 2 | |
3 | /*- | | 3 | /*- |
4 | * Copyright (c) 2000 Zembu Labs, Inc. | | 4 | * Copyright (c) 2000 Zembu Labs, Inc. |
5 | * All rights reserved. | | 5 | * All rights reserved. |
6 | * | | 6 | * |
7 | * Author: Jason R. Thorpe <thorpej@zembu.com> | | 7 | * Author: Jason R. Thorpe <thorpej@zembu.com> |
8 | * | | 8 | * |
9 | * Redistribution and use in source and binary forms, with or without | | 9 | * Redistribution and use in source and binary forms, with or without |
10 | * modification, are permitted provided that the following conditions | | 10 | * modification, are permitted provided that the following conditions |
11 | * are met: | | 11 | * are met: |
12 | * 1. Redistributions of source code must retain the above copyright | | 12 | * 1. Redistributions of source code must retain the above copyright |
13 | * notice, this list of conditions and the following disclaimer. | | 13 | * notice, this list of conditions and the following disclaimer. |
14 | * 2. Redistributions in binary form must reproduce the above copyright | | 14 | * 2. Redistributions in binary form must reproduce the above copyright |
| @@ -28,27 +28,27 @@ | | | @@ -28,27 +28,27 @@ |
28 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT | | 28 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
29 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, | | 29 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
30 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY | | 30 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
31 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | | 31 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
32 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF | | 32 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
33 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | | 33 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
34 | */ | | 34 | */ |
35 | | | 35 | |
36 | /* | | 36 | /* |
37 | * Interface to x86 CPU Performance Counters. | | 37 | * Interface to x86 CPU Performance Counters. |
38 | */ | | 38 | */ |
39 | | | 39 | |
40 | #include <sys/cdefs.h> | | 40 | #include <sys/cdefs.h> |
41 | __KERNEL_RCSID(0, "$NetBSD: pmc.c,v 1.19 2010/04/27 18:41:52 dyoung Exp $"); | | 41 | __KERNEL_RCSID(0, "$NetBSD: pmc.c,v 1.20 2012/01/30 21:35:22 rmind Exp $"); |
42 | | | 42 | |
43 | #include <sys/param.h> | | 43 | #include <sys/param.h> |
44 | #include <sys/systm.h> | | 44 | #include <sys/systm.h> |
45 | #include <sys/proc.h> | | 45 | #include <sys/proc.h> |
46 | | | 46 | |
47 | #include <machine/cpufunc.h> | | 47 | #include <machine/cpufunc.h> |
48 | #include <machine/cpuvar.h> | | 48 | #include <machine/cpuvar.h> |
49 | #include <machine/specialreg.h> | | 49 | #include <machine/specialreg.h> |
50 | #include <machine/sysarch.h> | | 50 | #include <machine/sysarch.h> |
51 | #include <machine/pmc.h> | | 51 | #include <machine/pmc.h> |
52 | #include <machine/cpu_counter.h> | | 52 | #include <machine/cpu_counter.h> |
53 | #include <machine/cputypes.h> | | 53 | #include <machine/cputypes.h> |
54 | | | 54 | |
| @@ -69,27 +69,27 @@ static int pmc_running; | | | @@ -69,27 +69,27 @@ static int pmc_running; |
69 | static void | | 69 | static void |
70 | pmc_init(void) | | 70 | pmc_init(void) |
71 | { | | 71 | { |
72 | const char *cpu_vendorstr; | | 72 | const char *cpu_vendorstr; |
73 | struct cpu_info *ci; | | 73 | struct cpu_info *ci; |
74 | | | 74 | |
75 | if (pmc_initialized) | | 75 | if (pmc_initialized) |
76 | return; | | 76 | return; |
77 | | | 77 | |
78 | pmc_type = PMC_TYPE_NONE; | | 78 | pmc_type = PMC_TYPE_NONE; |
79 | | | 79 | |
80 | #ifdef MULTIPROCESSOR | | 80 | #ifdef MULTIPROCESSOR |
81 | /* XXX */ | | 81 | /* XXX */ |
82 | if (cpus_attached > 1) | | 82 | if (ncpu > 1) |
83 | goto done; | | 83 | goto done; |
84 | #endif | | 84 | #endif |
85 | | | 85 | |
86 | ci = curcpu(); | | 86 | ci = curcpu(); |
87 | cpu_vendorstr = (char *)ci->ci_vendor; | | 87 | cpu_vendorstr = (char *)ci->ci_vendor; |
88 | | | 88 | |
89 | switch (cpu_class) { | | 89 | switch (cpu_class) { |
90 | case CPUCLASS_586: | | 90 | case CPUCLASS_586: |
91 | if (strncmp(cpu_vendorstr, "GenuineIntel", 12) == 0) { | | 91 | if (strncmp(cpu_vendorstr, "GenuineIntel", 12) == 0) { |
92 | pmc_type = PMC_TYPE_I586; | | 92 | pmc_type = PMC_TYPE_I586; |
93 | pmc_ncounters = 2; | | 93 | pmc_ncounters = 2; |
94 | pmc_state[0].pmcs_ctrmsr = MSR_CTR0; | | 94 | pmc_state[0].pmcs_ctrmsr = MSR_CTR0; |
95 | pmc_state[1].pmcs_ctrmsr = MSR_CTR1; | | 95 | pmc_state[1].pmcs_ctrmsr = MSR_CTR1; |