 @@ -1,14 +1,14 @@
-/*	$NetBSD: pmap.h,v 1.54.26.23 2012/01/19 08:28:48 matt Exp $	*/
+/*	pmap.h,v 1.54.26.23 2012/01/19 08:28:48 matt Exp	*/
 /*
  * Copyright (c) 1992, 1993
  *	The Regents of the University of California.  All rights reserved.
+ *
  * This code is derived from software contributed to Berkeley by
  * Ralph Campbell.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
 @@ -170,27 +170,27 @@ struct pmap_asid_info {
 #define	PMAP_PAI_ASIDVALID_P(pai, ti)	((pai)->pai_asid != 0)
 #define	PMAP_PAI(pmap, ti)		(&(pmap)->pm_pai[tlbinfo_index(ti)])
 #define	PAI_PMAP(pai, ti)	\
 	((pmap_t)((intptr_t)(pai) \
 	    - offsetof(struct pmap, pm_pai[tlbinfo_index(ti)])))
 /*
  * Machine dependent pmap structure.
  */
 typedef struct pmap {
 #ifdef MULTIPROCESSOR
 	volatile uint32_t	pm_active;	/* pmap was active on ... */
 	volatile uint32_t	pm_onproc;	/* pmap is active on ... */
-	volatile u_int		pm_shootdown_pending;
+	volatile uint32_t	pm_shootdown_pending;
 #endif
 	union segtab		*pm_segtab;	/* pointers to pages of PTEs */
 	u_int			pm_count;	/* pmap reference count */
 	u_int			pm_flags;
 #define	PMAP_DEFERRED_ACTIVATE	0x0001
 	struct pmap_statistics	pm_stats;	/* pmap statistics */
 	struct pmap_asid_info	pm_pai[1];
 } *pmap_t;
 enum tlb_invalidate_op {
 	TLBINV_NOBODY=0,
 	TLBINV_ONE=1,
 	TLBINV_ALLUSER=2,
 @@ -244,35 +244,36 @@ extern paddr_t mips_avail_start;
 extern paddr_t mips_avail_end;
 extern vaddr_t mips_virtual_end;
 #define pmap_kernel()		(&kernel_pmap_store.kernel_pmap)
 #define	pmap_wired_count(pmap) 	((pmap)->pm_stats.wired_count)
 #define pmap_resident_count(pmap) ((pmap)->pm_stats.resident_count)
 #define pmap_phys_address(x)	mips_ptob(x)
 /*
  *	Bootstrap the system enough to run with virtual memory.
  */
 void	pmap_bootstrap(void);
 void	pmap_ksegx_bootstrap(void);
 void	pmap_remove_all(pmap_t);
 void	pmap_set_modified(paddr_t);
 void	pmap_procwr(struct proc *, vaddr_t, size_t);
 #define	PMAP_NEED_PROCWR
 #ifdef MULTIPROCESSOR
 void	pmap_tlb_shootdown_process(void);
-bool	pmap_tlb_shootdown_bystanders(pmap_t pmap);
+bool	pmap_tlb_shootdown_bystanders(pmap_t pmap, uint32_t);
 void	pmap_tlb_info_attach(struct pmap_tlb_info *, struct cpu_info *);
 #endif
 void	pmap_syncicache_page(struct vm_page *, uint32_t);
 void	pmap_tlb_info_init(struct pmap_tlb_info *);
 void	pmap_tlb_info_evcnt_attach(struct pmap_tlb_info *);
 void	pmap_tlb_asid_acquire(pmap_t pmap, struct lwp *l);
 void	pmap_tlb_asid_deactivate(pmap_t pmap);
 void	pmap_tlb_asid_check(void);
 void	pmap_tlb_asid_release_all(pmap_t pmap);
 int	pmap_tlb_update_addr(pmap_t pmap, vaddr_t, uint32_t, bool);
 void	pmap_tlb_invalidate_addr(pmap_t pmap, vaddr_t);
 /*

 @@ -433,59 +433,75 @@ pmap_unmap_ephemeral_page(struct vm_page
 	if (va >= VM_MIN_KERNEL_ADDRESS) {
 		pmap_kremove(va, PAGE_SIZE);
 		if (mips_pg_v(old_pt_entry.pt_entry)) {
 			*kvtopte(va) = old_pt_entry;
 			pmap_tlb_update_addr(pmap_kernel(), va,
 			    old_pt_entry.pt_entry, false);
+		}
 		kpreempt_enable();
+	}
 #endif
+}
 #ifdef ENABLE_MIPS_KSEGX
 void
 pmap_ksegx_bootstrap(void)
+{
 	const vaddr_t kva_inc = 1 << ((VM_KSEGX_SHIFT - 1) & ~1);
 	const uint32_t tlb_mask = (2 * kva_inc - 1) & 0x1ffffc00;
 	if (mips_ksegx_tlb_slot < 0) {
 		mips_ksegx_tlb_slot = pmap_tlb0_info.ti_wired;
 		pmap_tlb0_info.ti_wired += VM_KSEGX_SIZE / (2 * kva_inc);
 		mips3_cp0_wired_write(pmap_tlb0_info.ti_wired);
+	}
 	u_int tlb_slot = mips_ksegx_tlb_slot;
 	for (vaddr_t kva = 0;
 	     kva < VM_KSEGX_SIZE;
 	     kva += 2 * kva_inc, tlb_slot++) {
 		extern pt_entry_t mips_ksegx_pte;
 		struct tlbmask tlb = {
 		    .tlb_hi = VM_KSEGX_ADDRESS + kva,
 		    .tlb_lo0 = mips_ksegx_pte.pt_entry
 			+ mips_paddr_to_tlbpfn(kva),
 		    .tlb_lo1 = mips_ksegx_pte.pt_entry
 			+ mips_paddr_to_tlbpfn(kva + kva_inc),
 		    .tlb_mask = tlb_mask,
 		};
 		tlb_write_indexed(tlb_slot, &tlb);
+	}
+}
 #endif
 /*
  *	Bootstrap the system enough to run with virtual memory.
  *	firstaddr is the first unused kseg0 address (not page aligned).
  */
 void
 pmap_bootstrap(void)
+{
 	vsize_t bufsz;
 	if (MIPS_CACHE_VIRTUAL_ALIAS && uvmexp.ncolors)
 		pmap_page_colormask = (uvmexp.ncolors - 1) << PAGE_SHIFT;
 	KASSERT(uvmexp.ncolors <= 16 - PG_MD_EXECPAGE_SHIFT);
 	pmap_tlb_info_init(&pmap_tlb0_info);		/* init the lock */
 #ifdef ENABLE_MIPS_KSEGX
-	const vaddr_t kva_inc = 1 << ((VM_KSEGX_SHIFT - 1) & ~1);
+	pmap_ksegx_bootstrap();
 	const uint32_t tlb_mask = (2 * kva_inc - 1) & 0x1ffffc00;
 	for (vaddr_t kva = 0; kva < VM_KSEGX_SIZE; kva += 2 * kva_inc) {
 		extern pt_entry_t mips_ksegx_pte;
 		struct tlbmask tlb = {
 		    .tlb_hi = VM_KSEGX_ADDRESS + kva,
 		    .tlb_lo0 = mips_ksegx_pte.pt_entry
 			+ mips_paddr_to_tlbpfn(kva),
 		    .tlb_lo1 = mips_ksegx_pte.pt_entry
 			+ mips_paddr_to_tlbpfn(kva + kva_inc),
 		    .tlb_mask = tlb_mask,
 		};
 		tlb_write_indexed(pmap_tlb0_info.ti_wired, &tlb);
 		pmap_tlb0_info.ti_wired++;
 	mips3_cp0_wired_write(pmap_tlb0_info.ti_wired);
 #endif
 	/*
 	 * Compute the number of pages kmem_map will have.
 	 */
 	kmeminit_nkmempages();
 	/*
 	 * Figure out how many PTE's are necessary to map the kernel.
 	 * We also reserve space for kmem_alloc_pageable() for vm_fork().
 	 */
 	/* Get size of buffer cache and set an upper limit */
 @@ -908,27 +924,27 @@ pmap_deactivate(struct lwp *l)
 #endif
 	pmap_tlb_asid_deactivate(l->l_proc->p_vmspace->vm_map.pmap);
 	kpreempt_enable();
+}
 void
 pmap_update(struct pmap *pm)
+{
 	PMAP_COUNT(update);
 	kpreempt_disable();
 #ifdef MULTIPROCESSOR
 	u_int pending = atomic_swap_uint(&pm->pm_shootdown_pending, 0);
-	if (pending && pmap_tlb_shootdown_bystanders(pm))
+	if (pending && pmap_tlb_shootdown_bystanders(pm, pending))
 		PMAP_COUNT(shootdown_ipis);
 #endif
 	/*
 	 * If pmap_remove_all was called, we deactivated ourselves and nuked
 	 * our ASID.  Now we have to reactivate ourselves.
 	 */
 	if (__predict_false(pm->pm_flags & PMAP_DEFERRED_ACTIVATE)) {
 		pm->pm_flags ^= PMAP_DEFERRED_ACTIVATE;
 		pmap_tlb_asid_acquire(pm, curlwp);
 		pmap_segtab_activate(pm, curlwp);
+	}
 	kpreempt_enable();
+}

 @@ -1,14 +1,14 @@
-/*	$NetBSD: pmap_tlb.c,v 1.1.2.22 2012/01/19 08:28:50 matt Exp $	*/
+/*	pmap_tlb.c,v 1.1.2.22 2012/01/19 08:28:50 matt Exp	*/
 /*-
  * Copyright (c) 2010 The NetBSD Foundation, Inc.
  * All rights reserved.
+ *
  * This code is derived from software contributed to The NetBSD Foundation
  * by Matt Thomas at 3am Software Foundry.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
 @@ -21,27 +21,27 @@
  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pmap_tlb.c,v 1.1.2.22 2012/01/19 08:28:50 matt Exp $");
+__KERNEL_RCSID(0, "pmap_tlb.c,v 1.1.2.22 2012/01/19 08:28:50 matt Exp");
 /*
  * Manages address spaces in a TLB.
+ *
  * Normally there is a 1:1 mapping between a TLB and a CPU.  However, some
  * implementations may share a TLB between multiple CPUs (really CPU thread
  * contexts).  This requires the TLB abstraction to be separated from the
  * CPU abstraction.  It also requires that the TLB be locked while doing
  * TLB activities.
+ *
  * For each TLB, we track the ASIDs in use in a bitmap and a list of pmaps
  * that have a valid ASID.
+ *
 @@ -211,26 +211,29 @@ pmap_pai_reset(struct pmap_tlb_info *ti,
 #ifdef MULTIPROCESSOR
 	/*
 	 * The bits in pm_active belonging to this TLB can only be changed
 	 * while this TLB's lock is held.
 	 */
 	atomic_and_32(&pm->pm_active, ~ti->ti_cpu_mask);
 #endif /* MULTIPROCESSOR */
+}
 void
 pmap_tlb_info_evcnt_attach(struct pmap_tlb_info *ti)
+{
 	KDASSERT(ti->ti_name[0] == 't');
 	KDASSERT(ti->ti_name[1] == 'l');
 	KDASSERT(ti->ti_name[2] == 'b');
 	evcnt_attach_dynamic(&ti->ti_evcnt_asid_reinits,
 	    EVCNT_TYPE_MISC, NULL,
 	    ti->ti_name, "asid pool reinit");
 	evcnt_attach_dynamic(&ti->ti_evcnt_asid_reclaims,
 	    EVCNT_TYPE_MISC, NULL,
 	    ti->ti_name, "asid pool reclaims");
+}
 void
 pmap_tlb_info_init(struct pmap_tlb_info *ti)
+{
 	const struct mips_options * const opts = &mips_options;
 #ifdef MULTIPROCESSOR
 @@ -280,37 +283,44 @@ pmap_tlb_info_init(struct pmap_tlb_info
 	ti->ti_cpu_mask = 0;
 	ti->ti_index = pmap_ntlbs++;
 	snprintf(ti->ti_name, sizeof(ti->ti_name), "tlb%u", ti->ti_index);
 	KASSERT(ti != &pmap_tlb0_info);
 	pmap_tlb_info_evcnt_attach(ti);
 	/*
 	 * If we are reserving a tlb slot for mapping cpu_info,
 	 * allocate it now.
 	 */
 	ti->ti_wired = (cpu_info_store.ci_tlb_slot >= 0);
 	pmap_tlbs[ti->ti_index] = ti;
 	KDASSERT(ti->ti_name[0] == 't');
 	KDASSERT(ti->ti_name[1] == 'l');
 	KDASSERT(ti->ti_name[2] == 'b');
 #endif /* MULTIPROCESSOR */
+}
 #ifdef MULTIPROCESSOR
 void
 pmap_tlb_info_attach(struct pmap_tlb_info *ti, struct cpu_info *ci)
+{
 	KASSERT(!CPU_IS_PRIMARY(ci));
 	KASSERT(ci->ci_data.cpu_idlelwp != NULL);
 	KASSERT(cold);
 	KDASSERT(ti->ti_name[0] == 't');
 	KDASSERT(ti->ti_name[1] == 'l');
 	KDASSERT(ti->ti_name[2] == 'b');
 	TLBINFO_LOCK(ti);
 	uint32_t cpu_mask = 1 << cpu_index(ci);
 	ti->ti_cpu_mask |= cpu_mask;
 	ci->ci_tlb_info = ti;
 	ci->ci_ksp_tlb_slot = ti->ti_wired++;
 	/*
 	 * If we need a tlb slot for mapping cpu_info, use 0.  If we don't
 	 * need one then ci_tlb_slot will be -1, and so will ci->ci_tlb_slot
 	 */
 	ci->ci_tlb_slot = -(cpu_info_store.ci_tlb_slot < 0);
 	/*
 	 * Mark the kernel as active and "onproc" for this cpu.  We assume
 	 * we are the only CPU running so atomic ops are not needed.
 @@ -426,30 +436,36 @@ pmap_tlb_asid_reinitialize(struct pmap_t
 #endif
+}
 #ifdef MULTIPROCESSOR
 void
 pmap_tlb_shootdown_process(void)
+{
 	struct cpu_info * const ci = curcpu();
 	struct pmap_tlb_info * const ti = ci->ci_tlb_info;
 #ifdef DIAGNOSTIC
 	struct pmap * const curpmap = curlwp->l_proc->p_vmspace->vm_map.pmap;
 #endif
 	KDASSERT(ti->ti_name[0] == 't');
 	KDASSERT(ti->ti_name[1] == 'l');
 	KDASSERT(ti->ti_name[2] == 'b');
 #if 0
 	KASSERT(cpu_intr_p());
 	KASSERTMSG(ci->ci_cpl >= IPL_SCHED,
 	    ("%s: cpl (%d) < IPL_SCHED (%d)",
 	    __func__, ci->ci_cpl, IPL_SCHED));
 #endif
 	TLBINFO_LOCK(ti);
 	switch (ti->ti_tlbinvop) {
 	case TLBINV_ONE: {
 		/*
 		 * We only need to invalidate one user ASID.
 		 */
 		struct pmap_asid_info * const pai = PMAP_PAI(ti->ti_victim, ti);
 		KASSERT(ti->ti_victim != pmap_kernel());
 		if (ti->ti_victim->pm_onproc & ti->ti_cpu_mask) {
 			/*
 			 * The victim is an active pmap so we will just
 			 * invalidate its TLB entries.
 @@ -516,151 +532,189 @@ pmap_tlb_shootdown_process(void)
 	 | (      (one) << 3*TLBINV_ONE)			\
 	 | (  (alluser) << 3*TLBINV_ALLUSER)			\
 	 | ((allkernel) << 3*TLBINV_ALLKERNEL)			\
 	 | (      (all) << 3*TLBINV_ALL)) >> 3*(op)) & 7)
 #define	TLBINV_USER_MAP(op)	\
 	TLBINV_MAP(op, TLBINV_ONE, TLBINV_ALLUSER, TLBINV_ALLUSER,	\
 	    TLBINV_ALL, TLBINV_ALL)
 #define	TLBINV_KERNEL_MAP(op)	\
 	TLBINV_MAP(op, TLBINV_ALLKERNEL, TLBINV_ALL, TLBINV_ALL,	\
 	    TLBINV_ALLKERNEL, TLBINV_ALL)
-bool
+static struct cpu_info *
-pmap_tlb_shootdown_bystanders(pmap_t pm)
+pmap_tlb_target_bystander(struct pmap_tlb_info *ti, struct pmap *pm,
 	bool kernel_p)
+{
 	struct pmap_asid_info * const pai = PMAP_PAI(pm, ti);
 	TLBINFO_LOCK(ti);
 	const uint32_t onproc = (pm->pm_onproc & ti->ti_cpu_mask);
 	if (onproc == 0) {
 		if (pm->pm_active & ti->ti_cpu_mask) {
 			/*
 			 * If this pmap has an ASID assigned but it's not
 			 * currently running, nuke its ASID.  Next time the
 			 * pmap is activated, it will allocate a new ASID.
 			 * And best of all, we avoid an IPI.
 			 */
 			KASSERT(!kernel_p);
 			pmap_pai_reset(ti, pai, pm);
 			//ti->ti_evcnt_lazy_shots.ev_count++;
+		}
 		TLBINFO_UNLOCK(ti);
 		return NULL;
+	}
 	if (kernel_p) {
 		ti->ti_tlbinvop = TLBINV_KERNEL_MAP(ti->ti_tlbinvop);
 		ti->ti_victim = NULL;
 	} else {
 		KASSERT(pai->pai_asid);
 		if (__predict_false(ti->ti_victim == pm)) {
 			KASSERT(ti->ti_tlbinvop == TLBINV_ONE);
 			/*
 			 * We still need to invalidate this one
 			 * ASID so there's nothing to change.
 			 */
 		} else {
 			ti->ti_tlbinvop = TLBINV_USER_MAP(ti->ti_tlbinvop);
 			if (ti->ti_tlbinvop == TLBINV_ONE)
 				ti->ti_victim = pm;
 			else
 				ti->ti_victim = NULL;
+		}
+	}
 	TLBINFO_UNLOCK(ti);
 	/*
-	 * We don't need to deal our own TLB.
+	 * Return a pointer to the cpu_info of one of the tlb_info's cpus
 	 */
-	uint32_t pm_active = pm->pm_active & ~curcpu()->ci_tlb_info->ti_cpu_mask;
+	const u_int j = ffs(onproc) - 1;
 	return cpu_lookup(j);
+}
 bool
 pmap_tlb_shootdown_bystanders(pmap_t pm, uint32_t pending)
+{
 	struct cpu_info * const ci = curcpu();
 	struct pmap_tlb_info * const curti = ci->ci_tlb_info;
 	uint32_t pm_active = pm->pm_active & ~curti->ti_cpu_mask;
 	const bool kernel_p = (pm == pmap_kernel());
 	bool ipi_sent = false;
 	KDASSERT(curti->ti_name[0] == 't');
 	KDASSERT(curti->ti_name[1] == 'l');
 	KDASSERT(curti->ti_name[2] == 'b');
 	if (__predict_false(pending & ~curti->ti_cpu_mask) != 0) {
 		/*
 		 * Now if another cpu (not sharing this tlb_info) wants a
 		 * shootdown, then they must mean us since this pmap is
 		 * obviously active.  But since we cleared their bit, they
 		 * won't know they need to do it.  So we do it ourselves
 		 * and save them from sending an IPI.
 		 */
 		if (pmap_tlb_target_bystander(curti, pm, kernel_p) != NULL)
 			pmap_tlb_shootdown_process();
+	}
 	/*
 	 * If pm_active gets more bits set, then it's after all our changes
 	 * have been made so they will already be cognizant of them.
 	 */
 	for (size_t i = 0; pm_active != 0; i++) {
 		KASSERT(i < pmap_ntlbs);
 		struct pmap_tlb_info * const ti = pmap_tlbs[i];
 		KASSERT(tlbinfo_index(ti) == i);
 		/*
 		 * Skip this TLB if there are no active mappings for it.
 		 */
-		if ((pm_active & ti->ti_cpu_mask) == 0)
+		if ((pm_active & ti->ti_cpu_mask) == 0) {
 			continue;
 		struct pmap_asid_info * const pai = PMAP_PAI(pm, ti);
 		pm_active &= ~ti->ti_cpu_mask;
-		TLBINFO_LOCK(ti);
+		struct cpu_info * const ipi_ci =
-		const uint32_t onproc = (pm->pm_onproc & ti->ti_cpu_mask);
+		    pmap_tlb_target_bystander(ti, pm, kernel_p);
-		if (onproc != 0) {
+		if (ipi_ci != NULL) {
 			if (kernel_p) {
 				ti->ti_tlbinvop =
 				    TLBINV_KERNEL_MAP(ti->ti_tlbinvop);
 				ti->ti_victim = NULL;
 			} else {
 				KASSERT(pai->pai_asid);
 				if (__predict_false(ti->ti_victim == pm)) {
 					KASSERT(ti->ti_tlbinvop == TLBINV_ONE);
 					/*
 					 * We still need to invalidate this one
 					 * ASID so there's nothing to change.
 					 */
 				} else {
 					ti->ti_tlbinvop =
 					    TLBINV_USER_MAP(ti->ti_tlbinvop);
 					if (ti->ti_tlbinvop == TLBINV_ONE)
 						ti->ti_victim = pm;
 					else
 						ti->ti_victim = NULL;
 			TLBINFO_UNLOCK(ti);
 			/*
 			 * Now we can send out the shootdown IPIs to a CPU
 			 * that shares this TLB and is currently using this
 			 * pmap.  That CPU will process the IPI and do the
 			 * all the work.  Any other CPUs sharing that TLB
 			 * will take advantage of that work.  pm_onproc might
 			 * change now that we have released the lock but we
 			 * can tolerate spurious shootdowns.
 			 */
-			KASSERT(onproc != 0);
+			cpu_send_ipi(ipi_ci, IPI_SHOOTDOWN);
 			u_int j = ffs(onproc) - 1;
 			cpu_send_ipi(cpu_lookup(j), IPI_SHOOTDOWN);
 			ipi_sent = true;
 			continue;
 		if (pm->pm_active & ti->ti_cpu_mask) {
 			/*
 			 * If this pmap has an ASID assigned but it's not
 			 * currently running, nuke its ASID.  Next time the
 			 * pmap is activated, it will allocate a new ASID.
 			 * And best of all, we avoid an IPI.
 			 */
 			KASSERT(!kernel_p);
 			pmap_pai_reset(ti, pai, pm);
 			//ti->ti_evcnt_lazy_shots.ev_count++;
+		}
 		TLBINFO_UNLOCK(ti);
+	}
 	return ipi_sent;
+}
 #endif /* MULTIPROCESSOR */
 int
 pmap_tlb_update_addr(pmap_t pm, vaddr_t va, uint32_t pt_entry, bool need_ipi)
+{
 	struct pmap_tlb_info * const ti = curcpu()->ci_tlb_info;
 	struct pmap_asid_info * const pai = PMAP_PAI(pm, ti);
 	int rv = -1;
 	KDASSERT(ti->ti_name[0] == 't');
 	KDASSERT(ti->ti_name[1] == 'l');
 	KDASSERT(ti->ti_name[2] == 'b');
 	KASSERT(kpreempt_disabled());
 	TLBINFO_LOCK(ti);
 	if (pm == pmap_kernel() || PMAP_PAI_ASIDVALID_P(pai, ti)) {
 		va |= pai->pai_asid << MIPS_TLB_PID_SHIFT;
 		pmap_tlb_asid_check();
 		rv = tlb_update(va, pt_entry);
 		pmap_tlb_asid_check();
+	}
 #ifdef MULTIPROCESSOR
-	atomic_or_uint(&pm->pm_shootdown_pending, need_ipi);
+	if (need_ipi && (pm->pm_active & ~ti->ti_cpu_mask) != 0) {
 		atomic_or_uint(&pm->pm_shootdown_pending, 1 << cpu_number());
+	}
 #endif
 	TLBINFO_UNLOCK(ti);
 	return rv;
+}
 void
 pmap_tlb_invalidate_addr(pmap_t pm, vaddr_t va)
+{
 	struct pmap_tlb_info * const ti = curcpu()->ci_tlb_info;
 	struct pmap_asid_info * const pai = PMAP_PAI(pm, ti);
 	KDASSERT(ti->ti_name[0] == 't');
 	KDASSERT(ti->ti_name[1] == 'l');
 	KDASSERT(ti->ti_name[2] == 'b');
 	KASSERT(kpreempt_disabled());
 	TLBINFO_LOCK(ti);
 	if (pm == pmap_kernel() || PMAP_PAI_ASIDVALID_P(pai, ti)) {
 		va |= pai->pai_asid << MIPS_TLB_PID_SHIFT;
 		pmap_tlb_asid_check();
 		tlb_invalidate_addr(va);
 		pmap_tlb_asid_check();
+	}
 #ifdef MULTIPROCESSOR
-	(void) atomic_swap_uint(&pm->pm_shootdown_pending, 1);
+	if ((pm->pm_active & ~ti->ti_cpu_mask) != 0) {
 		atomic_or_uint(&pm->pm_shootdown_pending, 1 << cpu_number());
+	}
 #endif
 	TLBINFO_UNLOCK(ti);
+}
 static inline void
 pmap_tlb_asid_alloc(struct pmap_tlb_info *ti, pmap_t pm,
 	struct pmap_asid_info *pai)
+{
 	/*
 	 * We shouldn't have an ASID assigned, and thusly must not be onproc
 	 * nor active.
 	 */
 	KASSERT(pai->pai_asid == 0);
 @@ -727,26 +781,30 @@ pmap_tlb_asid_alloc(struct pmap_tlb_info
+}
 /*
  * Acquire a TLB address space tag (called ASID or TLBPID) and return it.
  * ASID might have already been previously acquired.
  */
 void
 pmap_tlb_asid_acquire(pmap_t pm, struct lwp *l)
+{
 	struct cpu_info * const ci = l->l_cpu;
 	struct pmap_tlb_info * const ti = ci->ci_tlb_info;
 	struct pmap_asid_info * const pai = PMAP_PAI(pm, ti);
 	KDASSERT(ti->ti_name[0] == 't');
 	KDASSERT(ti->ti_name[1] == 'l');
 	KDASSERT(ti->ti_name[2] == 'b');
 	KASSERT(kpreempt_disabled());
 	/*
 	 * Kernels use a fixed ASID of 0 and don't need to acquire one.
 	 */
 	if (pm == pmap_kernel())
 		return;
 	TLBINFO_LOCK(ti);
 	if (__predict_false(!PMAP_PAI_ASIDVALID_P(pai, ti))) {
 		/*
 		 * If we've run out ASIDs, reinitialize the ASID space.
 		 */
 @@ -821,41 +879,48 @@ pmap_tlb_asid_deactivate(pmap_t pm)
 #endif
+}
 void
 pmap_tlb_asid_release_all(struct pmap *pm)
+{
 	KASSERT(pm != pmap_kernel());
 	KASSERT(kpreempt_disabled());
 #ifdef MULTIPROCESSOR
 	KASSERT(pm->pm_onproc == 0);
 	for (u_int i = 0; pm->pm_active != 0; i++) {
 		KASSERT(i < pmap_ntlbs);
 		struct pmap_tlb_info * const ti = pmap_tlbs[i];
 		KDASSERT(ti->ti_name[0] == 't');
 		KDASSERT(ti->ti_name[1] == 'l');
 		KDASSERT(ti->ti_name[2] == 'b');
 		if (pm->pm_active & ti->ti_cpu_mask) {
 			struct pmap_asid_info * const pai = PMAP_PAI(pm, ti);
 			TLBINFO_LOCK(ti);
 			KASSERT(ti->ti_victim != pm);
 			pmap_pai_reset(ti, pai, pm);
 			TLBINFO_UNLOCK(ti);
+		}
+	}
 #else
 	/*
 	 * Handle the case of an UP kernel which only has, at most, one ASID.
 	 * If the pmap has an ASID allocated, free it.
 	 */
 	struct pmap_tlb_info * const ti = curcpu()->ci_tlb_info;
 	struct pmap_asid_info * const pai = PMAP_PAI(pm, ti);
 	KDASSERT(ti->ti_name[0] == 't');
 	KDASSERT(ti->ti_name[1] == 'l');
 	KDASSERT(ti->ti_name[2] == 'b');
 	TLBINFO_LOCK(ti);
 	if (pai->pai_asid) {
 		pmap_pai_reset(ti, pai, pm);
+	}
 	TLBINFO_UNLOCK(ti);
 #endif /* MULTIPROCESSOR */
+}
 void
 pmap_tlb_asid_check(void)
+{
 #ifdef DEBUG
 	kpreempt_disable();