| @@ -1,14 +1,14 @@ | | | @@ -1,14 +1,14 @@ |
1 | /* $NetBSD: pq3etsec.c,v 1.11 2012/04/19 21:32:01 matt Exp $ */ | | 1 | /* $NetBSD: pq3etsec.c,v 1.12 2012/04/20 13:51:48 matt Exp $ */ |
2 | /*- | | 2 | /*- |
3 | * Copyright (c) 2010, 2011 The NetBSD Foundation, Inc. | | 3 | * Copyright (c) 2010, 2011 The NetBSD Foundation, Inc. |
4 | * All rights reserved. | | 4 | * All rights reserved. |
5 | * | | 5 | * |
6 | * This code is derived from software contributed to The NetBSD Foundation | | 6 | * This code is derived from software contributed to The NetBSD Foundation |
7 | * by Raytheon BBN Technologies Corp and Defense Advanced Research Projects | | 7 | * by Raytheon BBN Technologies Corp and Defense Advanced Research Projects |
8 | * Agency and which was developed by Matt Thomas of 3am Software Foundry. | | 8 | * Agency and which was developed by Matt Thomas of 3am Software Foundry. |
9 | * | | 9 | * |
10 | * This material is based upon work supported by the Defense Advanced Research | | 10 | * This material is based upon work supported by the Defense Advanced Research |
11 | * Projects Agency and Space and Naval Warfare Systems Center, Pacific, under | | 11 | * Projects Agency and Space and Naval Warfare Systems Center, Pacific, under |
12 | * Contract No. N66001-09-C-2073. | | 12 | * Contract No. N66001-09-C-2073. |
13 | * Approved for Public Release, Distribution Unlimited | | 13 | * Approved for Public Release, Distribution Unlimited |
14 | * | | 14 | * |
| @@ -28,27 +28,27 @@ | | | @@ -28,27 +28,27 @@ |
28 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR | | 28 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
29 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF | | 29 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
30 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS | | 30 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
31 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN | | 31 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
32 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) | | 32 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
33 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE | | 33 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
34 | * POSSIBILITY OF SUCH DAMAGE. | | 34 | * POSSIBILITY OF SUCH DAMAGE. |
35 | */ | | 35 | */ |
36 | | | 36 | |
37 | #include "opt_inet.h" | | 37 | #include "opt_inet.h" |
38 | | | 38 | |
39 | #include <sys/cdefs.h> | | 39 | #include <sys/cdefs.h> |
40 | | | 40 | |
41 | __KERNEL_RCSID(0, "$NetBSD: pq3etsec.c,v 1.11 2012/04/19 21:32:01 matt Exp $"); | | 41 | __KERNEL_RCSID(0, "$NetBSD: pq3etsec.c,v 1.12 2012/04/20 13:51:48 matt Exp $"); |
42 | | | 42 | |
43 | #include <sys/param.h> | | 43 | #include <sys/param.h> |
44 | #include <sys/cpu.h> | | 44 | #include <sys/cpu.h> |
45 | #include <sys/device.h> | | 45 | #include <sys/device.h> |
46 | #include <sys/mbuf.h> | | 46 | #include <sys/mbuf.h> |
47 | #include <sys/ioctl.h> | | 47 | #include <sys/ioctl.h> |
48 | #include <sys/intr.h> | | 48 | #include <sys/intr.h> |
49 | #include <sys/bus.h> | | 49 | #include <sys/bus.h> |
50 | #include <sys/kernel.h> | | 50 | #include <sys/kernel.h> |
51 | #include <sys/kmem.h> | | 51 | #include <sys/kmem.h> |
52 | #include <sys/proc.h> | | 52 | #include <sys/proc.h> |
53 | #include <sys/atomic.h> | | 53 | #include <sys/atomic.h> |
54 | #include <sys/callout.h> | | 54 | #include <sys/callout.h> |
| @@ -491,26 +491,28 @@ pq3etsec_attach(device_t parent, device_ | | | @@ -491,26 +491,28 @@ pq3etsec_attach(device_t parent, device_ |
491 | &sc->sc_bsh); | | 491 | &sc->sc_bsh); |
492 | if (error) { | | 492 | if (error) { |
493 | aprint_error(": error mapping registers: %d\n", error); | | 493 | aprint_error(": error mapping registers: %d\n", error); |
494 | return; | | 494 | return; |
495 | } | | 495 | } |
496 | | | 496 | |
497 | /* | | 497 | /* |
498 | * Assume firmware has aready set the mac address and fetch it | | 498 | * Assume firmware has aready set the mac address and fetch it |
499 | * before we reinit it. | | 499 | * before we reinit it. |
500 | */ | | 500 | */ |
501 | sc->sc_macstnaddr2 = etsec_read(sc, MACSTNADDR2); | | 501 | sc->sc_macstnaddr2 = etsec_read(sc, MACSTNADDR2); |
502 | sc->sc_macstnaddr1 = etsec_read(sc, MACSTNADDR1); | | 502 | sc->sc_macstnaddr1 = etsec_read(sc, MACSTNADDR1); |
503 | sc->sc_rctrl = RCTRL_DEFAULT; | | 503 | sc->sc_rctrl = RCTRL_DEFAULT; |
| | | 504 | sc->sc_ecntrl = etsec_read(sc, ECNTRL); |
| | | 505 | sc->sc_maccfg1 = etsec_read(sc, MACCFG1); |
504 | sc->sc_maccfg2 = MACCFG2_DEFAULT; | | 506 | sc->sc_maccfg2 = MACCFG2_DEFAULT; |
505 | | | 507 | |
506 | if (sc->sc_macstnaddr1 == 0 && sc->sc_macstnaddr2 == 0) { | | 508 | if (sc->sc_macstnaddr1 == 0 && sc->sc_macstnaddr2 == 0) { |
507 | size_t len; | | 509 | size_t len; |
508 | const uint8_t *mac_addr = | | 510 | const uint8_t *mac_addr = |
509 | board_info_get_data("tsec-mac-addr-base", &len); | | 511 | board_info_get_data("tsec-mac-addr-base", &len); |
510 | KASSERT(len == ETHER_ADDR_LEN); | | 512 | KASSERT(len == ETHER_ADDR_LEN); |
511 | sc->sc_macstnaddr2 = | | 513 | sc->sc_macstnaddr2 = |
512 | (mac_addr[1] << 24) | | 514 | (mac_addr[1] << 24) |
513 | | (mac_addr[0] << 16); | | 515 | | (mac_addr[0] << 16); |
514 | sc->sc_macstnaddr1 = | | 516 | sc->sc_macstnaddr1 = |
515 | ((mac_addr[5] + cnl->cnl_instance - 1) << 24) | | 517 | ((mac_addr[5] + cnl->cnl_instance - 1) << 24) |
516 | | (mac_addr[4] << 16) | | 518 | | (mac_addr[4] << 16) |
| @@ -582,29 +584,26 @@ pq3etsec_attach(device_t parent, device_ | | | @@ -582,29 +584,26 @@ pq3etsec_attach(device_t parent, device_ |
582 | } | | 584 | } |
583 | | | 585 | |
584 | sc->sc_soft_ih = softint_establish(SOFTINT_NET|SOFTINT_MPSAFE, | | 586 | sc->sc_soft_ih = softint_establish(SOFTINT_NET|SOFTINT_MPSAFE, |
585 | pq3etsec_soft_intr, sc); | | 587 | pq3etsec_soft_intr, sc); |
586 | if (sc->sc_soft_ih == NULL) { | | 588 | if (sc->sc_soft_ih == NULL) { |
587 | aprint_error(": failed to establish soft interrupt\n"); | | 589 | aprint_error(": failed to establish soft interrupt\n"); |
588 | return; | | 590 | return; |
589 | } | | 591 | } |
590 | | | 592 | |
591 | aprint_normal("\n"); | | 593 | aprint_normal("\n"); |
592 | | | 594 | |
593 | etsec_write(sc, ATTR, ATTR_DEFAULT); | | 595 | etsec_write(sc, ATTR, ATTR_DEFAULT); |
594 | etsec_write(sc, ATTRELI, ATTRELI_DEFAULT); | | 596 | etsec_write(sc, ATTRELI, ATTRELI_DEFAULT); |
595 | sc->sc_maccfg1 = etsec_read(sc, MACCFG1); | | | |
596 | sc->sc_maccfg2 = etsec_read(sc, MACCFG2); | | | |
597 | sc->sc_ecntrl = etsec_read(sc, ECNTRL); | | | |
598 | | | 597 | |
599 | sc->sc_lock = mutex_obj_alloc(MUTEX_DEFAULT, IPL_SOFTNET); | | 598 | sc->sc_lock = mutex_obj_alloc(MUTEX_DEFAULT, IPL_SOFTNET); |
600 | | | 599 | |
601 | callout_init(&sc->sc_mii_callout, CALLOUT_MPSAFE); | | 600 | callout_init(&sc->sc_mii_callout, CALLOUT_MPSAFE); |
602 | callout_setfunc(&sc->sc_mii_callout, pq3etsec_mii_tick, sc); | | 601 | callout_setfunc(&sc->sc_mii_callout, pq3etsec_mii_tick, sc); |
603 | | | 602 | |
604 | aprint_normal_dev(sc->sc_dev, "Ethernet address %s\n", | | 603 | aprint_normal_dev(sc->sc_dev, "Ethernet address %s\n", |
605 | ether_sprintf(enaddr)); | | 604 | ether_sprintf(enaddr)); |
606 | | | 605 | |
607 | const char * const xname = device_xname(sc->sc_dev); | | 606 | const char * const xname = device_xname(sc->sc_dev); |
608 | struct ethercom * const ec = &sc->sc_ec; | | 607 | struct ethercom * const ec = &sc->sc_ec; |
609 | struct ifnet * const ifp = &ec->ec_if; | | 608 | struct ifnet * const ifp = &ec->ec_if; |
610 | | | 609 | |