Mon Jul 2 01:05:49 2012 UTC ()

in cpu_boot_secondary_processors(), wait until all the other CPUs
have registered themselves in kcpuset_running before returning.
recent changes to the TLB invalidation xcall code assume that
any CPU which will receive a broadcast IPI is registered in
kcpuset_running, so ensure that is true by waiting here.


(chs)

diff -r1.99 -r1.100 src/sys/arch/x86/x86/cpu.c

--- src/sys/arch/x86/x86/cpu.c 2012/06/12 17:14:19	1.99
+++ src/sys/arch/x86/x86/cpu.c 2012/07/02 01:05:48	1.100

 @@ -1,14 +1,14 @@
-/*	$NetBSD: cpu.c,v 1.99 2012/06/12 17:14:19 yamt Exp $	*/
+/*	$NetBSD: cpu.c,v 1.100 2012/07/02 01:05:48 chs Exp $	*/
 /*-
  * Copyright (c) 2000-2012 NetBSD Foundation, Inc.
  * All rights reserved.
+ *
  * This code is derived from software contributed to The NetBSD Foundation
  * by Bill Sommerfeld of RedBack Networks Inc, and by Andrew Doran.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
 @@ -52,27 +52,27 @@
  * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR AND CONTRIBUTORS BE LIABLE
  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.99 2012/06/12 17:14:19 yamt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.100 2012/07/02 01:05:48 chs Exp $");
 #include "opt_ddb.h"
 #include "opt_mpbios.h"		/* for MPDEBUG */
 #include "opt_mtrr.h"
 #include "lapic.h"
 #include "ioapic.h"
 #ifdef i386
 #include "npx.h"
 #endif
 #include <sys/param.h>
 @@ -579,43 +579,50 @@ cpu_init(struct cpu_info *ci)
 		/* Synchronize TSC again, and check for drift. */
 		wbinvd();
 		atomic_or_32(&ci->ci_flags, CPUF_RUNNING);
 		tsc_sync_ap(ci);
 	} else {
 		atomic_or_32(&ci->ci_flags, CPUF_RUNNING);
+	}
+}
 void
 cpu_boot_secondary_processors(void)
+{
 	struct cpu_info *ci;
 	kcpuset_t *cpus;
 	u_long i;
 	/* Now that we know the number of CPUs, patch the text segment. */
 	x86_patch(false);
-	for (i=0; i < maxcpus; i++) {
+	kcpuset_create(&cpus, true);
 	kcpuset_set(cpus, cpu_index(curcpu()));
 	for (i = 0; i < maxcpus; i++) {
 		ci = cpu_lookup(i);
 		if (ci == NULL)
 			continue;
 		if (ci->ci_data.cpu_idlelwp == NULL)
 			continue;
 		if ((ci->ci_flags & CPUF_PRESENT) == 0)
 			continue;
 		if (ci->ci_flags & (CPUF_BSP|CPUF_SP|CPUF_PRIMARY))
 			continue;
 		cpu_boot_secondary(ci);
 		kcpuset_set(cpus, cpu_index(ci));
+	}
 	while (!kcpuset_match(cpus, kcpuset_running))
+		;
 	kcpuset_destroy(cpus);
 	x86_mp_online = true;
 	/* Now that we know about the TSC, attach the timecounter. */
 	tsc_tc_init();
 	/* Enable zeroing of pages in the idle loop if we have SSE2. */
 	vm_page_zero_enable = ((cpu_feature[0] & CPUID_SSE2) != 0);
+}
 static void
 cpu_init_idle_lwp(struct cpu_info *ci)
+{