Mon Sep 3 22:49:54 2012 UTC ()
Always cpu_info_store as the 3rd work unless TPIDRPRW_IS_CURLWP and then
it needs to be lwp0.  Fix IGEPV2 boot problem.


(matt)
diff -r1.27 -r1.28 src/sys/arch/arm/arm32/locore.S
cvs diff -r1.27 -r1.28 src/sys/arch/arm/arm32/locore.S (expand / switch to unified diff)

--- src/sys/arch/arm/arm32/locore.S 2012/08/29 07:14:04 1.27
+++ src/sys/arch/arm/arm32/locore.S 2012/09/03 22:49:54 1.28
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: locore.S,v 1.27 2012/08/29 07:14:04 matt Exp $ */ 1/* $NetBSD: locore.S,v 1.28 2012/09/03 22:49:54 matt Exp $ */
2 2
3/* 3/*
4 * Copyright (C) 1994-1997 Mark Brinicombe 4 * Copyright (C) 1994-1997 Mark Brinicombe
5 * Copyright (C) 1994 Brini 5 * Copyright (C) 1994 Brini
6 * All rights reserved. 6 * All rights reserved.
7 * 7 *
8 * Redistribution and use in source and binary forms, with or without 8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions 9 * modification, are permitted provided that the following conditions
10 * are met: 10 * are met:
11 * 1. Redistributions of source code must retain the above copyright 11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer. 12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright 13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the 14 * notice, this list of conditions and the following disclaimer in the
@@ -32,46 +32,49 @@ @@ -32,46 +32,49 @@
32 */ 32 */
33 33
34#include "assym.h" 34#include "assym.h"
35#include <sys/syscall.h> 35#include <sys/syscall.h>
36#include <sys/errno.h> 36#include <sys/errno.h>
37#include <machine/asm.h> 37#include <machine/asm.h>
38#include <machine/cpu.h> 38#include <machine/cpu.h>
39#include <machine/frame.h> 39#include <machine/frame.h>
40#include <machine/param.h> 40#include <machine/param.h>
41 41
42/* What size should this really be ? It is only used by init_arm() */ 42/* What size should this really be ? It is only used by init_arm() */
43#define INIT_ARM_STACK_SIZE 2048 43#define INIT_ARM_STACK_SIZE 2048
44 44
45 RCSID("$NetBSD: locore.S,v 1.27 2012/08/29 07:14:04 matt Exp $") 45 RCSID("$NetBSD: locore.S,v 1.28 2012/09/03 22:49:54 matt Exp $")
46 46
47/* 47/*
48 * This is for kvm_mkdb, and should be the address of the beginning 48 * This is for kvm_mkdb, and should be the address of the beginning
49 * of the kernel text segment (not necessarily the same as kernbase). 49 * of the kernel text segment (not necessarily the same as kernbase).
50 */ 50 */
51 51
52 .text 52 .text
53 .align 0 53 .align 0
54 54
55ENTRY_NP(kernel_text) 55ENTRY_NP(kernel_text)
56 56
57ASENTRY_NP(start) 57ASENTRY_NP(start)
58 adr r1, .Lstart 58 adr r1, .Lstart
59 ldmia r1, {r1, r2, r8, sp} /* Set initial stack and */ 59 ldmia r1, {r1, r2, r8, sp} /* Set initial stack and */
60 sub r2, r2, r1 /* get zero init data and cpu_info_store */ 60 sub r2, r2, r1 /* get zero init data and cpu_info_store */
61 61
62#if defined(TPIDRPRW_IS_CURCPU) || defined(TPIDRPRW_IS_CURLWP) 62#if defined(TPIDRPRW_IS_CURCPU) || defined(TPIDRPRW_IS_CURLWP)
63 mcr p15, 0, r8, c13, c0, 4 63 mcr p15, 0, r8, c13, c0, 4
64#endif 64#endif
 65#if defined(TPIDRPRW_IS_CURLWP)
 66 ldr r8, [r8, #L_CPU] /* r8 needs curcpu in it */
 67#endif
65 68
66 mov r3, #0 69 mov r3, #0
67.L1: 70.L1:
68 str r3, [r1], #0x0004 /* Zero the bss */ 71 str r3, [r1], #0x0004 /* Zero the bss */
69 subs r2, r2, #4 72 subs r2, r2, #4
70 bgt .L1 73 bgt .L1
71 74
72 mrc p15, 0, r3, c0, c0, 0 /* get our cpuid and save it early */ 75 mrc p15, 0, r3, c0, c0, 0 /* get our cpuid and save it early */
73 str r3, [r8, #CI_ARM_CPUID] 76 str r3, [r8, #CI_ARM_CPUID]
74 77
75 mov fp, #0x00000000 /* trace back starts here */ 78 mov fp, #0x00000000 /* trace back starts here */
76 bl _C_LABEL(initarm) /* Off we go */ 79 bl _C_LABEL(initarm) /* Off we go */
77 80
@@ -82,32 +85,30 @@ ASENTRY_NP(start) @@ -82,32 +85,30 @@ ASENTRY_NP(start)
82 mov ip, sp 85 mov ip, sp
83 stmfd sp!, {fp, ip, lr, pc} 86 stmfd sp!, {fp, ip, lr, pc}
84 sub fp, ip, #4 87 sub fp, ip, #4
85 88
86 bl _C_LABEL(main) /* call main()! */ 89 bl _C_LABEL(main) /* call main()! */
87 90
88 adr r0, .Lmainreturned 91 adr r0, .Lmainreturned
89 b _C_LABEL(panic) 92 b _C_LABEL(panic)
90 /* NOTREACHED */ 93 /* NOTREACHED */
91 94
92.Lstart: 95.Lstart:
93 .word _edata 96 .word _edata
94 .word _end 97 .word _end
95#if defined(TPIDRPRW_IS_CURCPU) 98#if defined(TPIDRPRW_IS_CURLWP)
96 .word _C_LABEL(cpu_info_store) 
97#elif defined(TPIDRPRW_IS_CURLWP) 
98 .word _C_LABEL(lwp0) 99 .word _C_LABEL(lwp0)
99#else 100#else
100 .word 0 101 .word _C_LABEL(cpu_info_store)
101#endif 102#endif
102 .word svcstk + INIT_ARM_STACK_SIZE 103 .word svcstk + INIT_ARM_STACK_SIZE
103 104
104.Lmainreturned: 105.Lmainreturned:
105 .asciz "main() returned" 106 .asciz "main() returned"
106 .align 0 107 .align 0
107 108
108 .bss 109 .bss
109svcstk: 110svcstk:
110 .space INIT_ARM_STACK_SIZE 111 .space INIT_ARM_STACK_SIZE
111 112
112 .text 113 .text
113 .align 0 114 .align 0