Tue Sep 18 05:47:28 2012 UTC ()
Add bounce buffer support for ARM bus_dma(9).  Add macros to help initialize
bus_dma_tag structures.


(matt)
diff -r1.57 -r1.58 src/sys/arch/arm/arm32/bus_dma.c
diff -r1.4 -r1.5 src/sys/arch/arm/at91/at91_bus_dma.c
diff -r1.1 -r1.2 src/sys/arch/arm/broadcom/bcm2835_dma.c
diff -r1.2 -r1.3 src/sys/arch/arm/broadcom/bcm53xx_board.c
diff -r1.4 -r1.5 src/sys/arch/arm/ep93xx/ep93xx_busdma.c
diff -r1.22 -r1.23 src/sys/arch/arm/footbridge/footbridge_pci.c
diff -r1.2 -r1.3 src/sys/arch/arm/gemini/gemini_dma.c
diff -r1.2 -r1.3 src/sys/arch/arm/imx/imx_dma.c
diff -r1.1 -r1.2 src/sys/arch/arm/include/bus_defs.h
diff -r1.2 -r1.3 src/sys/arch/arm/include/bus_funcs.h
diff -r1.8 -r1.9 src/sys/arch/arm/ixp12x0/ixp12x0_pci_dma.c
diff -r1.2 -r1.3 src/sys/arch/arm/marvell/mvsoc_dma.c
diff -r1.3 -r1.4 src/sys/arch/arm/omap/omap_dma.c
diff -r1.4 -r1.5 src/sys/arch/arm/s3c2xx0/s3c2xx0_busdma.c
diff -r1.14 -r1.15 src/sys/arch/arm/xscale/becc.c
diff -r1.21 -r1.22 src/sys/arch/arm/xscale/i80312.c
diff -r1.23 -r1.24 src/sys/arch/arm/xscale/i80321.c
diff -r1.3 -r1.4 src/sys/arch/arm/xscale/ixp425_ixme.c
diff -r1.5 -r1.6 src/sys/arch/arm/xscale/ixp425_pci_dma.c
diff -r1.5 -r1.6 src/sys/arch/arm/xscale/pxa2x0_dma.c

cvs diff -r1.57 -r1.58 src/sys/arch/arm/arm32/bus_dma.c (expand / switch to unified diff)

--- src/sys/arch/arm/arm32/bus_dma.c 2012/09/11 17:54:12 1.57
+++ src/sys/arch/arm/arm32/bus_dma.c 2012/09/18 05:47:26 1.58
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: bus_dma.c,v 1.57 2012/09/11 17:54:12 matt Exp $ */ 1/* $NetBSD: bus_dma.c,v 1.58 2012/09/18 05:47:26 matt Exp $ */
2 2
3/*- 3/*-
4 * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc. 4 * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * This code is derived from software contributed to The NetBSD Foundation 7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center. 9 * NASA Ames Research Center.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions 12 * modification, are permitted provided that the following conditions
13 * are met: 13 * are met:
14 * 1. Redistributions of source code must retain the above copyright 14 * 1. Redistributions of source code must retain the above copyright
@@ -23,52 +23,86 @@ @@ -23,52 +23,86 @@
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 * POSSIBILITY OF SUCH DAMAGE. 30 * POSSIBILITY OF SUCH DAMAGE.
31 */ 31 */
32 32
33#define _ARM32_BUS_DMA_PRIVATE 33#define _ARM32_BUS_DMA_PRIVATE
34 34
35#include <sys/cdefs.h> 35#include <sys/cdefs.h>
36__KERNEL_RCSID(0, "$NetBSD: bus_dma.c,v 1.57 2012/09/11 17:54:12 matt Exp $"); 36__KERNEL_RCSID(0, "$NetBSD: bus_dma.c,v 1.58 2012/09/18 05:47:26 matt Exp $");
37 37
38#include <sys/param.h> 38#include <sys/param.h>
39#include <sys/systm.h> 39#include <sys/systm.h>
40#include <sys/kernel.h> 40#include <sys/kernel.h>
41#include <sys/proc.h> 41#include <sys/proc.h>
42#include <sys/buf.h> 42#include <sys/buf.h>
43#include <sys/reboot.h> 43#include <sys/reboot.h>
44#include <sys/conf.h> 44#include <sys/conf.h>
45#include <sys/file.h> 45#include <sys/file.h>
46#include <sys/malloc.h> 46#include <sys/malloc.h>
47#include <sys/mbuf.h> 47#include <sys/mbuf.h>
48#include <sys/vnode.h> 48#include <sys/vnode.h>
49#include <sys/device.h> 49#include <sys/device.h>
50 50
51#include <uvm/uvm.h> 51#include <uvm/uvm.h>
52 52
53#include <sys/bus.h> 53#include <sys/bus.h>
54#include <machine/cpu.h> 54#include <machine/cpu.h>
55 55
56#include <arm/cpufunc.h> 56#include <arm/cpufunc.h>
57 57
 58static struct evcnt bus_dma_creates =
 59 EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, "busdma", "creates");
 60static struct evcnt bus_dma_bounced_creates =
 61 EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, "busdma", "bounced creates");
 62static struct evcnt bus_dma_loads =
 63 EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, "busdma", "loads");
 64static struct evcnt bus_dma_bounced_loads =
 65 EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, "busdma", "bounced loads");
 66static struct evcnt bus_dma_read_bounces =
 67 EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, "busdma", "read bounces");
 68static struct evcnt bus_dma_write_bounces =
 69 EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, "busdma", "write bounces");
 70static struct evcnt bus_dma_bounced_unloads =
 71 EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, "busdma", "bounced unloads");
 72static struct evcnt bus_dma_unloads =
 73 EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, "busdma", "unloads");
 74static struct evcnt bus_dma_bounced_destroys =
 75 EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, "busdma", "bounced destroys");
 76static struct evcnt bus_dma_destroys =
 77 EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, "busdma", "destroys");
 78
 79EVCNT_ATTACH_STATIC(bus_dma_creates);
 80EVCNT_ATTACH_STATIC(bus_dma_bounced_creates);
 81EVCNT_ATTACH_STATIC(bus_dma_loads);
 82EVCNT_ATTACH_STATIC(bus_dma_bounced_loads);
 83EVCNT_ATTACH_STATIC(bus_dma_read_bounces);
 84EVCNT_ATTACH_STATIC(bus_dma_write_bounces);
 85EVCNT_ATTACH_STATIC(bus_dma_unloads);
 86EVCNT_ATTACH_STATIC(bus_dma_bounced_unloads);
 87EVCNT_ATTACH_STATIC(bus_dma_destroys);
 88EVCNT_ATTACH_STATIC(bus_dma_bounced_destroys);
 89
 90#define STAT_INCR(x) (bus_dma_ ## x.ev_count++)
 91
58int _bus_dmamap_load_buffer(bus_dma_tag_t, bus_dmamap_t, void *, 92int _bus_dmamap_load_buffer(bus_dma_tag_t, bus_dmamap_t, void *,
59 bus_size_t, struct vmspace *, int); 93 bus_size_t, struct vmspace *, int);
60struct arm32_dma_range *_bus_dma_inrange(struct arm32_dma_range *, 94static struct arm32_dma_range *
61 int, bus_addr_t); 95 _bus_dma_inrange(struct arm32_dma_range *, int, bus_addr_t);
62 96
63/* 97/*
64 * Check to see if the specified page is in an allowed DMA range. 98 * Check to see if the specified page is in an allowed DMA range.
65 */ 99 */
66inline struct arm32_dma_range * 100inline struct arm32_dma_range *
67_bus_dma_inrange(struct arm32_dma_range *ranges, int nranges, 101_bus_dma_inrange(struct arm32_dma_range *ranges, int nranges,
68 bus_addr_t curaddr) 102 bus_addr_t curaddr)
69{ 103{
70 struct arm32_dma_range *dr; 104 struct arm32_dma_range *dr;
71 int i; 105 int i;
72 106
73 for (i = 0, dr = ranges; i < nranges; i++, dr++) { 107 for (i = 0, dr = ranges; i < nranges; i++, dr++) {
74 if (curaddr >= dr->dr_sysbase && 108 if (curaddr >= dr->dr_sysbase &&
@@ -79,33 +113,36 @@ _bus_dma_inrange(struct arm32_dma_range  @@ -79,33 +113,36 @@ _bus_dma_inrange(struct arm32_dma_range
79 return (NULL); 113 return (NULL);
80} 114}
81 115
82/* 116/*
83 * Common function to load the specified physical address into the 117 * Common function to load the specified physical address into the
84 * DMA map, coalescing segments and boundary checking as necessary. 118 * DMA map, coalescing segments and boundary checking as necessary.
85 */ 119 */
86static int 120static int
87_bus_dmamap_load_paddr(bus_dma_tag_t t, bus_dmamap_t map, 121_bus_dmamap_load_paddr(bus_dma_tag_t t, bus_dmamap_t map,
88 bus_addr_t paddr, bus_size_t size) 122 bus_addr_t paddr, bus_size_t size)
89{ 123{
90 bus_dma_segment_t * const segs = map->dm_segs; 124 bus_dma_segment_t * const segs = map->dm_segs;
91 int nseg = map->dm_nsegs; 125 int nseg = map->dm_nsegs;
92 bus_addr_t lastaddr = 0xdead; /* XXX gcc */ 126 bus_addr_t lastaddr;
93 bus_addr_t bmask = ~(map->_dm_boundary - 1); 127 bus_addr_t bmask = ~(map->_dm_boundary - 1);
94 bus_addr_t curaddr; 128 bus_addr_t curaddr;
95 bus_size_t sgsize; 129 bus_size_t sgsize;
96 130
97 if (nseg > 0) 131 if (nseg > 0)
98 lastaddr = segs[nseg-1].ds_addr + segs[nseg-1].ds_len; 132 lastaddr = segs[nseg-1].ds_addr + segs[nseg-1].ds_len;
 133 else
 134 lastaddr = 0xdead;
 135
99 again: 136 again:
100 sgsize = size; 137 sgsize = size;
101 138
102 /* Make sure we're in an allowed DMA range. */ 139 /* Make sure we're in an allowed DMA range. */
103 if (t->_ranges != NULL) { 140 if (t->_ranges != NULL) {
104 /* XXX cache last result? */ 141 /* XXX cache last result? */
105 const struct arm32_dma_range * const dr = 142 const struct arm32_dma_range * const dr =
106 _bus_dma_inrange(t->_ranges, t->_nranges, paddr); 143 _bus_dma_inrange(t->_ranges, t->_nranges, paddr);
107 if (dr == NULL) 144 if (dr == NULL)
108 return (EINVAL); 145 return (EINVAL);
109  146
110 /* 147 /*
111 * In a valid DMA range. Translate the physical 148 * In a valid DMA range. Translate the physical
@@ -146,26 +183,75 @@ _bus_dmamap_load_paddr(bus_dma_tag_t t,  @@ -146,26 +183,75 @@ _bus_dmamap_load_paddr(bus_dma_tag_t t,
146 } 183 }
147 184
148 lastaddr = curaddr + sgsize; 185 lastaddr = curaddr + sgsize;
149 186
150 paddr += sgsize; 187 paddr += sgsize;
151 size -= sgsize; 188 size -= sgsize;
152 if (size > 0) 189 if (size > 0)
153 goto again; 190 goto again;
154  191
155 map->dm_nsegs = nseg; 192 map->dm_nsegs = nseg;
156 return (0); 193 return (0);
157} 194}
158 195
 196#ifdef _ARM32_NEED_BUS_DMA_BOUNCE
 197static int _bus_dma_alloc_bouncebuf(bus_dma_tag_t t, bus_dmamap_t map,
 198 bus_size_t size, int flags);
 199static void _bus_dma_free_bouncebuf(bus_dma_tag_t t, bus_dmamap_t map);
 200static int _bus_dma_uiomove(void *buf, struct uio *uio, size_t n,
 201 int direction);
 202
 203static int
 204_bus_dma_load_bouncebuf(bus_dma_tag_t t, bus_dmamap_t map, void *buf,
 205 size_t buflen, int buftype, int flags)
 206{
 207 struct arm32_bus_dma_cookie * const cookie = map->_dm_cookie;
 208 struct vmspace * const vm = vmspace_kernel();
 209 int error;
 210
 211 KASSERT(cookie != NULL);
 212 KASSERT(cookie->id_flags & _BUS_DMA_MIGHT_NEED_BOUNCE);
 213
 214 /*
 215 * Allocate bounce pages, if necessary.
 216 */
 217 if ((cookie->id_flags & _BUS_DMA_HAS_BOUNCE) == 0) {
 218 error = _bus_dma_alloc_bouncebuf(t, map, buflen, flags);
 219 if (error)
 220 return (error);
 221 }
 222
 223 /*
 224 * Cache a pointer to the caller's buffer and load the DMA map
 225 * with the bounce buffer.
 226 */
 227 cookie->id_origbuf = buf;
 228 cookie->id_origbuflen = buflen;
 229 error = _bus_dmamap_load_buffer(t, map, cookie->id_bouncebuf,
 230 buflen, vm, flags);
 231 if (error)
 232 return (error);
 233
 234 STAT_INCR(bounced_loads);
 235 map->dm_mapsize = buflen;
 236 map->_dm_vmspace = vm;
 237 map->_dm_buftype = buftype;
 238
 239 /* ...so _bus_dmamap_sync() knows we're bouncing */
 240 cookie->id_flags |= _BUS_DMA_IS_BOUNCING;
 241 return 0;
 242}
 243#endif /* _ARM32_NEED_BUS_DMA_BOUNCE */
 244
159/* 245/*
160 * Common function for DMA map creation. May be called by bus-specific 246 * Common function for DMA map creation. May be called by bus-specific
161 * DMA map creation functions. 247 * DMA map creation functions.
162 */ 248 */
163int 249int
164_bus_dmamap_create(bus_dma_tag_t t, bus_size_t size, int nsegments, 250_bus_dmamap_create(bus_dma_tag_t t, bus_size_t size, int nsegments,
165 bus_size_t maxsegsz, bus_size_t boundary, int flags, bus_dmamap_t *dmamp) 251 bus_size_t maxsegsz, bus_size_t boundary, int flags, bus_dmamap_t *dmamp)
166{ 252{
167 struct arm32_bus_dmamap *map; 253 struct arm32_bus_dmamap *map;
168 void *mapstore; 254 void *mapstore;
169 size_t mapsize; 255 size_t mapsize;
170 256
171#ifdef DEBUG_DMA 257#ifdef DEBUG_DMA
@@ -177,159 +263,249 @@ _bus_dmamap_create(bus_dma_tag_t t, bus_ @@ -177,159 +263,249 @@ _bus_dmamap_create(bus_dma_tag_t t, bus_
177 * Allocate and initialize the DMA map. The end of the map 263 * Allocate and initialize the DMA map. The end of the map
178 * is a variable-sized array of segments, so we allocate enough 264 * is a variable-sized array of segments, so we allocate enough
179 * room for them in one shot. 265 * room for them in one shot.
180 * 266 *
181 * Note we don't preserve the WAITOK or NOWAIT flags. Preservation 267 * Note we don't preserve the WAITOK or NOWAIT flags. Preservation
182 * of ALLOCNOW notifies others that we've reserved these resources, 268 * of ALLOCNOW notifies others that we've reserved these resources,
183 * and they are not to be freed. 269 * and they are not to be freed.
184 * 270 *
185 * The bus_dmamap_t includes one bus_dma_segment_t, hence 271 * The bus_dmamap_t includes one bus_dma_segment_t, hence
186 * the (nsegments - 1). 272 * the (nsegments - 1).
187 */ 273 */
188 mapsize = sizeof(struct arm32_bus_dmamap) + 274 mapsize = sizeof(struct arm32_bus_dmamap) +
189 (sizeof(bus_dma_segment_t) * (nsegments - 1)); 275 (sizeof(bus_dma_segment_t) * (nsegments - 1));
190 if ((mapstore = malloc(mapsize, M_DMAMAP, 276 const int mallocflags = M_ZERO|(flags & BUS_DMA_NOWAIT) ? M_NOWAIT : M_WAITOK;
191 (flags & BUS_DMA_NOWAIT) ? M_NOWAIT : M_WAITOK)) == NULL) 277 if ((mapstore = malloc(mapsize, M_DMAMAP, mallocflags)) == NULL)
192 return (ENOMEM); 278 return (ENOMEM);
193 279
194 memset(mapstore, 0, mapsize); 
195 map = (struct arm32_bus_dmamap *)mapstore; 280 map = (struct arm32_bus_dmamap *)mapstore;
196 map->_dm_size = size; 281 map->_dm_size = size;
197 map->_dm_segcnt = nsegments; 282 map->_dm_segcnt = nsegments;
198 map->_dm_maxmaxsegsz = maxsegsz; 283 map->_dm_maxmaxsegsz = maxsegsz;
199 map->_dm_boundary = boundary; 284 map->_dm_boundary = boundary;
200 map->_dm_flags = flags & ~(BUS_DMA_WAITOK|BUS_DMA_NOWAIT); 285 map->_dm_flags = flags & ~(BUS_DMA_WAITOK|BUS_DMA_NOWAIT);
201 map->_dm_origbuf = NULL; 286 map->_dm_origbuf = NULL;
202 map->_dm_buftype = ARM32_BUFTYPE_INVALID; 287 map->_dm_buftype = _BUS_DMA_BUFTYPE_INVALID;
203 map->_dm_vmspace = vmspace_kernel(); 288 map->_dm_vmspace = vmspace_kernel();
 289 map->_dm_cookie = NULL;
204 map->dm_maxsegsz = maxsegsz; 290 map->dm_maxsegsz = maxsegsz;
205 map->dm_mapsize = 0; /* no valid mappings */ 291 map->dm_mapsize = 0; /* no valid mappings */
206 map->dm_nsegs = 0; 292 map->dm_nsegs = 0;
207 293
208 *dmamp = map; 294 *dmamp = map;
 295
 296#ifdef _ARM32_NEED_BUS_DMA_BOUNCE
 297 struct arm32_bus_dma_cookie *cookie;
 298 int cookieflags;
 299 void *cookiestore;
 300 size_t cookiesize;
 301 int error;
 302
 303 cookieflags = 0;
 304
 305 if (t->_may_bounce != NULL) {
 306 error = (*t->_may_bounce)(t, map, flags, &cookieflags);
 307 if (error != 0)
 308 goto out;
 309 }
 310
 311 if (t->_ranges != NULL)
 312 cookieflags |= _BUS_DMA_MIGHT_NEED_BOUNCE;
 313
 314 if ((cookieflags & _BUS_DMA_MIGHT_NEED_BOUNCE) == 0) {
 315 STAT_INCR(creates);
 316 return 0;
 317 }
 318
 319 cookiesize = sizeof(struct arm32_bus_dma_cookie) +
 320 (sizeof(bus_dma_segment_t) * map->_dm_segcnt);
 321
 322 /*
 323 * Allocate our cookie.
 324 */
 325 if ((cookiestore = malloc(cookiesize, M_DMAMAP, mallocflags)) == NULL) {
 326 error = ENOMEM;
 327 goto out;
 328 }
 329 cookie = (struct arm32_bus_dma_cookie *)cookiestore;
 330 cookie->id_flags = cookieflags;
 331 map->_dm_cookie = cookie;
 332 STAT_INCR(bounced_creates);
 333
 334 error = _bus_dma_alloc_bouncebuf(t, map, size, flags);
 335 out:
 336 if (error)
 337 _bus_dmamap_destroy(t, map);
 338#else
 339 STAT_INCR(creates);
 340#endif /* _ARM32_NEED_BUS_DMA_BOUNCE */
 341
209#ifdef DEBUG_DMA 342#ifdef DEBUG_DMA
210 printf("dmamap_create:map=%p\n", map); 343 printf("dmamap_create:map=%p\n", map);
211#endif /* DEBUG_DMA */ 344#endif /* DEBUG_DMA */
212 return (0); 345 return (0);
213} 346}
214 347
215/* 348/*
216 * Common function for DMA map destruction. May be called by bus-specific 349 * Common function for DMA map destruction. May be called by bus-specific
217 * DMA map destruction functions. 350 * DMA map destruction functions.
218 */ 351 */
219void 352void
220_bus_dmamap_destroy(bus_dma_tag_t t, bus_dmamap_t map) 353_bus_dmamap_destroy(bus_dma_tag_t t, bus_dmamap_t map)
221{ 354{
222 355
223#ifdef DEBUG_DMA 356#ifdef DEBUG_DMA
224 printf("dmamap_destroy: t=%p map=%p\n", t, map); 357 printf("dmamap_destroy: t=%p map=%p\n", t, map);
225#endif /* DEBUG_DMA */ 358#endif /* DEBUG_DMA */
 359#ifdef _ARM32_NEED_BUS_DMA_BOUNCE
 360 struct arm32_bus_dma_cookie *cookie = map->_dm_cookie;
226 361
227 /* 362 /*
228 * Explicit unload. 363 * Free any bounce pages this map might hold.
229 */ 364 */
230 map->dm_maxsegsz = map->_dm_maxmaxsegsz; 365 if (cookie != NULL) {
231 map->dm_mapsize = 0; 366 if (cookie->id_flags & _BUS_DMA_IS_BOUNCING)
232 map->dm_nsegs = 0; 367 STAT_INCR(bounced_unloads);
233 map->_dm_origbuf = NULL; 368 map->dm_nsegs = 0;
234 map->_dm_buftype = ARM32_BUFTYPE_INVALID; 369 if (cookie->id_flags & _BUS_DMA_HAS_BOUNCE)
235 map->_dm_vmspace = NULL; 370 _bus_dma_free_bouncebuf(t, map);
 371 STAT_INCR(bounced_destroys);
 372 free(cookie, M_DMAMAP);
 373 } else
 374#endif
 375 STAT_INCR(destroys);
 376
 377 if (map->dm_nsegs > 0)
 378 STAT_INCR(unloads);
236 379
237 free(map, M_DMAMAP); 380 free(map, M_DMAMAP);
238} 381}
239 382
240/* 383/*
241 * Common function for loading a DMA map with a linear buffer. May 384 * Common function for loading a DMA map with a linear buffer. May
242 * be called by bus-specific DMA map load functions. 385 * be called by bus-specific DMA map load functions.
243 */ 386 */
244int 387int
245_bus_dmamap_load(bus_dma_tag_t t, bus_dmamap_t map, void *buf, 388_bus_dmamap_load(bus_dma_tag_t t, bus_dmamap_t map, void *buf,
246 bus_size_t buflen, struct proc *p, int flags) 389 bus_size_t buflen, struct proc *p, int flags)
247{ 390{
248 int error; 
249 struct vmspace *vm; 391 struct vmspace *vm;
 392 int error;
250 393
251#ifdef DEBUG_DMA 394#ifdef DEBUG_DMA
252 printf("dmamap_load: t=%p map=%p buf=%p len=%lx p=%p f=%d\n", 395 printf("dmamap_load: t=%p map=%p buf=%p len=%lx p=%p f=%d\n",
253 t, map, buf, buflen, p, flags); 396 t, map, buf, buflen, p, flags);
254#endif /* DEBUG_DMA */ 397#endif /* DEBUG_DMA */
255 398
 399 if (map->dm_nsegs > 0) {
 400#ifdef _ARM32_NEED_BUS_DMA_BOUNCE
 401 struct arm32_bus_dma_cookie *cookie = map->_dm_cookie;
 402 if (cookie != NULL) {
 403 if (cookie->id_flags & _BUS_DMA_IS_BOUNCING) {
 404 STAT_INCR(bounced_unloads);
 405 cookie->id_flags &= ~_BUS_DMA_IS_BOUNCING;
 406 }
 407 } else
 408#endif
 409 STAT_INCR(unloads);
 410 }
 411
256 /* 412 /*
257 * Make sure that on error condition we return "no valid mappings". 413 * Make sure that on error condition we return "no valid mappings".
258 */ 414 */
259 map->dm_mapsize = 0; 415 map->dm_mapsize = 0;
260 map->dm_nsegs = 0; 416 map->dm_nsegs = 0;
 417 map->_dm_buftype = _BUS_DMA_BUFTYPE_INVALID;
261 KASSERT(map->dm_maxsegsz <= map->_dm_maxmaxsegsz); 418 KASSERT(map->dm_maxsegsz <= map->_dm_maxmaxsegsz);
262 419
263 if (buflen > map->_dm_size) 420 if (buflen > map->_dm_size)
264 return (EINVAL); 421 return (EINVAL);
265 422
266 if (p != NULL) { 423 if (p != NULL) {
267 vm = p->p_vmspace; 424 vm = p->p_vmspace;
268 } else { 425 } else {
269 vm = vmspace_kernel(); 426 vm = vmspace_kernel();
270 } 427 }
271 428
272 /* _bus_dmamap_load_buffer() clears this if we're not... */ 429 /* _bus_dmamap_load_buffer() clears this if we're not... */
273 map->_dm_flags |= ARM32_DMAMAP_COHERENT; 430 map->_dm_flags |= _BUS_DMAMAP_COHERENT;
274 431
275 error = _bus_dmamap_load_buffer(t, map, buf, buflen, vm, flags); 432 error = _bus_dmamap_load_buffer(t, map, buf, buflen, vm, flags);
276 if (error == 0) { 433 if (error == 0) {
277 map->dm_mapsize = buflen; 434 map->dm_mapsize = buflen;
278 map->_dm_origbuf = buf; 
279 map->_dm_buftype = ARM32_BUFTYPE_LINEAR; 
280 map->_dm_vmspace = vm; 435 map->_dm_vmspace = vm;
 436 map->_dm_origbuf = buf;
 437 map->_dm_buftype = _BUS_DMA_BUFTYPE_LINEAR;
 438 return 0;
281 } 439 }
282#ifdef DEBUG_DMA 440#ifdef _ARM32_NEED_BUS_DMA_BOUNCE
283 printf("dmamap_load: error=%d\n", error); 441 struct arm32_bus_dma_cookie * const cookie = map->_dm_cookie;
284#endif /* DEBUG_DMA */ 442 if (cookie != NULL && (cookie->id_flags & _BUS_DMA_MIGHT_NEED_BOUNCE)) {
 443 error = _bus_dma_load_bouncebuf(t, map, buf, buflen,
 444 _BUS_DMA_BUFTYPE_LINEAR, flags);
 445 }
 446#endif
285 return (error); 447 return (error);
286} 448}
287 449
288/* 450/*
289 * Like _bus_dmamap_load(), but for mbufs. 451 * Like _bus_dmamap_load(), but for mbufs.
290 */ 452 */
291int 453int
292_bus_dmamap_load_mbuf(bus_dma_tag_t t, bus_dmamap_t map, struct mbuf *m0, 454_bus_dmamap_load_mbuf(bus_dma_tag_t t, bus_dmamap_t map, struct mbuf *m0,
293 int flags) 455 int flags)
294{ 456{
295 int error; 457 int error;
296 struct mbuf *m; 458 struct mbuf *m;
297 459
298#ifdef DEBUG_DMA 460#ifdef DEBUG_DMA
299 printf("dmamap_load_mbuf: t=%p map=%p m0=%p f=%d\n", 461 printf("dmamap_load_mbuf: t=%p map=%p m0=%p f=%d\n",
300 t, map, m0, flags); 462 t, map, m0, flags);
301#endif /* DEBUG_DMA */ 463#endif /* DEBUG_DMA */
302 464
 465 if (map->dm_nsegs > 0) {
 466#ifdef _ARM32_NEED_BUS_DMA_BOUNCE
 467 struct arm32_bus_dma_cookie *cookie = map->_dm_cookie;
 468 if (cookie != NULL) {
 469 if (cookie->id_flags & _BUS_DMA_IS_BOUNCING) {
 470 STAT_INCR(bounced_unloads);
 471 cookie->id_flags &= ~_BUS_DMA_IS_BOUNCING;
 472 }
 473 } else
 474#endif
 475 STAT_INCR(unloads);
 476 }
 477
303 /* 478 /*
304 * Make sure that on error condition we return "no valid mappings." 479 * Make sure that on error condition we return "no valid mappings."
305 */ 480 */
306 map->dm_mapsize = 0; 481 map->dm_mapsize = 0;
307 map->dm_nsegs = 0; 482 map->dm_nsegs = 0;
 483 map->_dm_buftype = _BUS_DMA_BUFTYPE_INVALID;
308 KASSERT(map->dm_maxsegsz <= map->_dm_maxmaxsegsz); 484 KASSERT(map->dm_maxsegsz <= map->_dm_maxmaxsegsz);
309 485
310#ifdef DIAGNOSTIC 486#ifdef DIAGNOSTIC
311 if ((m0->m_flags & M_PKTHDR) == 0) 487 if ((m0->m_flags & M_PKTHDR) == 0)
312 panic("_bus_dmamap_load_mbuf: no packet header"); 488 panic("_bus_dmamap_load_mbuf: no packet header");
313#endif /* DIAGNOSTIC */ 489#endif /* DIAGNOSTIC */
314 490
315 if (m0->m_pkthdr.len > map->_dm_size) 491 if (m0->m_pkthdr.len > map->_dm_size)
316 return (EINVAL); 492 return (EINVAL);
317 493
318 /* 494 /*
319 * Mbuf chains should almost never have coherent (i.e. 495 * Mbuf chains should almost never have coherent (i.e.
320 * un-cached) mappings, so clear that flag now. 496 * un-cached) mappings, so clear that flag now.
321 */ 497 */
322 map->_dm_flags &= ~ARM32_DMAMAP_COHERENT; 498 map->_dm_flags &= ~_BUS_DMAMAP_COHERENT;
323 499
324 error = 0; 500 error = 0;
325 for (m = m0; m != NULL && error == 0; m = m->m_next) { 501 for (m = m0; m != NULL && error == 0; m = m->m_next) {
326 int offset; 502 int offset;
327 int remainbytes; 503 int remainbytes;
328 const struct vm_page * const *pgs; 504 const struct vm_page * const *pgs;
329 paddr_t paddr; 505 paddr_t paddr;
330 int size; 506 int size;
331 507
332 if (m->m_len == 0) 508 if (m->m_len == 0)
333 continue; 509 continue;
334 /* 510 /*
335 * Don't allow reads in read-only mbufs. 511 * Don't allow reads in read-only mbufs.
@@ -387,78 +563,83 @@ _bus_dmamap_load_mbuf(bus_dma_tag_t t, b @@ -387,78 +563,83 @@ _bus_dmamap_load_mbuf(bus_dma_tag_t t, b
387 (m->m_data - M_BUFADDR(m)); 563 (m->m_data - M_BUFADDR(m));
388 size = m->m_len; 564 size = m->m_len;
389 error = _bus_dmamap_load_paddr(t, map, paddr, size); 565 error = _bus_dmamap_load_paddr(t, map, paddr, size);
390 break; 566 break;
391 567
392 default: 568 default:
393 error = _bus_dmamap_load_buffer(t, map, m->m_data, 569 error = _bus_dmamap_load_buffer(t, map, m->m_data,
394 m->m_len, vmspace_kernel(), flags); 570 m->m_len, vmspace_kernel(), flags);
395 } 571 }
396 } 572 }
397 if (error == 0) { 573 if (error == 0) {
398 map->dm_mapsize = m0->m_pkthdr.len; 574 map->dm_mapsize = m0->m_pkthdr.len;
399 map->_dm_origbuf = m0; 575 map->_dm_origbuf = m0;
400 map->_dm_buftype = ARM32_BUFTYPE_MBUF; 576 map->_dm_buftype = _BUS_DMA_BUFTYPE_MBUF;
401 map->_dm_vmspace = vmspace_kernel(); /* always kernel */ 577 map->_dm_vmspace = vmspace_kernel(); /* always kernel */
 578 return 0;
402 } 579 }
403#ifdef DEBUG_DMA 580#ifdef _ARM32_NEED_BUS_DMA_BOUNCE
404 printf("dmamap_load_mbuf: error=%d\n", error); 581 struct arm32_bus_dma_cookie * const cookie = map->_dm_cookie;
405#endif /* DEBUG_DMA */ 582 if (cookie != NULL && (cookie->id_flags & _BUS_DMA_MIGHT_NEED_BOUNCE)) {
 583 error = _bus_dma_load_bouncebuf(t, map, m0, m0->m_pkthdr.len,
 584 _BUS_DMA_BUFTYPE_MBUF, flags);
 585 }
 586#endif
406 return (error); 587 return (error);
407} 588}
408 589
409/* 590/*
410 * Like _bus_dmamap_load(), but for uios. 591 * Like _bus_dmamap_load(), but for uios.
411 */ 592 */
412int 593int
413_bus_dmamap_load_uio(bus_dma_tag_t t, bus_dmamap_t map, struct uio *uio, 594_bus_dmamap_load_uio(bus_dma_tag_t t, bus_dmamap_t map, struct uio *uio,
414 int flags) 595 int flags)
415{ 596{
416 int i, error; 597 int i, error;
417 bus_size_t minlen, resid; 598 bus_size_t minlen, resid;
418 struct iovec *iov; 599 struct iovec *iov;
419 void *addr; 600 void *addr;
420 601
421 /* 602 /*
422 * Make sure that on error condition we return "no valid mappings." 603 * Make sure that on error condition we return "no valid mappings."
423 */ 604 */
424 map->dm_mapsize = 0; 605 map->dm_mapsize = 0;
425 map->dm_nsegs = 0; 606 map->dm_nsegs = 0;
426 KASSERT(map->dm_maxsegsz <= map->_dm_maxmaxsegsz); 607 KASSERT(map->dm_maxsegsz <= map->_dm_maxmaxsegsz);
427 608
428 resid = uio->uio_resid; 609 resid = uio->uio_resid;
429 iov = uio->uio_iov; 610 iov = uio->uio_iov;
430 611
431 /* _bus_dmamap_load_buffer() clears this if we're not... */ 612 /* _bus_dmamap_load_buffer() clears this if we're not... */
432 map->_dm_flags |= ARM32_DMAMAP_COHERENT; 613 map->_dm_flags |= _BUS_DMAMAP_COHERENT;
433 614
434 error = 0; 615 error = 0;
435 for (i = 0; i < uio->uio_iovcnt && resid != 0 && error == 0; i++) { 616 for (i = 0; i < uio->uio_iovcnt && resid != 0 && error == 0; i++) {
436 /* 617 /*
437 * Now at the first iovec to load. Load each iovec 618 * Now at the first iovec to load. Load each iovec
438 * until we have exhausted the residual count. 619 * until we have exhausted the residual count.
439 */ 620 */
440 minlen = resid < iov[i].iov_len ? resid : iov[i].iov_len; 621 minlen = resid < iov[i].iov_len ? resid : iov[i].iov_len;
441 addr = (void *)iov[i].iov_base; 622 addr = (void *)iov[i].iov_base;
442 623
443 error = _bus_dmamap_load_buffer(t, map, addr, minlen, 624 error = _bus_dmamap_load_buffer(t, map, addr, minlen,
444 uio->uio_vmspace, flags); 625 uio->uio_vmspace, flags);
445 626
446 resid -= minlen; 627 resid -= minlen;
447 } 628 }
448 if (error == 0) { 629 if (error == 0) {
449 map->dm_mapsize = uio->uio_resid; 630 map->dm_mapsize = uio->uio_resid;
450 map->_dm_origbuf = uio; 631 map->_dm_origbuf = uio;
451 map->_dm_buftype = ARM32_BUFTYPE_UIO; 632 map->_dm_buftype = _BUS_DMA_BUFTYPE_UIO;
452 map->_dm_vmspace = uio->uio_vmspace; 633 map->_dm_vmspace = uio->uio_vmspace;
453 } 634 }
454 return (error); 635 return (error);
455} 636}
456 637
457/* 638/*
458 * Like _bus_dmamap_load(), but for raw memory allocated with 639 * Like _bus_dmamap_load(), but for raw memory allocated with
459 * bus_dmamem_alloc(). 640 * bus_dmamem_alloc().
460 */ 641 */
461int 642int
462_bus_dmamap_load_raw(bus_dma_tag_t t, bus_dmamap_t map, 643_bus_dmamap_load_raw(bus_dma_tag_t t, bus_dmamap_t map,
463 bus_dma_segment_t *segs, int nsegs, bus_size_t size, int flags) 644 bus_dma_segment_t *segs, int nsegs, bus_size_t size, int flags)
464{ 645{
@@ -475,27 +656,27 @@ _bus_dmamap_unload(bus_dma_tag_t t, bus_ @@ -475,27 +656,27 @@ _bus_dmamap_unload(bus_dma_tag_t t, bus_
475{ 656{
476 657
477#ifdef DEBUG_DMA 658#ifdef DEBUG_DMA
478 printf("dmamap_unload: t=%p map=%p\n", t, map); 659 printf("dmamap_unload: t=%p map=%p\n", t, map);
479#endif /* DEBUG_DMA */ 660#endif /* DEBUG_DMA */
480 661
481 /* 662 /*
482 * No resources to free; just mark the mappings as 663 * No resources to free; just mark the mappings as
483 * invalid. 664 * invalid.
484 */ 665 */
485 map->dm_mapsize = 0; 666 map->dm_mapsize = 0;
486 map->dm_nsegs = 0; 667 map->dm_nsegs = 0;
487 map->_dm_origbuf = NULL; 668 map->_dm_origbuf = NULL;
488 map->_dm_buftype = ARM32_BUFTYPE_INVALID; 669 map->_dm_buftype = _BUS_DMA_BUFTYPE_INVALID;
489 map->_dm_vmspace = NULL; 670 map->_dm_vmspace = NULL;
490} 671}
491 672
492static void 673static void
493_bus_dmamap_sync_segment(vaddr_t va, paddr_t pa, vsize_t len, int ops, bool readonly_p) 674_bus_dmamap_sync_segment(vaddr_t va, paddr_t pa, vsize_t len, int ops, bool readonly_p)
494{ 675{
495 KASSERT((va & PAGE_MASK) == (pa & PAGE_MASK)); 676 KASSERT((va & PAGE_MASK) == (pa & PAGE_MASK));
496 677
497 switch (ops) { 678 switch (ops) {
498 case BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE: 679 case BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE:
499 if (!readonly_p) { 680 if (!readonly_p) {
500 cpu_dcache_wbinv_range(va, len); 681 cpu_dcache_wbinv_range(va, len);
501 cpu_sdcache_wbinv_range(va, pa, len); 682 cpu_sdcache_wbinv_range(va, pa, len);
@@ -530,28 +711,37 @@ _bus_dmamap_sync_segment(vaddr_t va, pad @@ -530,28 +711,37 @@ _bus_dmamap_sync_segment(vaddr_t va, pad
530 } 711 }
531 712
532 case BUS_DMASYNC_PREWRITE: 713 case BUS_DMASYNC_PREWRITE:
533 cpu_dcache_wb_range(va, len); 714 cpu_dcache_wb_range(va, len);
534 cpu_sdcache_wb_range(va, pa, len); 715 cpu_sdcache_wb_range(va, pa, len);
535 break; 716 break;
536 } 717 }
537} 718}
538 719
539static inline void 720static inline void
540_bus_dmamap_sync_linear(bus_dma_tag_t t, bus_dmamap_t map, bus_addr_t offset, 721_bus_dmamap_sync_linear(bus_dma_tag_t t, bus_dmamap_t map, bus_addr_t offset,
541 bus_size_t len, int ops) 722 bus_size_t len, int ops)
542{ 723{
 724#ifdef _ARM32_NEED_BUS_DMA_BOUNCE
 725 struct arm32_bus_dma_cookie * const cookie = map->_dm_cookie;
 726 bool bouncing = (cookie != NULL && (cookie->id_flags & _BUS_DMA_IS_BOUNCING));
 727#endif
543 bus_dma_segment_t *ds = map->dm_segs; 728 bus_dma_segment_t *ds = map->dm_segs;
544 vaddr_t va = (vaddr_t) map->_dm_origbuf; 729 vaddr_t va = (vaddr_t) map->_dm_origbuf;
 730#ifdef _ARM32_NEED_BUS_DMA_BOUNCE
 731 if (bouncing) {
 732 va = (vaddr_t) cookie->id_bouncebuf;
 733 }
 734#endif
545 735
546 while (len > 0) { 736 while (len > 0) {
547 while (offset >= ds->ds_len) { 737 while (offset >= ds->ds_len) {
548 offset -= ds->ds_len; 738 offset -= ds->ds_len;
549 va += ds->ds_len; 739 va += ds->ds_len;
550 ds++; 740 ds++;
551 } 741 }
552 742
553 paddr_t pa = ds->ds_addr + offset; 743 paddr_t pa = ds->ds_addr + offset;
554 size_t seglen = min(len, ds->ds_len - offset); 744 size_t seglen = min(len, ds->ds_len - offset);
555 745
556 _bus_dmamap_sync_segment(va + offset, pa, seglen, ops, false); 746 _bus_dmamap_sync_segment(va + offset, pa, seglen, ops, false);
557 747
@@ -658,26 +848,27 @@ _bus_dmamap_sync_uio(bus_dma_tag_t t, bu @@ -658,26 +848,27 @@ _bus_dmamap_sync_uio(bus_dma_tag_t t, bu
658 * 848 *
659 * This version works for the Virtually Indexed Virtually Tagged 849 * This version works for the Virtually Indexed Virtually Tagged
660 * cache found on 32-bit ARM processors. 850 * cache found on 32-bit ARM processors.
661 * 851 *
662 * XXX Should have separate versions for write-through vs. 852 * XXX Should have separate versions for write-through vs.
663 * XXX write-back caches. We currently assume write-back 853 * XXX write-back caches. We currently assume write-back
664 * XXX here, which is not as efficient as it could be for 854 * XXX here, which is not as efficient as it could be for
665 * XXX the write-through case. 855 * XXX the write-through case.
666 */ 856 */
667void 857void
668_bus_dmamap_sync(bus_dma_tag_t t, bus_dmamap_t map, bus_addr_t offset, 858_bus_dmamap_sync(bus_dma_tag_t t, bus_dmamap_t map, bus_addr_t offset,
669 bus_size_t len, int ops) 859 bus_size_t len, int ops)
670{ 860{
 861 bool bouncing = false;
671 862
672#ifdef DEBUG_DMA 863#ifdef DEBUG_DMA
673 printf("dmamap_sync: t=%p map=%p offset=%lx len=%lx ops=%x\n", 864 printf("dmamap_sync: t=%p map=%p offset=%lx len=%lx ops=%x\n",
674 t, map, offset, len, ops); 865 t, map, offset, len, ops);
675#endif /* DEBUG_DMA */ 866#endif /* DEBUG_DMA */
676 867
677 /* 868 /*
678 * Mixing of PRE and POST operations is not allowed. 869 * Mixing of PRE and POST operations is not allowed.
679 */ 870 */
680 if ((ops & (BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE)) != 0 && 871 if ((ops & (BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE)) != 0 &&
681 (ops & (BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE)) != 0) 872 (ops & (BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE)) != 0)
682 panic("_bus_dmamap_sync: mix PRE and POST"); 873 panic("_bus_dmamap_sync: mix PRE and POST");
683 874
@@ -694,75 +885,168 @@ _bus_dmamap_sync(bus_dma_tag_t t, bus_dm @@ -694,75 +885,168 @@ _bus_dmamap_sync(bus_dma_tag_t t, bus_dm
694 * to do the following things: 885 * to do the following things:
695 * 886 *
696 * PREREAD -- Invalidate the D-cache. We do this 887 * PREREAD -- Invalidate the D-cache. We do this
697 * here in case a write-back is required by the back-end. 888 * here in case a write-back is required by the back-end.
698 * 889 *
699 * PREWRITE -- Write-back the D-cache. Note that if 890 * PREWRITE -- Write-back the D-cache. Note that if
700 * we are doing a PREREAD|PREWRITE, we can collapse 891 * we are doing a PREREAD|PREWRITE, we can collapse
701 * the whole thing into a single Wb-Inv. 892 * the whole thing into a single Wb-Inv.
702 * 893 *
703 * POSTREAD -- Nothing. 894 * POSTREAD -- Nothing.
704 * 895 *
705 * POSTWRITE -- Nothing. 896 * POSTWRITE -- Nothing.
706 */ 897 */
 898#ifdef _ARM32_NEED_BUS_DMA_BOUNCE
 899 struct arm32_bus_dma_cookie * const cookie = map->_dm_cookie;
 900 bouncing = (cookie != NULL && (cookie->id_flags & _BUS_DMA_IS_BOUNCING));
 901#endif
707 902
708 ops &= (BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 903 const int pre_ops = ops & (BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
709 if (ops == 0) 904 if (!bouncing && pre_ops == 0)
710 return; 905 return;
711 906
 907#ifdef _ARM32_NEED_BUS_DMA_BOUNCE
 908 if (bouncing && (ops & BUS_DMASYNC_PREWRITE)) {
 909 STAT_INCR(write_bounces);
 910 char * const dataptr = (char *)cookie->id_bouncebuf + offset;
 911 /*
 912 * Copy the caller's buffer to the bounce buffer.
 913 */
 914 switch (map->_dm_buftype) {
 915 case _BUS_DMA_BUFTYPE_LINEAR:
 916 memcpy(dataptr, cookie->id_origlinearbuf + offset, len);
 917 break;
 918 case _BUS_DMA_BUFTYPE_MBUF:
 919 m_copydata(cookie->id_origmbuf, offset, len, dataptr);
 920 break;
 921 case _BUS_DMA_BUFTYPE_UIO:
 922 _bus_dma_uiomove(dataptr, cookie->id_origuio, len, UIO_WRITE);
 923 break;
 924#ifdef DIAGNOSTIC
 925 case _BUS_DMA_BUFTYPE_RAW:
 926 panic("_bus_dmamap_sync(pre): _BUS_DMA_BUFTYPE_RAW");
 927 break;
 928
 929 case _BUS_DMA_BUFTYPE_INVALID:
 930 panic("_bus_dmamap_sync(pre): _BUS_DMA_BUFTYPE_INVALID");
 931 break;
 932
 933 default:
 934 panic("_bus_dmamap_sync(pre): map %p: unknown buffer type %d\n",
 935 map, map->_dm_buftype);
 936 break;
 937#endif /* DIAGNOSTIC */
 938 }
 939 }
 940#endif /* _ARM32_NEED_BUS_DMA_BOUNCE */
 941
712 /* Skip cache frobbing if mapping was COHERENT. */ 942 /* Skip cache frobbing if mapping was COHERENT. */
713 if (map->_dm_flags & ARM32_DMAMAP_COHERENT) { 943 if (!bouncing && (map->_dm_flags & _BUS_DMAMAP_COHERENT)) {
714 /* Drain the write buffer. */ 944 /* Drain the write buffer. */
715 cpu_drain_writebuf(); 945 cpu_drain_writebuf();
716 return; 946 return;
717 } 947 }
718 948
 949#ifdef _ARM32_NEED_BUS_DMA_BOUNCE
 950 if (bouncing && ((map->_dm_flags & _BUS_DMAMAP_COHERENT) || pre_ops == 0)) {
 951 goto bounce_it;
 952 }
 953#endif /* _ARM32_NEED_BUS_DMA_BOUNCE */
 954
719 /* 955 /*
720 * If the mapping belongs to a non-kernel vmspace, and the 956 * If the mapping belongs to a non-kernel vmspace, and the
721 * vmspace has not been active since the last time a full 957 * vmspace has not been active since the last time a full
722 * cache flush was performed, we don't need to do anything. 958 * cache flush was performed, we don't need to do anything.
723 */ 959 */
724 if (__predict_false(!VMSPACE_IS_KERNEL_P(map->_dm_vmspace) && 960 if (__predict_false(!VMSPACE_IS_KERNEL_P(map->_dm_vmspace) &&
725 vm_map_pmap(&map->_dm_vmspace->vm_map)->pm_cstate.cs_cache_d == 0)) 961 vm_map_pmap(&map->_dm_vmspace->vm_map)->pm_cstate.cs_cache_d == 0))
726 return; 962 return;
727 963
728 switch (map->_dm_buftype) { 964 int buftype = map->_dm_buftype;
729 case ARM32_BUFTYPE_LINEAR: 965#ifdef _ARM32_NEED_BUS_DMA_BOUNCE
 966 if (bouncing) {
 967 buftype = _BUS_DMA_BUFTYPE_LINEAR;
 968 }
 969#endif
 970
 971 switch (buftype) {
 972 case _BUS_DMA_BUFTYPE_LINEAR:
730 _bus_dmamap_sync_linear(t, map, offset, len, ops); 973 _bus_dmamap_sync_linear(t, map, offset, len, ops);
731 break; 974 break;
732 975
733 case ARM32_BUFTYPE_MBUF: 976 case _BUS_DMA_BUFTYPE_MBUF:
734 _bus_dmamap_sync_mbuf(t, map, offset, len, ops); 977 _bus_dmamap_sync_mbuf(t, map, offset, len, ops);
735 break; 978 break;
736 979
737 case ARM32_BUFTYPE_UIO: 980 case _BUS_DMA_BUFTYPE_UIO:
738 _bus_dmamap_sync_uio(t, map, offset, len, ops); 981 _bus_dmamap_sync_uio(t, map, offset, len, ops);
739 break; 982 break;
740 983
741 case ARM32_BUFTYPE_RAW: 984 case _BUS_DMA_BUFTYPE_RAW:
742 panic("_bus_dmamap_sync: ARM32_BUFTYPE_RAW"); 985 panic("_bus_dmamap_sync: _BUS_DMA_BUFTYPE_RAW");
743 break; 986 break;
744 987
745 case ARM32_BUFTYPE_INVALID: 988 case _BUS_DMA_BUFTYPE_INVALID:
746 panic("_bus_dmamap_sync: ARM32_BUFTYPE_INVALID"); 989 panic("_bus_dmamap_sync: _BUS_DMA_BUFTYPE_INVALID");
747 break; 990 break;
748 991
749 default: 992 default:
750 printf("unknown buffer type %d\n", map->_dm_buftype); 993 panic("_bus_dmamap_sync: map %p: unknown buffer type %d\n",
751 panic("_bus_dmamap_sync"); 994 map, map->_dm_buftype);
752 } 995 }
753 996
754 /* Drain the write buffer. */ 997 /* Drain the write buffer. */
755 cpu_drain_writebuf(); 998 cpu_drain_writebuf();
 999
 1000#ifdef _ARM32_NEED_BUS_DMA_BOUNCE
 1001 bounce_it:
 1002 if ((ops & BUS_DMASYNC_POSTREAD) == 0
 1003 || cookie == NULL
 1004 || (cookie->id_flags & _BUS_DMA_IS_BOUNCING) == 0)
 1005 return;
 1006
 1007 char * const dataptr = (char *)cookie->id_bouncebuf + offset;
 1008 STAT_INCR(read_bounces);
 1009 /*
 1010 * Copy the bounce buffer to the caller's buffer.
 1011 */
 1012 switch (map->_dm_buftype) {
 1013 case _BUS_DMA_BUFTYPE_LINEAR:
 1014 memcpy(cookie->id_origlinearbuf + offset, dataptr, len);
 1015 break;
 1016
 1017 case _BUS_DMA_BUFTYPE_MBUF:
 1018 m_copyback(cookie->id_origmbuf, offset, len, dataptr);
 1019 break;
 1020
 1021 case _BUS_DMA_BUFTYPE_UIO:
 1022 _bus_dma_uiomove(dataptr, cookie->id_origuio, len, UIO_READ);
 1023 break;
 1024#ifdef DIAGNOSTIC
 1025 case _BUS_DMA_BUFTYPE_RAW:
 1026 panic("_bus_dmamap_sync(post): _BUS_DMA_BUFTYPE_RAW");
 1027 break;
 1028
 1029 case _BUS_DMA_BUFTYPE_INVALID:
 1030 panic("_bus_dmamap_sync(post): _BUS_DMA_BUFTYPE_INVALID");
 1031 break;
 1032
 1033 default:
 1034 panic("_bus_dmamap_sync(post): map %p: unknown buffer type %d\n",
 1035 map, map->_dm_buftype);
 1036 break;
 1037#endif
 1038 }
 1039#endif /* _ARM32_NEED_BUS_DMA_BOUNCE */
756} 1040}
757 1041
758/* 1042/*
759 * Common function for DMA-safe memory allocation. May be called 1043 * Common function for DMA-safe memory allocation. May be called
760 * by bus-specific DMA memory allocation functions. 1044 * by bus-specific DMA memory allocation functions.
761 */ 1045 */
762 1046
763extern paddr_t physical_start; 1047extern paddr_t physical_start;
764extern paddr_t physical_end; 1048extern paddr_t physical_end;
765 1049
766int 1050int
767_bus_dmamem_alloc(bus_dma_tag_t t, bus_size_t size, bus_size_t alignment, 1051_bus_dmamem_alloc(bus_dma_tag_t t, bus_size_t size, bus_size_t alignment,
768 bus_size_t boundary, bus_dma_segment_t *segs, int nsegs, int *rsegs, 1052 bus_size_t boundary, bus_dma_segment_t *segs, int nsegs, int *rsegs,
@@ -999,51 +1283,51 @@ _bus_dmamap_load_buffer(bus_dma_tag_t t, @@ -999,51 +1283,51 @@ _bus_dmamap_load_buffer(bus_dma_tag_t t,
999 if (__predict_true(pmap == pmap_kernel())) { 1283 if (__predict_true(pmap == pmap_kernel())) {
1000 (void) pmap_get_pde_pte(pmap, vaddr, &pde, &ptep); 1284 (void) pmap_get_pde_pte(pmap, vaddr, &pde, &ptep);
1001 if (__predict_false(pmap_pde_section(pde))) { 1285 if (__predict_false(pmap_pde_section(pde))) {
1002 paddr_t s_frame = L1_S_FRAME; 1286 paddr_t s_frame = L1_S_FRAME;
1003 paddr_t s_offset = L1_S_OFFSET; 1287 paddr_t s_offset = L1_S_OFFSET;
1004#if (ARM_MMU_V6 + ARM_MMU_V7) > 0 1288#if (ARM_MMU_V6 + ARM_MMU_V7) > 0
1005 if (__predict_false(pmap_pde_supersection(pde))) { 1289 if (__predict_false(pmap_pde_supersection(pde))) {
1006 s_frame = L1_SS_FRAME; 1290 s_frame = L1_SS_FRAME;
1007 s_frame = L1_SS_OFFSET; 1291 s_frame = L1_SS_OFFSET;
1008} 1292}
1009#endif 1293#endif
1010 curaddr = (*pde & s_frame) | (vaddr & s_offset); 1294 curaddr = (*pde & s_frame) | (vaddr & s_offset);
1011 if (*pde & L1_S_CACHE_MASK) { 1295 if (*pde & L1_S_CACHE_MASK) {
1012 map->_dm_flags &= ~ARM32_DMAMAP_COHERENT; 1296 map->_dm_flags &= ~_BUS_DMAMAP_COHERENT;
1013 } 1297 }
1014 } else { 1298 } else {
1015 pte = *ptep; 1299 pte = *ptep;
1016 KDASSERT((pte & L2_TYPE_MASK) != L2_TYPE_INV); 1300 KDASSERT((pte & L2_TYPE_MASK) != L2_TYPE_INV);
1017 if (__predict_false((pte & L2_TYPE_MASK) 1301 if (__predict_false((pte & L2_TYPE_MASK)
1018 == L2_TYPE_L)) { 1302 == L2_TYPE_L)) {
1019 curaddr = (pte & L2_L_FRAME) | 1303 curaddr = (pte & L2_L_FRAME) |
1020 (vaddr & L2_L_OFFSET); 1304 (vaddr & L2_L_OFFSET);
1021 if (pte & L2_L_CACHE_MASK) { 1305 if (pte & L2_L_CACHE_MASK) {
1022 map->_dm_flags &= 1306 map->_dm_flags &=
1023 ~ARM32_DMAMAP_COHERENT; 1307 ~_BUS_DMAMAP_COHERENT;
1024 } 1308 }
1025 } else { 1309 } else {
1026 curaddr = (pte & L2_S_FRAME) | 1310 curaddr = (pte & L2_S_FRAME) |
1027 (vaddr & L2_S_OFFSET); 1311 (vaddr & L2_S_OFFSET);
1028 if (pte & L2_S_CACHE_MASK) { 1312 if (pte & L2_S_CACHE_MASK) {
1029 map->_dm_flags &= 1313 map->_dm_flags &=
1030 ~ARM32_DMAMAP_COHERENT; 1314 ~_BUS_DMAMAP_COHERENT;
1031 } 1315 }
1032 } 1316 }
1033 } 1317 }
1034 } else { 1318 } else {
1035 (void) pmap_extract(pmap, vaddr, &curaddr); 1319 (void) pmap_extract(pmap, vaddr, &curaddr);
1036 map->_dm_flags &= ~ARM32_DMAMAP_COHERENT; 1320 map->_dm_flags &= ~_BUS_DMAMAP_COHERENT;
1037 } 1321 }
1038 1322
1039 /* 1323 /*
1040 * Compute the segment size, and adjust counts. 1324 * Compute the segment size, and adjust counts.
1041 */ 1325 */
1042 sgsize = PAGE_SIZE - ((u_long)vaddr & PGOFSET); 1326 sgsize = PAGE_SIZE - ((u_long)vaddr & PGOFSET);
1043 if (buflen < sgsize) 1327 if (buflen < sgsize)
1044 sgsize = buflen; 1328 sgsize = buflen;
1045 1329
1046 error = _bus_dmamap_load_paddr(t, map, curaddr, sgsize); 1330 error = _bus_dmamap_load_paddr(t, map, curaddr, sgsize);
1047 if (error) 1331 if (error)
1048 return (error); 1332 return (error);
1049 1333
@@ -1153,13 +1437,199 @@ arm32_dma_range_intersect(struct arm32_d @@ -1153,13 +1437,199 @@ arm32_dma_range_intersect(struct arm32_d
1153 /* 1437 /*
1154 * End of region intersects with this range. 1438 * End of region intersects with this range.
1155 */ 1439 */
1156 *pap = trunc_page(dr->dr_sysbase); 1440 *pap = trunc_page(dr->dr_sysbase);
1157 *sizep = round_page(min((pa + size) - dr->dr_sysbase, 1441 *sizep = round_page(min((pa + size) - dr->dr_sysbase,
1158 dr->dr_len)); 1442 dr->dr_len));
1159 return (1); 1443 return (1);
1160 } 1444 }
1161 } 1445 }
1162 1446
1163 /* No intersection found. */ 1447 /* No intersection found. */
1164 return (0); 1448 return (0);
1165} 1449}
 1450
 1451#ifdef _ARM32_NEED_BUS_DMA_BOUNCE
 1452static int
 1453_bus_dma_alloc_bouncebuf(bus_dma_tag_t t, bus_dmamap_t map,
 1454 bus_size_t size, int flags)
 1455{
 1456 struct arm32_bus_dma_cookie *cookie = map->_dm_cookie;
 1457 int error = 0;
 1458
 1459#ifdef DIAGNOSTIC
 1460 if (cookie == NULL)
 1461 panic("_bus_dma_alloc_bouncebuf: no cookie");
 1462#endif
 1463
 1464 cookie->id_bouncebuflen = round_page(size);
 1465 error = _bus_dmamem_alloc(t, cookie->id_bouncebuflen,
 1466 PAGE_SIZE, map->_dm_boundary, cookie->id_bouncesegs,
 1467 map->_dm_segcnt, &cookie->id_nbouncesegs, flags);
 1468 if (error)
 1469 goto out;
 1470 error = _bus_dmamem_map(t, cookie->id_bouncesegs,
 1471 cookie->id_nbouncesegs, cookie->id_bouncebuflen,
 1472 (void **)&cookie->id_bouncebuf, flags);
 1473
 1474 out:
 1475 if (error) {
 1476 _bus_dmamem_free(t, cookie->id_bouncesegs,
 1477 cookie->id_nbouncesegs);
 1478 cookie->id_bouncebuflen = 0;
 1479 cookie->id_nbouncesegs = 0;
 1480 } else {
 1481 cookie->id_flags |= _BUS_DMA_HAS_BOUNCE;
 1482 }
 1483
 1484 return (error);
 1485}
 1486
 1487static void
 1488_bus_dma_free_bouncebuf(bus_dma_tag_t t, bus_dmamap_t map)
 1489{
 1490 struct arm32_bus_dma_cookie *cookie = map->_dm_cookie;
 1491
 1492#ifdef DIAGNOSTIC
 1493 if (cookie == NULL)
 1494 panic("_bus_dma_alloc_bouncebuf: no cookie");
 1495#endif
 1496
 1497 _bus_dmamem_unmap(t, cookie->id_bouncebuf, cookie->id_bouncebuflen);
 1498 _bus_dmamem_free(t, cookie->id_bouncesegs,
 1499 cookie->id_nbouncesegs);
 1500 cookie->id_bouncebuflen = 0;
 1501 cookie->id_nbouncesegs = 0;
 1502 cookie->id_flags &= ~_BUS_DMA_HAS_BOUNCE;
 1503}
 1504
 1505/*
 1506 * This function does the same as uiomove, but takes an explicit
 1507 * direction, and does not update the uio structure.
 1508 */
 1509static int
 1510_bus_dma_uiomove(void *buf, struct uio *uio, size_t n, int direction)
 1511{
 1512 struct iovec *iov;
 1513 int error;
 1514 struct vmspace *vm;
 1515 char *cp;
 1516 size_t resid, cnt;
 1517 int i;
 1518
 1519 iov = uio->uio_iov;
 1520 vm = uio->uio_vmspace;
 1521 cp = buf;
 1522 resid = n;
 1523
 1524 for (i = 0; i < uio->uio_iovcnt && resid > 0; i++) {
 1525 iov = &uio->uio_iov[i];
 1526 if (iov->iov_len == 0)
 1527 continue;
 1528 cnt = MIN(resid, iov->iov_len);
 1529
 1530 if (!VMSPACE_IS_KERNEL_P(vm) &&
 1531 (curlwp->l_cpu->ci_schedstate.spc_flags & SPCF_SHOULDYIELD)
 1532 != 0) {
 1533 preempt();
 1534 }
 1535 if (direction == UIO_READ) {
 1536 error = copyout_vmspace(vm, cp, iov->iov_base, cnt);
 1537 } else {
 1538 error = copyin_vmspace(vm, iov->iov_base, cp, cnt);
 1539 }
 1540 if (error)
 1541 return (error);
 1542 cp += cnt;
 1543 resid -= cnt;
 1544 }
 1545 return (0);
 1546}
 1547#endif /* _ARM32_NEED_BUS_DMA_BOUNCE */
 1548
 1549int
 1550_bus_dmatag_subregion(bus_dma_tag_t tag, bus_addr_t min_addr,
 1551 bus_addr_t max_addr, bus_dma_tag_t *newtag, int flags)
 1552{
 1553
 1554#ifdef _ARM32_NEED_BUS_DMA_BOUNCE
 1555 struct arm32_dma_range *dr;
 1556 bool subset = false;
 1557 size_t nranges = 0;
 1558 size_t i;
 1559 for (i = 0, dr = tag->_ranges; i < tag->_nranges; i++, dr++) {
 1560 if (dr->dr_sysbase <= min_addr
 1561 && max_addr <= dr->dr_sysbase + dr->dr_len - 1) {
 1562 subset = true;
 1563 }
 1564 if (min_addr <= dr->dr_sysbase + dr->dr_len
 1565 && max_addr >= dr->dr_sysbase) {
 1566 nranges++;
 1567 }
 1568 }
 1569 if (subset) {
 1570 *newtag = tag;
 1571 /* if the tag must be freed, add a reference */
 1572 if (tag->_tag_needs_free)
 1573 (tag->_tag_needs_free)++;
 1574 return 0;
 1575 }
 1576 if (nranges == 0) {
 1577 nranges = 1;
 1578 }
 1579
 1580 size_t mallocsize = sizeof(*tag) + nranges * sizeof(*dr);
 1581 if ((*newtag = malloc(mallocsize, M_DMAMAP,
 1582 (flags & BUS_DMA_NOWAIT) ? M_NOWAIT : M_WAITOK)) == NULL)
 1583 return ENOMEM;
 1584
 1585 dr = (void *)(*newtag + 1);
 1586 **newtag = *tag;
 1587 (*newtag)->_tag_needs_free = 1;
 1588 (*newtag)->_ranges = dr;
 1589 (*newtag)->_nranges = nranges;
 1590
 1591 if (tag->_ranges == NULL) {
 1592 dr->dr_sysbase = min_addr;
 1593 dr->dr_busbase = min_addr;
 1594 dr->dr_len = max_addr + 1 - min_addr;
 1595 } else {
 1596 for (i = 0; i < nranges; i++) {
 1597 if (min_addr > dr->dr_sysbase + dr->dr_len
 1598 || max_addr < dr->dr_sysbase)
 1599 continue;
 1600 dr[0] = tag->_ranges[i];
 1601 if (dr->dr_sysbase < min_addr) {
 1602 psize_t diff = min_addr - dr->dr_sysbase;
 1603 dr->dr_busbase += diff;
 1604 dr->dr_len -= diff;
 1605 dr->dr_sysbase += diff;
 1606 }
 1607 if (max_addr != 0xffffffff
 1608 && max_addr + 1 < dr->dr_sysbase + dr->dr_len) {
 1609 dr->dr_len = max_addr + 1 - dr->dr_sysbase;
 1610 }
 1611 dr++;
 1612 }
 1613 }
 1614
 1615 return 0;
 1616#else
 1617 return EOPNOTSUPP;
 1618#endif /* _ARM32_NEED_BUS_DMA_BOUNCE */
 1619}
 1620
 1621void
 1622_bus_dmatag_destroy(bus_dma_tag_t tag)
 1623{
 1624#ifdef _ARM32_NEED_BUS_DMA_BOUNCE
 1625 switch (tag->_tag_needs_free) {
 1626 case 0:
 1627 break; /* not allocated with malloc */
 1628 case 1:
 1629 free(tag, M_DMAMAP); /* last reference to tag */
 1630 break;
 1631 default:
 1632 (tag->_tag_needs_free)--; /* one less reference */
 1633 }
 1634#endif
 1635}

cvs diff -r1.4 -r1.5 src/sys/arch/arm/at91/at91_bus_dma.c (expand / switch to unified diff)

--- src/sys/arch/arm/at91/at91_bus_dma.c 2011/07/01 19:31:16 1.4
+++ src/sys/arch/arm/at91/at91_bus_dma.c 2012/09/18 05:47:27 1.5
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: at91_bus_dma.c,v 1.4 2011/07/01 19:31:16 dyoung Exp $ */ 1/* $NetBSD: at91_bus_dma.c,v 1.5 2012/09/18 05:47:27 matt Exp $ */
2 2
3/* 3/*
4 * Copyright (c) 2004 Jesse Off 4 * Copyright (c) 2004 Jesse Off
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * Redistribution and use in source and binary forms, with or without 7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions 8 * modification, are permitted provided that the following conditions
9 * are met: 9 * are met:
10 * 1. Redistributions of source code must retain the above copyright 10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer. 11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright 12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the 13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution. 14 * documentation and/or other materials provided with the distribution.
@@ -23,48 +23,31 @@ @@ -23,48 +23,31 @@
23 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 23 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
24 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 24 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
25 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 25 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
27 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * SUCH DAMAGE. 28 * SUCH DAMAGE.
29 */ 29 */
30 30
31/* 31/*
32 * bus_dma tag for EP93xx CPUs 32 * bus_dma tag for EP93xx CPUs
33 */ 33 */
34 34
35#include <sys/cdefs.h> 35#include <sys/cdefs.h>
36__KERNEL_RCSID(0, "$NetBSD: at91_bus_dma.c,v 1.4 2011/07/01 19:31:16 dyoung Exp $"); 36__KERNEL_RCSID(0, "$NetBSD: at91_bus_dma.c,v 1.5 2012/09/18 05:47:27 matt Exp $");
37 37
38#include <sys/param.h> 38#include <sys/param.h>
39#include <sys/types.h> 39#include <sys/types.h>
40#include <sys/device.h> 40#include <sys/device.h>
41#include <sys/systm.h> 41#include <sys/systm.h>
42#include <sys/extent.h> 42#include <sys/extent.h>
43 43
44#define _ARM32_BUS_DMA_PRIVATE 44#define _ARM32_BUS_DMA_PRIVATE
45#include <sys/bus.h> 45#include <sys/bus.h>
46 46
47#include <arm/at91/at91var.h> 47#include <arm/at91/at91var.h>
48 48
49struct arm32_bus_dma_tag at91_bd_tag = { 49struct arm32_bus_dma_tag at91_bd_tag = {
50 NULL, /* _ranges: set by platform specific routine */ 50 _BUS_DMAMAP_FUNCS,
51 0, /* _nranges */ 51 _BUS_DMAMEM_FUNCS,
52 52 _BUS_DMAMAP_FUNCS,
53 NULL, /* _cookie */ 
54 
55 _bus_dmamap_create, 
56 _bus_dmamap_destroy, 
57 _bus_dmamap_load, 
58 _bus_dmamap_load_mbuf, 
59 _bus_dmamap_load_uio, 
60 _bus_dmamap_load_raw, 
61 _bus_dmamap_unload, 
62 _bus_dmamap_sync, 
63 NULL, /* sync_post */ 
64 
65 _bus_dmamem_alloc, 
66 _bus_dmamem_free, 
67 _bus_dmamem_map, 
68 _bus_dmamem_unmap, 
69 _bus_dmamem_mmap, 
70}; 53};

cvs diff -r1.1 -r1.2 src/sys/arch/arm/broadcom/bcm2835_dma.c (expand / switch to unified diff)

--- src/sys/arch/arm/broadcom/bcm2835_dma.c 2012/07/26 06:21:57 1.1
+++ src/sys/arch/arm/broadcom/bcm2835_dma.c 2012/09/18 05:47:27 1.2
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: bcm2835_dma.c,v 1.1 2012/07/26 06:21:57 skrll Exp $ */ 1/* $NetBSD: bcm2835_dma.c,v 1.2 2012/09/18 05:47:27 matt Exp $ */
2 2
3/*- 3/*-
4 * Copyright (c) 2012 The NetBSD Foundation, Inc. 4 * Copyright (c) 2012 The NetBSD Foundation, Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * This code is derived from software contributed to The NetBSD Foundation 7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Nick Hudson 8 * by Nick Hudson
9 * 9 *
10 * Redistribution and use in source and binary forms, with or without 10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions 11 * modification, are permitted provided that the following conditions
12 * are met: 12 * are met:
13 * 1. Redistributions of source code must retain the above copyright 13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer. 14 * notice, this list of conditions and the following disclaimer.
@@ -20,42 +20,25 @@ @@ -20,42 +20,25 @@
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE. 29 * POSSIBILITY OF SUCH DAMAGE.
30 */ 30 */
31 31
32#include <sys/cdefs.h> 32#include <sys/cdefs.h>
33__KERNEL_RCSID(0, "$NetBSD: bcm2835_dma.c,v 1.1 2012/07/26 06:21:57 skrll Exp $"); 33__KERNEL_RCSID(0, "$NetBSD: bcm2835_dma.c,v 1.2 2012/09/18 05:47:27 matt Exp $");
34 34
35#define _ARM32_BUS_DMA_PRIVATE 35#define _ARM32_BUS_DMA_PRIVATE
36 36
37#include <sys/param.h> 37#include <sys/param.h>
38#include <sys/bus.h> 38#include <sys/bus.h>
39 39
40struct arm32_bus_dma_tag bcm2835_bus_dma_tag = { 40struct arm32_bus_dma_tag bcm2835_bus_dma_tag = {
41 NULL, /* _ranges: set by platform specific routine */ 41 _BUS_DMAMAP_FUNCS,
42 0, /* _nranges */ 42 _BUS_DMAMEM_FUNCS,
43 43 _BUS_DMATAG_FUNCS,
44 NULL, /* _cookie */ 
45 
46 _bus_dmamap_create, 
47 _bus_dmamap_destroy, 
48 _bus_dmamap_load, 
49 _bus_dmamap_load_mbuf, 
50 _bus_dmamap_load_uio, 
51 _bus_dmamap_load_raw, 
52 _bus_dmamap_unload, 
53 _bus_dmamap_sync, 
54 NULL, /* sync_post */ 
55 
56 _bus_dmamem_alloc, 
57 _bus_dmamem_free, 
58 _bus_dmamem_map, 
59 _bus_dmamem_unmap, 
60 _bus_dmamem_mmap, 
61}; 44};

cvs diff -r1.2 -r1.3 src/sys/arch/arm/broadcom/bcm53xx_board.c (expand / switch to unified diff)

--- src/sys/arch/arm/broadcom/bcm53xx_board.c 2012/09/07 11:52:30 1.2
+++ src/sys/arch/arm/broadcom/bcm53xx_board.c 2012/09/18 05:47:27 1.3
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: bcm53xx_board.c,v 1.2 2012/09/07 11:52:30 matt Exp $ */ 1/* $NetBSD: bcm53xx_board.c,v 1.3 2012/09/18 05:47:27 matt Exp $ */
2/*- 2/*-
3 * Copyright (c) 2012 The NetBSD Foundation, Inc. 3 * Copyright (c) 2012 The NetBSD Foundation, Inc.
4 * All rights reserved. 4 * All rights reserved.
5 * 5 *
6 * This code is derived from software contributed to The NetBSD Foundation 6 * This code is derived from software contributed to The NetBSD Foundation
7 * by Matt Thomas of 3am Software Foundry. 7 * by Matt Thomas of 3am Software Foundry.
8 * 8 *
9 * Redistribution and use in source and binary forms, with or without 9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions 10 * modification, are permitted provided that the following conditions
11 * are met: 11 * are met:
12 * 1. Redistributions of source code must retain the above copyright 12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer. 13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright 14 * 2. Redistributions in binary form must reproduce the above copyright
@@ -24,27 +24,27 @@ @@ -24,27 +24,27 @@
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE. 28 * POSSIBILITY OF SUCH DAMAGE.
29 */ 29 */
30 30
31#include "opt_broadcom.h" 31#include "opt_broadcom.h"
32 32
33#define _ARM32_BUS_DMA_PRIVATE 33#define _ARM32_BUS_DMA_PRIVATE
34 34
35#include <sys/cdefs.h> 35#include <sys/cdefs.h>
36 36
37__KERNEL_RCSID(1, "$NetBSD: bcm53xx_board.c,v 1.2 2012/09/07 11:52:30 matt Exp $"); 37__KERNEL_RCSID(1, "$NetBSD: bcm53xx_board.c,v 1.3 2012/09/18 05:47:27 matt Exp $");
38 38
39#include <sys/param.h> 39#include <sys/param.h>
40#include <sys/bus.h> 40#include <sys/bus.h>
41#include <sys/cpu.h> 41#include <sys/cpu.h>
42#include <sys/device.h> 42#include <sys/device.h>
43 43
44#include <prop/proplib.h> 44#include <prop/proplib.h>
45 45
46#define CRU_PRIVATE 46#define CRU_PRIVATE
47#define DDR_PRIVATE 47#define DDR_PRIVATE
48#define DMU_PRIVATE 48#define DMU_PRIVATE
49#define ARMCORE_PRIVATE 49#define ARMCORE_PRIVATE
50 50
@@ -54,40 +54,29 @@ __KERNEL_RCSID(1, "$NetBSD: bcm53xx_boar @@ -54,40 +54,29 @@ __KERNEL_RCSID(1, "$NetBSD: bcm53xx_boar
54 54
55#include <arm/broadcom/bcm53xx_reg.h> 55#include <arm/broadcom/bcm53xx_reg.h>
56#include <arm/broadcom/bcm53xx_var.h> 56#include <arm/broadcom/bcm53xx_var.h>
57 57
58bus_space_tag_t bcm53xx_ioreg_bst = &bcmgen_bs_tag; 58bus_space_tag_t bcm53xx_ioreg_bst = &bcmgen_bs_tag;
59bus_space_handle_t bcm53xx_ioreg_bsh; 59bus_space_handle_t bcm53xx_ioreg_bsh;
60bus_space_tag_t bcm53xx_armcore_bst = &bcmgen_bs_tag; 60bus_space_tag_t bcm53xx_armcore_bst = &bcmgen_bs_tag;
61bus_space_handle_t bcm53xx_armcore_bsh; 61bus_space_handle_t bcm53xx_armcore_bsh;
62 62
63static struct cpu_softc cpu_softc; 63static struct cpu_softc cpu_softc;
64static struct bcm53xx_clock_info clk_info; 64static struct bcm53xx_clock_info clk_info;
65 65
66struct arm32_bus_dma_tag bcm53xx_dma_tag = { 66struct arm32_bus_dma_tag bcm53xx_dma_tag = {
67 ._dmamap_create = _bus_dmamap_create, 67 _BUS_DMAMAP_FUNCS,
68 ._dmamap_destroy = _bus_dmamap_destroy, 68 _BUS_DMAMEM_FUNCS,
69 ._dmamap_load = _bus_dmamap_load, 69 _BUS_DMATAG_FUNCS,
70 ._dmamap_load_mbuf = _bus_dmamap_load_mbuf, 
71 ._dmamap_load_uio = _bus_dmamap_load_uio, 
72 ._dmamap_load_raw = _bus_dmamap_load_raw, 
73 ._dmamap_unload = _bus_dmamap_unload, 
74 ._dmamap_sync_pre = _bus_dmamap_sync, 
75 ._dmamap_sync_post = NULL, 
76 ._dmamem_alloc = _bus_dmamem_alloc, 
77 ._dmamem_free = _bus_dmamem_free, 
78 ._dmamem_map = _bus_dmamem_map, 
79 ._dmamem_unmap = _bus_dmamem_unmap, 
80 ._dmamem_mmap = _bus_dmamem_mmap 
81}; 70};
82 71
83#ifdef BCM53XX_CONSOLE_EARLY 72#ifdef BCM53XX_CONSOLE_EARLY
84#include <dev/ic/ns16550reg.h> 73#include <dev/ic/ns16550reg.h>
85#include <dev/ic/comreg.h> 74#include <dev/ic/comreg.h>
86#include <dev/cons.h> 75#include <dev/cons.h>
87 76
88static vaddr_t com_base; 77static vaddr_t com_base;
89 78
90static inline uint32_t 79static inline uint32_t
91uart_read(bus_size_t o) 80uart_read(bus_size_t o)
92{ 81{
93 return *(volatile uint8_t *)(com_base + o); 82 return *(volatile uint8_t *)(com_base + o);

cvs diff -r1.4 -r1.5 src/sys/arch/arm/ep93xx/ep93xx_busdma.c (expand / switch to unified diff)

--- src/sys/arch/arm/ep93xx/ep93xx_busdma.c 2011/07/01 19:31:17 1.4
+++ src/sys/arch/arm/ep93xx/ep93xx_busdma.c 2012/09/18 05:47:27 1.5
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: ep93xx_busdma.c,v 1.4 2011/07/01 19:31:17 dyoung Exp $ */ 1/* $NetBSD: ep93xx_busdma.c,v 1.5 2012/09/18 05:47:27 matt Exp $ */
2 2
3/* 3/*
4 * Copyright (c) 2004 Jesse Off 4 * Copyright (c) 2004 Jesse Off
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * Redistribution and use in source and binary forms, with or without 7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions 8 * modification, are permitted provided that the following conditions
9 * are met: 9 * are met:
10 * 1. Redistributions of source code must retain the above copyright 10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer. 11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright 12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the 13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution. 14 * documentation and/or other materials provided with the distribution.
@@ -23,48 +23,31 @@ @@ -23,48 +23,31 @@
23 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 23 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
24 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 24 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
25 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 25 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
27 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * SUCH DAMAGE. 28 * SUCH DAMAGE.
29 */ 29 */
30 30
31/* 31/*
32 * bus_dma tag for EP93xx CPUs 32 * bus_dma tag for EP93xx CPUs
33 */ 33 */
34 34
35#include <sys/cdefs.h> 35#include <sys/cdefs.h>
36__KERNEL_RCSID(0, "$NetBSD: ep93xx_busdma.c,v 1.4 2011/07/01 19:31:17 dyoung Exp $"); 36__KERNEL_RCSID(0, "$NetBSD: ep93xx_busdma.c,v 1.5 2012/09/18 05:47:27 matt Exp $");
37 37
38#include <sys/param.h> 38#include <sys/param.h>
39#include <sys/types.h> 39#include <sys/types.h>
40#include <sys/device.h> 40#include <sys/device.h>
41#include <sys/systm.h> 41#include <sys/systm.h>
42#include <sys/extent.h> 42#include <sys/extent.h>
43 43
44#define _ARM32_BUS_DMA_PRIVATE 44#define _ARM32_BUS_DMA_PRIVATE
45#include <sys/bus.h> 45#include <sys/bus.h>
46 46
47#include <arm/ep93xx/ep93xxvar.h> 47#include <arm/ep93xx/ep93xxvar.h>
48 48
49struct arm32_bus_dma_tag ep93xx_bus_dma = { 49struct arm32_bus_dma_tag ep93xx_bus_dma = {
50 NULL, /* _ranges: set by platform specific routine */ 50 _BUS_DMAMAP_FUNCS,
51 0, /* _nranges */ 51 _BUS_DMAMEM_FUNCS,
52 52 _BUS_DMATAG_FUNCS,
53 NULL, /* _cookie */ 
54 
55 _bus_dmamap_create, 
56 _bus_dmamap_destroy, 
57 _bus_dmamap_load, 
58 _bus_dmamap_load_mbuf, 
59 _bus_dmamap_load_uio, 
60 _bus_dmamap_load_raw, 
61 _bus_dmamap_unload, 
62 _bus_dmamap_sync, 
63 NULL, /* sync_post */ 
64 
65 _bus_dmamem_alloc, 
66 _bus_dmamem_free, 
67 _bus_dmamem_map, 
68 _bus_dmamem_unmap, 
69 _bus_dmamem_mmap, 
70}; 53};

cvs diff -r1.22 -r1.23 src/sys/arch/arm/footbridge/footbridge_pci.c (expand / switch to unified diff)

--- src/sys/arch/arm/footbridge/footbridge_pci.c 2012/02/12 16:34:07 1.22
+++ src/sys/arch/arm/footbridge/footbridge_pci.c 2012/09/18 05:47:27 1.23
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: footbridge_pci.c,v 1.22 2012/02/12 16:34:07 matt Exp $ */ 1/* $NetBSD: footbridge_pci.c,v 1.23 2012/09/18 05:47:27 matt Exp $ */
2 2
3/* 3/*
4 * Copyright (c) 1997,1998 Mark Brinicombe. 4 * Copyright (c) 1997,1998 Mark Brinicombe.
5 * Copyright (c) 1997,1998 Causality Limited 5 * Copyright (c) 1997,1998 Causality Limited
6 * All rights reserved. 6 * All rights reserved.
7 * 7 *
8 * Redistribution and use in source and binary forms, with or without 8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions 9 * modification, are permitted provided that the following conditions
10 * are met: 10 * are met:
11 * 1. Redistributions of source code must retain the above copyright 11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer. 12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright 13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the 14 * notice, this list of conditions and the following disclaimer in the
@@ -25,27 +25,27 @@ @@ -25,27 +25,27 @@
25 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 25 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
26 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 26 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
27 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 27 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
28 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 28 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
29 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 29 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 * SUCH DAMAGE. 34 * SUCH DAMAGE.
35 */ 35 */
36 36
37#include <sys/cdefs.h> 37#include <sys/cdefs.h>
38__KERNEL_RCSID(0, "$NetBSD: footbridge_pci.c,v 1.22 2012/02/12 16:34:07 matt Exp $"); 38__KERNEL_RCSID(0, "$NetBSD: footbridge_pci.c,v 1.23 2012/09/18 05:47:27 matt Exp $");
39 39
40#include <sys/param.h> 40#include <sys/param.h>
41#include <sys/systm.h> 41#include <sys/systm.h>
42#include <sys/conf.h> 42#include <sys/conf.h>
43#include <sys/malloc.h> 43#include <sys/malloc.h>
44#include <sys/device.h> 44#include <sys/device.h>
45 45
46#define _ARM32_BUS_DMA_PRIVATE 46#define _ARM32_BUS_DMA_PRIVATE
47#include <sys/bus.h> 47#include <sys/bus.h>
48#include <machine/intr.h> 48#include <machine/intr.h>
49 49
50#include <dev/pci/pcireg.h> 50#include <dev/pci/pcireg.h>
51#include <dev/pci/pcivar.h> 51#include <dev/pci/pcivar.h>
@@ -92,43 +92,31 @@ struct arm32_pci_chipset footbridge_pci_ @@ -92,43 +92,31 @@ struct arm32_pci_chipset footbridge_pci_
92 footbridge_pci_intr_string, 92 footbridge_pci_intr_string,
93 footbridge_pci_intr_evcnt, 93 footbridge_pci_intr_evcnt,
94 footbridge_pci_intr_establish, 94 footbridge_pci_intr_establish,
95 footbridge_pci_intr_disestablish 95 footbridge_pci_intr_disestablish
96}; 96};
97 97
98struct arm32_dma_range footbridge_dma_ranges[1]; 98struct arm32_dma_range footbridge_dma_ranges[1];
99 99
100/* 100/*
101 * PCI doesn't have any special needs; just use the generic versions 101 * PCI doesn't have any special needs; just use the generic versions
102 * of these functions. 102 * of these functions.
103 */ 103 */
104struct arm32_bus_dma_tag footbridge_pci_bus_dma_tag = { 104struct arm32_bus_dma_tag footbridge_pci_bus_dma_tag = {
105 footbridge_dma_ranges, 105 ._ranges = footbridge_dma_ranges,
106 1, 106 ._nranges = 1,
107 NULL, 107 _BUS_DMAMAP_FUNCS,
108 _bus_dmamap_create,  108 _BUS_DMAMEM_FUNCS,
109 _bus_dmamap_destroy, 109 _BUS_DMATAG_FUNCS,
110 _bus_dmamap_load, 
111 _bus_dmamap_load_mbuf, 
112 _bus_dmamap_load_uio, 
113 _bus_dmamap_load_raw, 
114 _bus_dmamap_unload, 
115 _bus_dmamap_sync, /* pre */ 
116 NULL, /* post */ 
117 _bus_dmamem_alloc, 
118 _bus_dmamem_free, 
119 _bus_dmamem_map, 
120 _bus_dmamem_unmap, 
121 _bus_dmamem_mmap, 
122}; 110};
123 111
124/* 112/*
125 * Currently we only support 12 devices as we select directly in the 113 * Currently we only support 12 devices as we select directly in the
126 * type 0 config cycle 114 * type 0 config cycle
127 * (See conf_{read,write} for more detail 115 * (See conf_{read,write} for more detail
128 */ 116 */
129#define MAX_PCI_DEVICES 21 117#define MAX_PCI_DEVICES 21
130 118
131/*static int 119/*static int
132pci_intr(void *arg) 120pci_intr(void *arg)
133{ 121{
134 printf("pci int %x\n", (int)arg); 122 printf("pci int %x\n", (int)arg);

cvs diff -r1.2 -r1.3 src/sys/arch/arm/gemini/gemini_dma.c (expand / switch to unified diff)

--- src/sys/arch/arm/gemini/gemini_dma.c 2011/07/01 19:32:28 1.2
+++ src/sys/arch/arm/gemini/gemini_dma.c 2012/09/18 05:47:27 1.3
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: gemini_dma.c,v 1.2 2011/07/01 19:32:28 dyoung Exp $ */ 1/* $NetBSD: gemini_dma.c,v 1.3 2012/09/18 05:47:27 matt Exp $ */
2 2
3/* adapted from: 3/* adapted from:
4 * NetBSD: pxa2x0_dma.c,v 1.4 2005/12/11 12:16:51 christos Exp 4 * NetBSD: pxa2x0_dma.c,v 1.4 2005/12/11 12:16:51 christos Exp
5 */ 5 */
6 6
7/* 7/*
8 * Copyright (c) 2002 Genetec Corporation. All rights reserved. 8 * Copyright (c) 2002 Genetec Corporation. All rights reserved.
9 * Written by Hiroyuki Bessho for Genetec Corporation. 9 * Written by Hiroyuki Bessho for Genetec Corporation.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions 12 * modification, are permitted provided that the following conditions
13 * are met: 13 * are met:
14 * 1. Redistributions of source code must retain the above copyright 14 * 1. Redistributions of source code must retain the above copyright
@@ -33,46 +33,32 @@ @@ -33,46 +33,32 @@
33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGE. 37 * POSSIBILITY OF SUCH DAMAGE.
38 */ 38 */
39 39
40/* 40/*
41 * bus dma tag for PXA2[15]0 processor. 41 * bus dma tag for PXA2[15]0 processor.
42 * (Currently used only for LCD frame buffer) 42 * (Currently used only for LCD frame buffer)
43 */ 43 */
44 44
45#include <sys/cdefs.h> 45#include <sys/cdefs.h>
46__KERNEL_RCSID(0, "$NetBSD: gemini_dma.c,v 1.2 2011/07/01 19:32:28 dyoung Exp $"); 46__KERNEL_RCSID(0, "$NetBSD: gemini_dma.c,v 1.3 2012/09/18 05:47:27 matt Exp $");
47 47
48#include <sys/param.h> 48#include <sys/param.h>
49#include <sys/systm.h> 49#include <sys/systm.h>
50#include <sys/device.h> 50#include <sys/device.h>
51#include <sys/malloc.h> 51#include <sys/malloc.h>
52#include <sys/mbuf.h> 52#include <sys/mbuf.h>
53 53
54#include <uvm/uvm_extern.h> 54#include <uvm/uvm_extern.h>
55 55
56#define _ARM32_BUS_DMA_PRIVATE 56#define _ARM32_BUS_DMA_PRIVATE
57#include <sys/bus.h> 57#include <sys/bus.h>
58 58
59struct arm32_bus_dma_tag gemini_bus_dma_tag = { 59struct arm32_bus_dma_tag gemini_bus_dma_tag = {
60 0, 60 _BUS_DMAMAP_FUNCS,
61 0, 61 _BUS_DMAMEM_FUNCS,
62 NULL, /* _cookie */ 62 _BUS_DMATAG_FUNCS,
63 _bus_dmamap_create, 
64 _bus_dmamap_destroy, 
65 _bus_dmamap_load, 
66 _bus_dmamap_load_mbuf, 
67 _bus_dmamap_load_uio, 
68 _bus_dmamap_load_raw, 
69 _bus_dmamap_unload, 
70 _bus_dmamap_sync, 
71 NULL, /* sync_post */ 
72 _bus_dmamem_alloc, 
73 _bus_dmamem_free, 
74 _bus_dmamem_map, 
75 _bus_dmamem_unmap, 
76 _bus_dmamem_mmap 
77}; 63};
78 64

cvs diff -r1.2 -r1.3 src/sys/arch/arm/imx/imx_dma.c (expand / switch to unified diff)

--- src/sys/arch/arm/imx/imx_dma.c 2011/07/01 20:27:50 1.2
+++ src/sys/arch/arm/imx/imx_dma.c 2012/09/18 05:47:27 1.3
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: imx_dma.c,v 1.2 2011/07/01 20:27:50 dyoung Exp $ */ 1/* $NetBSD: imx_dma.c,v 1.3 2012/09/18 05:47:27 matt Exp $ */
2 2
3/* 3/*
4 * Copyright (c) 2009 Genetec Corporation. All rights reserved. 4 * Copyright (c) 2009 Genetec Corporation. All rights reserved.
5 * Written by Hashimoto Kenichi for Genetec Corporation. 5 * Written by Hashimoto Kenichi for Genetec Corporation.
6 * 6 *
7 * Redistribution and use in source and binary forms, with or without 7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions 8 * modification, are permitted provided that the following conditions
9 * are met: 9 * are met:
10 * 1. Redistributions of source code must retain the above copyright 10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer. 11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright 12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the 13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution. 14 * documentation and/or other materials provided with the distribution.
@@ -22,46 +22,32 @@ @@ -22,46 +22,32 @@
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26 * POSSIBILITY OF SUCH DAMAGE. 26 * POSSIBILITY OF SUCH DAMAGE.
27 */ 27 */
28 28
29/* 29/*
30 * bus dma tag for i.MX31 processor. 30 * bus dma tag for i.MX31 processor.
31 * (Currently used only for LCD frame buffer) 31 * (Currently used only for LCD frame buffer)
32 */ 32 */
33 33
34#include <sys/cdefs.h> 34#include <sys/cdefs.h>
35__KERNEL_RCSID(0, "$NetBSD: imx_dma.c,v 1.2 2011/07/01 20:27:50 dyoung Exp $"); 35__KERNEL_RCSID(0, "$NetBSD: imx_dma.c,v 1.3 2012/09/18 05:47:27 matt Exp $");
36 36
37#include <sys/param.h> 37#include <sys/param.h>
38#include <sys/systm.h> 38#include <sys/systm.h>
39#include <sys/device.h> 39#include <sys/device.h>
40#include <sys/malloc.h> 40#include <sys/malloc.h>
41#include <sys/mbuf.h> 41#include <sys/mbuf.h>
42 42
43#include <uvm/uvm_extern.h> 43#include <uvm/uvm_extern.h>
44 44
45#define _ARM32_BUS_DMA_PRIVATE 45#define _ARM32_BUS_DMA_PRIVATE
46#include <sys/bus.h> 46#include <sys/bus.h>
47 47
48struct arm32_bus_dma_tag imx_bus_dma_tag = { 48struct arm32_bus_dma_tag imx_bus_dma_tag = {
49 0, 49 _BUS_DMAMAP_FUNCS,
50 0, 50 _BUS_DMAMEM_FUNCS,
51 NULL, /* _cookie */ 51 _BUS_DMATAG_FUNCS,
52 _bus_dmamap_create, 
53 _bus_dmamap_destroy, 
54 _bus_dmamap_load, 
55 _bus_dmamap_load_mbuf, 
56 _bus_dmamap_load_uio, 
57 _bus_dmamap_load_raw, 
58 _bus_dmamap_unload, 
59 _bus_dmamap_sync, 
60 NULL, /* sync_post */ 
61 _bus_dmamem_alloc, 
62 _bus_dmamem_free, 
63 _bus_dmamem_map, 
64 _bus_dmamem_unmap, 
65 _bus_dmamem_mmap 
66}; 52};
67 53

cvs diff -r1.1 -r1.2 src/sys/arch/arm/include/bus_defs.h (expand / switch to unified diff)

--- src/sys/arch/arm/include/bus_defs.h 2011/07/01 17:09:58 1.1
+++ src/sys/arch/arm/include/bus_defs.h 2012/09/18 05:47:27 1.2
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: bus_defs.h,v 1.1 2011/07/01 17:09:58 dyoung Exp $ */ 1/* $NetBSD: bus_defs.h,v 1.2 2012/09/18 05:47:27 matt Exp $ */
2 2
3/*- 3/*-
4 * Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc. 4 * Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * This code is derived from software contributed to The NetBSD Foundation 7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center. 9 * NASA Ames Research Center.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions 12 * modification, are permitted provided that the following conditions
13 * are met: 13 * are met:
14 * 1. Redistributions of source code must retain the above copyright 14 * 1. Redistributions of source code must retain the above copyright
@@ -289,27 +289,27 @@ struct bus_space { @@ -289,27 +289,27 @@ struct bus_space {
289#define BUS_DMA_COHERENT 0x004 /* hint: map memory DMA coherent */ 289#define BUS_DMA_COHERENT 0x004 /* hint: map memory DMA coherent */
290#define BUS_DMA_STREAMING 0x008 /* hint: sequential, unidirectional */ 290#define BUS_DMA_STREAMING 0x008 /* hint: sequential, unidirectional */
291#define BUS_DMA_BUS1 0x010 /* placeholders for bus functions... */ 291#define BUS_DMA_BUS1 0x010 /* placeholders for bus functions... */
292#define BUS_DMA_BUS2 0x020 292#define BUS_DMA_BUS2 0x020
293#define BUS_DMA_BUS3 0x040 293#define BUS_DMA_BUS3 0x040
294#define BUS_DMA_BUS4 0x080 294#define BUS_DMA_BUS4 0x080
295#define BUS_DMA_READ 0x100 /* mapping is device -> memory only */ 295#define BUS_DMA_READ 0x100 /* mapping is device -> memory only */
296#define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */ 296#define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */
297#define BUS_DMA_NOCACHE 0x400 /* hint: map non-cached memory */ 297#define BUS_DMA_NOCACHE 0x400 /* hint: map non-cached memory */
298 298
299/* 299/*
300 * Private flags stored in the DMA map. 300 * Private flags stored in the DMA map.
301 */ 301 */
302#define ARM32_DMAMAP_COHERENT 0x10000 /* no cache flush necessary on sync */ 302#define _BUS_DMAMAP_COHERENT 0x10000 /* no cache flush necessary on sync */
303 303
304/* Forwards needed by prototypes below. */ 304/* Forwards needed by prototypes below. */
305struct mbuf; 305struct mbuf;
306struct uio; 306struct uio;
307 307
308/* 308/*
309 * Operations performed by bus_dmamap_sync(). 309 * Operations performed by bus_dmamap_sync().
310 */ 310 */
311#define BUS_DMASYNC_PREREAD 0x01 /* pre-read synchronization */ 311#define BUS_DMASYNC_PREREAD 0x01 /* pre-read synchronization */
312#define BUS_DMASYNC_POSTREAD 0x02 /* post-read synchronization */ 312#define BUS_DMASYNC_POSTREAD 0x02 /* post-read synchronization */
313#define BUS_DMASYNC_PREWRITE 0x04 /* pre-write synchronization */ 313#define BUS_DMASYNC_PREWRITE 0x04 /* pre-write synchronization */
314#define BUS_DMASYNC_POSTWRITE 0x08 /* post-write synchronization */ 314#define BUS_DMASYNC_POSTWRITE 0x08 /* post-write synchronization */
315 315
@@ -388,26 +388,39 @@ struct arm32_bus_dma_tag { @@ -388,26 +388,39 @@ struct arm32_bus_dma_tag {
388 388
389 /* 389 /*
390 * DMA memory utility functions. 390 * DMA memory utility functions.
391 */ 391 */
392 int (*_dmamem_alloc)(bus_dma_tag_t, bus_size_t, bus_size_t, 392 int (*_dmamem_alloc)(bus_dma_tag_t, bus_size_t, bus_size_t,
393 bus_size_t, bus_dma_segment_t *, int, int *, int); 393 bus_size_t, bus_dma_segment_t *, int, int *, int);
394 void (*_dmamem_free)(bus_dma_tag_t, 394 void (*_dmamem_free)(bus_dma_tag_t,
395 bus_dma_segment_t *, int); 395 bus_dma_segment_t *, int);
396 int (*_dmamem_map)(bus_dma_tag_t, bus_dma_segment_t *, 396 int (*_dmamem_map)(bus_dma_tag_t, bus_dma_segment_t *,
397 int, size_t, void **, int); 397 int, size_t, void **, int);
398 void (*_dmamem_unmap)(bus_dma_tag_t, void *, size_t); 398 void (*_dmamem_unmap)(bus_dma_tag_t, void *, size_t);
399 paddr_t (*_dmamem_mmap)(bus_dma_tag_t, bus_dma_segment_t *, 399 paddr_t (*_dmamem_mmap)(bus_dma_tag_t, bus_dma_segment_t *,
400 int, off_t, int, int); 400 int, off_t, int, int);
 401
 402 /*
 403 * DMA tag utility functions
 404 */
 405 int (*_dmatag_subregion)(bus_dma_tag_t, bus_addr_t, bus_addr_t,
 406 bus_dma_tag_t *, int);
 407 void (*_dmatag_destroy)(bus_dma_tag_t);
 408
 409 /*
 410 * State for bounce buffers
 411 */
 412 int _tag_needs_free;
 413 int (*_may_bounce)(bus_dma_tag_t, bus_dmamap_t, int, int *);
401}; 414};
402 415
403/* 416/*
404 * bus_dmamap_t 417 * bus_dmamap_t
405 * 418 *
406 * Describes a DMA mapping. 419 * Describes a DMA mapping.
407 */ 420 */
408struct arm32_bus_dmamap { 421struct arm32_bus_dmamap {
409 /* 422 /*
410 * PRIVATE MEMBERS: not for use by machine-independent code. 423 * PRIVATE MEMBERS: not for use by machine-independent code.
411 */ 424 */
412 bus_size_t _dm_size; /* largest DMA transfer mappable */ 425 bus_size_t _dm_size; /* largest DMA transfer mappable */
413 int _dm_segcnt; /* number of segs this map can map */ 426 int _dm_segcnt; /* number of segs this map can map */
@@ -420,25 +433,61 @@ struct arm32_bus_dmamap { @@ -420,25 +433,61 @@ struct arm32_bus_dmamap {
420 struct vmspace *_dm_vmspace; /* vmspace that owns the mapping */ 433 struct vmspace *_dm_vmspace; /* vmspace that owns the mapping */
421 434
422 void *_dm_cookie; /* cookie for bus-specific functions */ 435 void *_dm_cookie; /* cookie for bus-specific functions */
423 436
424 /* 437 /*
425 * PUBLIC MEMBERS: these are used by machine-independent code. 438 * PUBLIC MEMBERS: these are used by machine-independent code.
426 */ 439 */
427 bus_size_t dm_maxsegsz; /* largest possible segment */ 440 bus_size_t dm_maxsegsz; /* largest possible segment */
428 bus_size_t dm_mapsize; /* size of the mapping */ 441 bus_size_t dm_mapsize; /* size of the mapping */
429 int dm_nsegs; /* # valid segments in mapping */ 442 int dm_nsegs; /* # valid segments in mapping */
430 bus_dma_segment_t dm_segs[1]; /* segments; variable length */ 443 bus_dma_segment_t dm_segs[1]; /* segments; variable length */
431}; 444};
432 445
 446/* _dm_buftype */
 447#define _BUS_DMA_BUFTYPE_INVALID 0
 448#define _BUS_DMA_BUFTYPE_LINEAR 1
 449#define _BUS_DMA_BUFTYPE_MBUF 2
 450#define _BUS_DMA_BUFTYPE_UIO 3
 451#define _BUS_DMA_BUFTYPE_RAW 4
 452
433#ifdef _ARM32_BUS_DMA_PRIVATE 453#ifdef _ARM32_BUS_DMA_PRIVATE
 454#define _BUS_AVAIL_END physical_end
 455/*
 456 * Cookie used for bounce buffers. A pointer to one of these it stashed in
 457 * the DMA map.
 458 */
 459struct arm32_bus_dma_cookie {
 460 int id_flags; /* flags; see below */
434 461
435/* _dm_buftype */ 462 /*
436#define ARM32_BUFTYPE_INVALID 0 463 * Information about the original buffer used during
437#define ARM32_BUFTYPE_LINEAR 1 464 * DMA map syncs. Note that origibuflen is only used
438#define ARM32_BUFTYPE_MBUF 2 465 * for ID_BUFTYPE_LINEAR.
439#define ARM32_BUFTYPE_UIO 3 466 */
440#define ARM32_BUFTYPE_RAW 4 467 union {
 468 void *un_origbuf; /* pointer to orig buffer if
 469 bouncing */
 470 char *un_linearbuf;
 471 struct mbuf *un_mbuf;
 472 struct uio *un_uio;
 473 } id_origbuf_un;
 474#define id_origbuf id_origbuf_un.un_origbuf
 475#define id_origlinearbuf id_origbuf_un.un_linearbuf
 476#define id_origmbuf id_origbuf_un.un_mbuf
 477#define id_origuio id_origbuf_un.un_uio
 478 bus_size_t id_origbuflen; /* ...and size */
 479
 480 void *id_bouncebuf; /* pointer to the bounce buffer */
 481 bus_size_t id_bouncebuflen; /* ...and size */
 482 int id_nbouncesegs; /* number of valid bounce segs */
 483 bus_dma_segment_t id_bouncesegs[0]; /* array of bounce buffer
 484 physical memory segments */
 485};
441 486
 487/* id_flags */
 488#define _BUS_DMA_IS_BOUNCING 0x04 /* is bouncing current xfer */
 489#define _BUS_DMA_HAS_BOUNCE 0x02 /* has bounce buffers */
442#endif /* _ARM32_BUS_DMA_PRIVATE */ 490#endif /* _ARM32_BUS_DMA_PRIVATE */
 491#define _BUS_DMA_MIGHT_NEED_BOUNCE 0x01 /* may need bounce buffers */
443 492
444#endif /* _ARM32_BUS_DEFS_H_ */ 493#endif /* _ARM32_BUS_DEFS_H_ */

cvs diff -r1.2 -r1.3 src/sys/arch/arm/include/bus_funcs.h (expand / switch to unified diff)

--- src/sys/arch/arm/include/bus_funcs.h 2012/07/15 20:44:20 1.2
+++ src/sys/arch/arm/include/bus_funcs.h 2012/09/18 05:47:27 1.3
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: bus_funcs.h,v 1.2 2012/07/15 20:44:20 matt Exp $ */ 1/* $NetBSD: bus_funcs.h,v 1.3 2012/09/18 05:47:27 matt Exp $ */
2 2
3/*- 3/*-
4 * Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc. 4 * Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * This code is derived from software contributed to The NetBSD Foundation 7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center. 9 * NASA Ames Research Center.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions 12 * modification, are permitted provided that the following conditions
13 * are met: 13 * are met:
14 * 1. Redistributions of source code must retain the above copyright 14 * 1. Redistributions of source code must retain the above copyright
@@ -596,55 +596,94 @@ do { \ @@ -596,55 +596,94 @@ do { \
596} while (/*CONSTCOND*/0) 596} while (/*CONSTCOND*/0)
597 597
598#define bus_dmamem_alloc(t, s, a, b, sg, n, r, f) \ 598#define bus_dmamem_alloc(t, s, a, b, sg, n, r, f) \
599 (*(t)->_dmamem_alloc)((t), (s), (a), (b), (sg), (n), (r), (f)) 599 (*(t)->_dmamem_alloc)((t), (s), (a), (b), (sg), (n), (r), (f))
600#define bus_dmamem_free(t, sg, n) \ 600#define bus_dmamem_free(t, sg, n) \
601 (*(t)->_dmamem_free)((t), (sg), (n)) 601 (*(t)->_dmamem_free)((t), (sg), (n))
602#define bus_dmamem_map(t, sg, n, s, k, f) \ 602#define bus_dmamem_map(t, sg, n, s, k, f) \
603 (*(t)->_dmamem_map)((t), (sg), (n), (s), (k), (f)) 603 (*(t)->_dmamem_map)((t), (sg), (n), (s), (k), (f))
604#define bus_dmamem_unmap(t, k, s) \ 604#define bus_dmamem_unmap(t, k, s) \
605 (*(t)->_dmamem_unmap)((t), (k), (s)) 605 (*(t)->_dmamem_unmap)((t), (k), (s))
606#define bus_dmamem_mmap(t, sg, n, o, p, f) \ 606#define bus_dmamem_mmap(t, sg, n, o, p, f) \
607 (*(t)->_dmamem_mmap)((t), (sg), (n), (o), (p), (f)) 607 (*(t)->_dmamem_mmap)((t), (sg), (n), (o), (p), (f))
608 608
609#define bus_dmatag_subregion(t, mna, mxa, nt, f) EOPNOTSUPP 609#define bus_dmatag_subregion(t, mna, mxa, nt, f) \
610#define bus_dmatag_destroy(t) 610 (*(t)->_dmatag_subregion)((t), (mna), (mxa), (nt), (f))
 611#define bus_dmatag_destroy(t) \
 612 (*(t)->_dmatag_destroy)(t)
611 613
612#ifdef _ARM32_BUS_DMA_PRIVATE 614#ifdef _ARM32_BUS_DMA_PRIVATE
613 615
 616extern paddr_t physical_start, physical_end;
 617
614int arm32_dma_range_intersect(struct arm32_dma_range *, int, 618int arm32_dma_range_intersect(struct arm32_dma_range *, int,
615 paddr_t pa, psize_t size, paddr_t *pap, psize_t *sizep); 619 paddr_t pa, psize_t size, paddr_t *pap, psize_t *sizep);
616 620
617int _bus_dmamap_create(bus_dma_tag_t, bus_size_t, int, bus_size_t, 621int _bus_dmamap_create(bus_dma_tag_t, bus_size_t, int, bus_size_t,
618 bus_size_t, int, bus_dmamap_t *); 622 bus_size_t, int, bus_dmamap_t *);
619void _bus_dmamap_destroy(bus_dma_tag_t, bus_dmamap_t); 623void _bus_dmamap_destroy(bus_dma_tag_t, bus_dmamap_t);
620int _bus_dmamap_load(bus_dma_tag_t, bus_dmamap_t, void *, 624int _bus_dmamap_load(bus_dma_tag_t, bus_dmamap_t, void *,
621 bus_size_t, struct proc *, int); 625 bus_size_t, struct proc *, int);
622int _bus_dmamap_load_mbuf(bus_dma_tag_t, bus_dmamap_t, 626int _bus_dmamap_load_mbuf(bus_dma_tag_t, bus_dmamap_t,
623 struct mbuf *, int); 627 struct mbuf *, int);
624int _bus_dmamap_load_uio(bus_dma_tag_t, bus_dmamap_t, 628int _bus_dmamap_load_uio(bus_dma_tag_t, bus_dmamap_t,
625 struct uio *, int); 629 struct uio *, int);
626int _bus_dmamap_load_raw(bus_dma_tag_t, bus_dmamap_t, 630int _bus_dmamap_load_raw(bus_dma_tag_t, bus_dmamap_t,
627 bus_dma_segment_t *, int, bus_size_t, int); 631 bus_dma_segment_t *, int, bus_size_t, int);
628void _bus_dmamap_unload(bus_dma_tag_t, bus_dmamap_t); 632void _bus_dmamap_unload(bus_dma_tag_t, bus_dmamap_t);
629void _bus_dmamap_sync(bus_dma_tag_t, bus_dmamap_t, bus_addr_t, 633void _bus_dmamap_sync(bus_dma_tag_t, bus_dmamap_t, bus_addr_t,
630 bus_size_t, int); 634 bus_size_t, int);
631 635
 636#ifdef _ARM32_NEED_BUS_DMA_BOUNCE
 637#define _BUS_DMAMAP_SYNC_FUNCS \
 638 ._dmamap_sync_pre = _bus_dmamap_sync, \
 639 ._dmamap_sync_post = _bus_dmamap_sync
 640#else
 641#define _BUS_DMAMAP_SYNC_FUNCS \
 642 ._dmamap_sync_pre = _bus_dmamap_sync
 643#endif
 644
 645#define _BUS_DMAMAP_FUNCS \
 646 ._dmamap_create = _bus_dmamap_create, \
 647 ._dmamap_destroy = _bus_dmamap_destroy, \
 648 ._dmamap_load = _bus_dmamap_load, \
 649 ._dmamap_load_mbuf = _bus_dmamap_load_mbuf, \
 650 ._dmamap_load_raw = _bus_dmamap_load_raw, \
 651 ._dmamap_load_uio = _bus_dmamap_load_uio, \
 652 ._dmamap_unload = _bus_dmamap_unload, \
 653 _BUS_DMAMAP_SYNC_FUNCS
 654
632int _bus_dmamem_alloc(bus_dma_tag_t tag, bus_size_t size, 655int _bus_dmamem_alloc(bus_dma_tag_t tag, bus_size_t size,
633 bus_size_t alignment, bus_size_t boundary, 656 bus_size_t alignment, bus_size_t boundary,
634 bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags); 657 bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags);
635void _bus_dmamem_free(bus_dma_tag_t tag, bus_dma_segment_t *segs, 658void _bus_dmamem_free(bus_dma_tag_t tag, bus_dma_segment_t *segs,
636 int nsegs); 659 int nsegs);
637int _bus_dmamem_map(bus_dma_tag_t tag, bus_dma_segment_t *segs, 660int _bus_dmamem_map(bus_dma_tag_t tag, bus_dma_segment_t *segs,
638 int nsegs, size_t size, void **kvap, int flags); 661 int nsegs, size_t size, void **kvap, int flags);
639void _bus_dmamem_unmap(bus_dma_tag_t tag, void *kva, 662void _bus_dmamem_unmap(bus_dma_tag_t tag, void *kva,
640 size_t size); 663 size_t size);
641paddr_t _bus_dmamem_mmap(bus_dma_tag_t tag, bus_dma_segment_t *segs, 664paddr_t _bus_dmamem_mmap(bus_dma_tag_t tag, bus_dma_segment_t *segs,
642 int nsegs, off_t off, int prot, int flags); 665 int nsegs, off_t off, int prot, int flags);
643 666
 667#define _BUS_DMAMEM_FUNCS \
 668 ._dmamem_alloc = _bus_dmamem_alloc, \
 669 ._dmamem_free = _bus_dmamem_free, \
 670 ._dmamem_map = _bus_dmamem_map, \
 671 ._dmamem_unmap = _bus_dmamem_unmap, \
 672 ._dmamem_mmap = _bus_dmamem_mmap
 673
644int _bus_dmamem_alloc_range(bus_dma_tag_t tag, bus_size_t size, 674int _bus_dmamem_alloc_range(bus_dma_tag_t tag, bus_size_t size,
645 bus_size_t alignment, bus_size_t boundary, 675 bus_size_t alignment, bus_size_t boundary,
646 bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags, 676 bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags,
647 vaddr_t low, vaddr_t high); 677 vaddr_t low, vaddr_t high);
 678
 679int _bus_dmatag_subregion(bus_dma_tag_t, bus_addr_t, bus_addr_t,
 680 bus_dma_tag_t *, int);
 681void _bus_dmatag_destroy(bus_dma_tag_t);
 682
 683#define _BUS_DMATAG_FUNCS \
 684 ._dmatag_subregion = _bus_dmatag_subregion, \
 685 ._dmatag_destroy = _bus_dmatag_destroy
 686
648#endif /* _ARM32_BUS_DMA_PRIVATE */ 687#endif /* _ARM32_BUS_DMA_PRIVATE */
649 688
650#endif /* _ARM32_BUS_FUNCS_H_ */ 689#endif /* _ARM32_BUS_FUNCS_H_ */

cvs diff -r1.8 -r1.9 src/sys/arch/arm/ixp12x0/ixp12x0_pci_dma.c (expand / switch to unified diff)

--- src/sys/arch/arm/ixp12x0/ixp12x0_pci_dma.c 2011/07/01 20:27:50 1.8
+++ src/sys/arch/arm/ixp12x0/ixp12x0_pci_dma.c 2012/09/18 05:47:27 1.9
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: ixp12x0_pci_dma.c,v 1.8 2011/07/01 20:27:50 dyoung Exp $ */ 1/* $NetBSD: ixp12x0_pci_dma.c,v 1.9 2012/09/18 05:47:27 matt Exp $ */
2/* 2/*
3 * Copyright (c) 2002, 2003 3 * Copyright (c) 2002, 2003
4 * Ichiro FUKUHARA <ichiro@ichiro.org>. 4 * Ichiro FUKUHARA <ichiro@ichiro.org>.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * Redistribution and use in source and binary forms, with or without 7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions 8 * modification, are permitted provided that the following conditions
9 * are met: 9 * are met:
10 * 1. Redistributions of source code must retain the above copyright 10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer. 11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright 12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the 13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution. 14 * documentation and/or other materials provided with the distribution.
@@ -17,27 +17,27 @@ @@ -17,27 +17,27 @@
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 * IN NO EVENT SHALL ICHIRO FUKUHARA OR THE VOICES IN HIS HEAD BE LIABLE FOR 19 * IN NO EVENT SHALL ICHIRO FUKUHARA OR THE VOICES IN HIS HEAD BE LIABLE FOR
20 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE. 26 * SUCH DAMAGE.
27 */ 27 */
28 28
29#include <sys/cdefs.h> 29#include <sys/cdefs.h>
30__KERNEL_RCSID(0, "$NetBSD: ixp12x0_pci_dma.c,v 1.8 2011/07/01 20:27:50 dyoung Exp $"); 30__KERNEL_RCSID(0, "$NetBSD: ixp12x0_pci_dma.c,v 1.9 2012/09/18 05:47:27 matt Exp $");
31 31
32#include <sys/param.h> 32#include <sys/param.h>
33#include <sys/systm.h> 33#include <sys/systm.h>
34#include <sys/device.h> 34#include <sys/device.h>
35#include <sys/malloc.h> 35#include <sys/malloc.h>
36#include <sys/mbuf.h> 36#include <sys/mbuf.h>
37 37
38#include <uvm/uvm_extern.h> 38#include <uvm/uvm_extern.h>
39 39
40#define _ARM32_BUS_DMA_PRIVATE 40#define _ARM32_BUS_DMA_PRIVATE
41#include <sys/bus.h> 41#include <sys/bus.h>
42 42
43#include <arm/ixp12x0/ixp12x0_pcireg.h> 43#include <arm/ixp12x0/ixp12x0_pcireg.h>
@@ -64,14 +64,17 @@ ixp12x0_pci_dma_init(struct ixp12x0_soft @@ -64,14 +64,17 @@ ixp12x0_pci_dma_init(struct ixp12x0_soft
64 dmat->_dmamap_load = _bus_dmamap_load; 64 dmat->_dmamap_load = _bus_dmamap_load;
65 dmat->_dmamap_load_mbuf = _bus_dmamap_load_mbuf; 65 dmat->_dmamap_load_mbuf = _bus_dmamap_load_mbuf;
66 dmat->_dmamap_load_uio = _bus_dmamap_load_uio; 66 dmat->_dmamap_load_uio = _bus_dmamap_load_uio;
67 dmat->_dmamap_load_raw = _bus_dmamap_load_raw; 67 dmat->_dmamap_load_raw = _bus_dmamap_load_raw;
68 dmat->_dmamap_unload = _bus_dmamap_unload; 68 dmat->_dmamap_unload = _bus_dmamap_unload;
69 dmat->_dmamap_sync_pre = _bus_dmamap_sync; 69 dmat->_dmamap_sync_pre = _bus_dmamap_sync;
70 dmat->_dmamap_sync_post = NULL; 70 dmat->_dmamap_sync_post = NULL;
71 71
72 dmat->_dmamem_alloc = _bus_dmamem_alloc; 72 dmat->_dmamem_alloc = _bus_dmamem_alloc;
73 dmat->_dmamem_free = _bus_dmamem_free; 73 dmat->_dmamem_free = _bus_dmamem_free;
74 dmat->_dmamem_map = _bus_dmamem_map; 74 dmat->_dmamem_map = _bus_dmamem_map;
75 dmat->_dmamem_unmap = _bus_dmamem_unmap; 75 dmat->_dmamem_unmap = _bus_dmamem_unmap;
76 dmat->_dmamem_mmap = _bus_dmamem_mmap; 76 dmat->_dmamem_mmap = _bus_dmamem_mmap;
 77
 78 dmat->_dmatag_subregion = _bus_dmatag_subregion;
 79 dmat->_dmatag_destroy = _bus_dmatag_destroy;
77} 80}

cvs diff -r1.2 -r1.3 src/sys/arch/arm/marvell/mvsoc_dma.c (expand / switch to unified diff)

--- src/sys/arch/arm/marvell/mvsoc_dma.c 2011/07/01 20:30:21 1.2
+++ src/sys/arch/arm/marvell/mvsoc_dma.c 2012/09/18 05:47:27 1.3
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: mvsoc_dma.c,v 1.2 2011/07/01 20:30:21 dyoung Exp $ */ 1/* $NetBSD: mvsoc_dma.c,v 1.3 2012/09/18 05:47:27 matt Exp $ */
2 2
3/* 3/*
4 * Copyright (c) 2004 Jesse Off 4 * Copyright (c) 2004 Jesse Off
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * Redistribution and use in source and binary forms, with or without 7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions 8 * modification, are permitted provided that the following conditions
9 * are met: 9 * are met:
10 * 1. Redistributions of source code must retain the above copyright 10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer. 11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright 12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the 13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution. 14 * documentation and/or other materials provided with the distribution.
@@ -26,49 +26,32 @@ @@ -26,49 +26,32 @@
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
27 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 27 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
28 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 28 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
29 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 29 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
30 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * SUCH DAMAGE. 31 * SUCH DAMAGE.
32 */ 32 */
33 33
34/* 34/*
35 * bus_dma tag for MV88Fxx81 Orion 35 * bus_dma tag for MV88Fxx81 Orion
36 */ 36 */
37 37
38#include <sys/cdefs.h> 38#include <sys/cdefs.h>
39__KERNEL_RCSID(0, "$NetBSD: mvsoc_dma.c,v 1.2 2011/07/01 20:30:21 dyoung Exp $"); 39__KERNEL_RCSID(0, "$NetBSD: mvsoc_dma.c,v 1.3 2012/09/18 05:47:27 matt Exp $");
40 40
41#define _ARM32_BUS_DMA_PRIVATE 41#define _ARM32_BUS_DMA_PRIVATE
42 42
43#include <sys/param.h> 43#include <sys/param.h>
44#include <sys/types.h> 44#include <sys/types.h>
45#include <sys/device.h> 45#include <sys/device.h>
46#include <sys/systm.h> 46#include <sys/systm.h>
47#include <sys/extent.h> 47#include <sys/extent.h>
48 48
49#include <sys/bus.h> 49#include <sys/bus.h>
50 50
51#include <arm/marvell/mvsocvar.h> 51#include <arm/marvell/mvsocvar.h>
52 52
53struct arm32_bus_dma_tag mvsoc_bus_dma_tag = { 53struct arm32_bus_dma_tag mvsoc_bus_dma_tag = {
54 NULL, /* _ranges: set by platform specific routine */ 54 _BUS_DMAMAP_FUNCS,
55 0, /* _nranges */ 55 _BUS_DMAMEM_FUNCS,
56 56 _BUS_DMATAG_FUNCS,
57 NULL, /* _cookie */ 
58 
59 _bus_dmamap_create, 
60 _bus_dmamap_destroy, 
61 _bus_dmamap_load, 
62 _bus_dmamap_load_mbuf, 
63 _bus_dmamap_load_uio, 
64 _bus_dmamap_load_raw, 
65 _bus_dmamap_unload, 
66 _bus_dmamap_sync, 
67 NULL, /* sync_post */ 
68 
69 _bus_dmamem_alloc, 
70 _bus_dmamem_free, 
71 _bus_dmamem_map, 
72 _bus_dmamem_unmap, 
73 _bus_dmamem_mmap, 
74}; 57};

cvs diff -r1.3 -r1.4 src/sys/arch/arm/omap/Attic/omap_dma.c (expand / switch to unified diff)

--- src/sys/arch/arm/omap/Attic/omap_dma.c 2011/07/01 20:30:21 1.3
+++ src/sys/arch/arm/omap/Attic/omap_dma.c 2012/09/18 05:47:28 1.4
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: omap_dma.c,v 1.3 2011/07/01 20:30:21 dyoung Exp $ */ 1/* $NetBSD: omap_dma.c,v 1.4 2012/09/18 05:47:28 matt Exp $ */
2 2
3/* 3/*
4 * Copyright (c) 2010 Michael Lorenz 4 * Copyright (c) 2010 Michael Lorenz
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * Redistribution and use in source and binary forms, with or without 7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions 8 * modification, are permitted provided that the following conditions
9 * are met: 9 * are met:
10 * 1. Redistributions of source code must retain the above copyright 10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer. 11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright 12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the 13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution. 14 * documentation and/or other materials provided with the distribution.
@@ -16,46 +16,31 @@ @@ -16,46 +16,31 @@
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 */ 26 */
27 27
28#include <sys/cdefs.h> 28#include <sys/cdefs.h>
29__KERNEL_RCSID(0, "$NetBSD: omap_dma.c,v 1.3 2011/07/01 20:30:21 dyoung Exp $"); 29__KERNEL_RCSID(0, "$NetBSD: omap_dma.c,v 1.4 2012/09/18 05:47:28 matt Exp $");
30 30
31#include <sys/param.h> 31#include <sys/param.h>
32#include <sys/systm.h> 32#include <sys/systm.h>
33#include <sys/device.h> 33#include <sys/device.h>
34#include <sys/malloc.h> 34#include <sys/malloc.h>
35#include <sys/mbuf.h> 35#include <sys/mbuf.h>
36 36
37#include <uvm/uvm_extern.h> 37#include <uvm/uvm_extern.h>
38 38
39#define _ARM32_BUS_DMA_PRIVATE 39#define _ARM32_BUS_DMA_PRIVATE
40#include <sys/bus.h> 40#include <sys/bus.h>
41 41
42struct arm32_bus_dma_tag omap_bus_dma_tag = { 42struct arm32_bus_dma_tag omap_bus_dma_tag = {
43 0, 43 _BUS_DMAMAP_FUNCS,
44 0, 44 _BUS_DMAMEM_FUNCS,
45 NULL, /* _cookie */ 45 _BUS_DMATAG_FUNCS,
46 _bus_dmamap_create, 
47 _bus_dmamap_destroy, 
48 _bus_dmamap_load, 
49 _bus_dmamap_load_mbuf, 
50 _bus_dmamap_load_uio, 
51 _bus_dmamap_load_raw, 
52 _bus_dmamap_unload, 
53 _bus_dmamap_sync, 
54 NULL, /* sync_post */ 
55 _bus_dmamem_alloc, 
56 _bus_dmamem_free, 
57 _bus_dmamem_map, 
58 _bus_dmamem_unmap, 
59 _bus_dmamem_mmap 
60}; 46};
61 

cvs diff -r1.4 -r1.5 src/sys/arch/arm/s3c2xx0/s3c2xx0_busdma.c (expand / switch to unified diff)

--- src/sys/arch/arm/s3c2xx0/s3c2xx0_busdma.c 2011/07/01 20:31:39 1.4
+++ src/sys/arch/arm/s3c2xx0/s3c2xx0_busdma.c 2012/09/18 05:47:28 1.5
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: s3c2xx0_busdma.c,v 1.4 2011/07/01 20:31:39 dyoung Exp $ */ 1/* $NetBSD: s3c2xx0_busdma.c,v 1.5 2012/09/18 05:47:28 matt Exp $ */
2 2
3/* 3/*
4 * Copyright (c) 2002, 2003 Fujitsu Component Limited 4 * Copyright (c) 2002, 2003 Fujitsu Component Limited
5 * Copyright (c) 2002, 2003 Genetec Corporation 5 * Copyright (c) 2002, 2003 Genetec Corporation
6 * All rights reserved. 6 * All rights reserved.
7 * 7 *
8 * Redistribution and use in source and binary forms, with or without 8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions 9 * modification, are permitted provided that the following conditions
10 * are met: 10 * are met:
11 * 1. Redistributions of source code must retain the above copyright 11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer. 12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright 13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the 14 * notice, this list of conditions and the following disclaimer in the
@@ -27,48 +27,31 @@ @@ -27,48 +27,31 @@
27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
28 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 28 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
29 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 29 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
31 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 * SUCH DAMAGE. 32 * SUCH DAMAGE.
33 */ 33 */
34 34
35/* 35/*
36 * bus_dma tag for s3c2xx0 CPUs 36 * bus_dma tag for s3c2xx0 CPUs
37 */ 37 */
38 38
39#include <sys/cdefs.h> 39#include <sys/cdefs.h>
40__KERNEL_RCSID(0, "$NetBSD: s3c2xx0_busdma.c,v 1.4 2011/07/01 20:31:39 dyoung Exp $"); 40__KERNEL_RCSID(0, "$NetBSD: s3c2xx0_busdma.c,v 1.5 2012/09/18 05:47:28 matt Exp $");
41 41
42#include <sys/param.h> 42#include <sys/param.h>
43#include <sys/types.h> 43#include <sys/types.h>
44#include <sys/device.h> 44#include <sys/device.h>
45#include <sys/systm.h> 45#include <sys/systm.h>
46#include <sys/extent.h> 46#include <sys/extent.h>
47 47
48#define _ARM32_BUS_DMA_PRIVATE 48#define _ARM32_BUS_DMA_PRIVATE
49#include <sys/bus.h> 49#include <sys/bus.h>
50 50
51#include <arm/s3c2xx0/s3c2xx0var.h> 51#include <arm/s3c2xx0/s3c2xx0var.h>
52 52
53struct arm32_bus_dma_tag s3c2xx0_bus_dma = { 53struct arm32_bus_dma_tag s3c2xx0_bus_dma = {
54 NULL, /* _ranges: set by platform specific routine */ 54 _BUS_DMAMAP_FUNCS,
55 0, /* _nranges */ 55 _BUS_DMAMEM_FUNCS,
56 56 _BUS_DMATAG_FUNCS,
57 NULL, /* _cookie */ 
58 
59 _bus_dmamap_create, 
60 _bus_dmamap_destroy, 
61 _bus_dmamap_load, 
62 _bus_dmamap_load_mbuf, 
63 _bus_dmamap_load_uio, 
64 _bus_dmamap_load_raw, 
65 _bus_dmamap_unload, 
66 _bus_dmamap_sync, 
67 NULL, /* sync_post */ 
68 
69 _bus_dmamem_alloc, 
70 _bus_dmamem_free, 
71 _bus_dmamem_map, 
72 _bus_dmamem_unmap, 
73 _bus_dmamem_mmap, 
74}; 57};

cvs diff -r1.14 -r1.15 src/sys/arch/arm/xscale/becc.c (expand / switch to unified diff)

--- src/sys/arch/arm/xscale/becc.c 2011/07/01 20:32:51 1.14
+++ src/sys/arch/arm/xscale/becc.c 2012/09/18 05:47:28 1.15
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: becc.c,v 1.14 2011/07/01 20:32:51 dyoung Exp $ */ 1/* $NetBSD: becc.c,v 1.15 2012/09/18 05:47:28 matt Exp $ */
2 2
3/* 3/*
4 * Copyright (c) 2002, 2003 Wasabi Systems, Inc. 4 * Copyright (c) 2002, 2003 Wasabi Systems, Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * Written by Jason R. Thorpe for Wasabi Systems, Inc. 7 * Written by Jason R. Thorpe for Wasabi Systems, Inc.
8 * 8 *
9 * Redistribution and use in source and binary forms, with or without 9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions 10 * modification, are permitted provided that the following conditions
11 * are met: 11 * are met:
12 * 1. Redistributions of source code must retain the above copyright 12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer. 13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright 14 * 2. Redistributions in binary form must reproduce the above copyright
@@ -31,27 +31,27 @@ @@ -31,27 +31,27 @@
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE. 35 * POSSIBILITY OF SUCH DAMAGE.
36 */ 36 */
37 37
38/* 38/*
39 * Autoconfiguration support for the ADI Engineering Big Endian 39 * Autoconfiguration support for the ADI Engineering Big Endian
40 * Companion Chip. 40 * Companion Chip.
41 */ 41 */
42 42
43#include <sys/cdefs.h> 43#include <sys/cdefs.h>
44__KERNEL_RCSID(0, "$NetBSD: becc.c,v 1.14 2011/07/01 20:32:51 dyoung Exp $"); 44__KERNEL_RCSID(0, "$NetBSD: becc.c,v 1.15 2012/09/18 05:47:28 matt Exp $");
45 45
46#include <sys/param.h> 46#include <sys/param.h>
47#include <sys/systm.h> 47#include <sys/systm.h>
48#include <sys/device.h> 48#include <sys/device.h>
49 49
50#define _ARM32_BUS_DMA_PRIVATE 50#define _ARM32_BUS_DMA_PRIVATE
51#include <sys/bus.h> 51#include <sys/bus.h>
52 52
53#include <arm/xscale/i80200reg.h> 53#include <arm/xscale/i80200reg.h>
54#include <arm/xscale/beccreg.h> 54#include <arm/xscale/beccreg.h>
55#include <arm/xscale/beccvar.h> 55#include <arm/xscale/beccvar.h>
56 56
57/* 57/*
@@ -287,26 +287,29 @@ becc_pci_dma_init(struct becc_softc *sc) @@ -287,26 +287,29 @@ becc_pci_dma_init(struct becc_softc *sc)
287 dmat->_dmamap_load = _bus_dmamap_load; 287 dmat->_dmamap_load = _bus_dmamap_load;
288 dmat->_dmamap_load_mbuf = _bus_dmamap_load_mbuf; 288 dmat->_dmamap_load_mbuf = _bus_dmamap_load_mbuf;
289 dmat->_dmamap_load_uio = _bus_dmamap_load_uio; 289 dmat->_dmamap_load_uio = _bus_dmamap_load_uio;
290 dmat->_dmamap_load_raw = _bus_dmamap_load_raw; 290 dmat->_dmamap_load_raw = _bus_dmamap_load_raw;
291 dmat->_dmamap_unload = _bus_dmamap_unload; 291 dmat->_dmamap_unload = _bus_dmamap_unload;
292 dmat->_dmamap_sync_pre = _bus_dmamap_sync; 292 dmat->_dmamap_sync_pre = _bus_dmamap_sync;
293 dmat->_dmamap_sync_post = NULL; 293 dmat->_dmamap_sync_post = NULL;
294 294
295 dmat->_dmamem_alloc = _bus_dmamem_alloc; 295 dmat->_dmamem_alloc = _bus_dmamem_alloc;
296 dmat->_dmamem_free = _bus_dmamem_free; 296 dmat->_dmamem_free = _bus_dmamem_free;
297 dmat->_dmamem_map = _bus_dmamem_map; 297 dmat->_dmamem_map = _bus_dmamem_map;
298 dmat->_dmamem_unmap = _bus_dmamem_unmap; 298 dmat->_dmamem_unmap = _bus_dmamem_unmap;
299 dmat->_dmamem_mmap = _bus_dmamem_mmap; 299 dmat->_dmamem_mmap = _bus_dmamem_mmap;
 300
 301 dmat->_dmatag_subregion = _bus_dmatag_subregion;
 302 dmat->_dmatag_destroy = _bus_dmatag_destroy;
300} 303}
301 304
302/* 305/*
303 * becc_local_dma_init: 306 * becc_local_dma_init:
304 * 307 *
305 * Initialize the local DMA tag. 308 * Initialize the local DMA tag.
306 */ 309 */
307static void 310static void
308becc_local_dma_init(struct becc_softc *sc) 311becc_local_dma_init(struct becc_softc *sc)
309{ 312{
310 bus_dma_tag_t dmat = &sc->sc_local_dmat; 313 bus_dma_tag_t dmat = &sc->sc_local_dmat;
311 314
312 dmat->_ranges = NULL; 315 dmat->_ranges = NULL;

cvs diff -r1.21 -r1.22 src/sys/arch/arm/xscale/i80312.c (expand / switch to unified diff)

--- src/sys/arch/arm/xscale/i80312.c 2011/07/01 20:32:51 1.21
+++ src/sys/arch/arm/xscale/i80312.c 2012/09/18 05:47:28 1.22
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: i80312.c,v 1.21 2011/07/01 20:32:51 dyoung Exp $ */ 1/* $NetBSD: i80312.c,v 1.22 2012/09/18 05:47:28 matt Exp $ */
2 2
3/* 3/*
4 * Copyright (c) 2001, 2002 Wasabi Systems, Inc. 4 * Copyright (c) 2001, 2002 Wasabi Systems, Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * Written by Jason R. Thorpe for Wasabi Systems, Inc. 7 * Written by Jason R. Thorpe for Wasabi Systems, Inc.
8 * 8 *
9 * Redistribution and use in source and binary forms, with or without 9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions 10 * modification, are permitted provided that the following conditions
11 * are met: 11 * are met:
12 * 1. Redistributions of source code must retain the above copyright 12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer. 13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright 14 * 2. Redistributions in binary form must reproduce the above copyright
@@ -30,27 +30,27 @@ @@ -30,27 +30,27 @@
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE. 35 * POSSIBILITY OF SUCH DAMAGE.
36 */ 36 */
37 37
38/* 38/*
39 * Autoconfiguration support for the Intel i80312 Companion I/O chip. 39 * Autoconfiguration support for the Intel i80312 Companion I/O chip.
40 */ 40 */
41 41
42#include <sys/cdefs.h> 42#include <sys/cdefs.h>
43__KERNEL_RCSID(0, "$NetBSD: i80312.c,v 1.21 2011/07/01 20:32:51 dyoung Exp $"); 43__KERNEL_RCSID(0, "$NetBSD: i80312.c,v 1.22 2012/09/18 05:47:28 matt Exp $");
44 44
45#include <sys/param.h> 45#include <sys/param.h>
46#include <sys/systm.h> 46#include <sys/systm.h>
47#include <sys/device.h> 47#include <sys/device.h>
48 48
49#define _ARM32_BUS_DMA_PRIVATE 49#define _ARM32_BUS_DMA_PRIVATE
50#include <sys/bus.h> 50#include <sys/bus.h>
51 51
52#include <arm/xscale/i80312reg.h> 52#include <arm/xscale/i80312reg.h>
53#include <arm/xscale/i80312var.h> 53#include <arm/xscale/i80312var.h>
54 54
55#include <dev/pci/ppbreg.h> 55#include <dev/pci/ppbreg.h>
56 56
@@ -358,26 +358,29 @@ i80312_pci_dma_init(struct i80312_softc  @@ -358,26 +358,29 @@ i80312_pci_dma_init(struct i80312_softc
358 dmat->_dmamap_load = _bus_dmamap_load; 358 dmat->_dmamap_load = _bus_dmamap_load;
359 dmat->_dmamap_load_mbuf = _bus_dmamap_load_mbuf; 359 dmat->_dmamap_load_mbuf = _bus_dmamap_load_mbuf;
360 dmat->_dmamap_load_uio = _bus_dmamap_load_uio; 360 dmat->_dmamap_load_uio = _bus_dmamap_load_uio;
361 dmat->_dmamap_load_raw = _bus_dmamap_load_raw; 361 dmat->_dmamap_load_raw = _bus_dmamap_load_raw;
362 dmat->_dmamap_unload = _bus_dmamap_unload; 362 dmat->_dmamap_unload = _bus_dmamap_unload;
363 dmat->_dmamap_sync_pre = _bus_dmamap_sync; 363 dmat->_dmamap_sync_pre = _bus_dmamap_sync;
364 dmat->_dmamap_sync_post = NULL; 364 dmat->_dmamap_sync_post = NULL;
365 365
366 dmat->_dmamem_alloc = _bus_dmamem_alloc; 366 dmat->_dmamem_alloc = _bus_dmamem_alloc;
367 dmat->_dmamem_free = _bus_dmamem_free; 367 dmat->_dmamem_free = _bus_dmamem_free;
368 dmat->_dmamem_map = _bus_dmamem_map; 368 dmat->_dmamem_map = _bus_dmamem_map;
369 dmat->_dmamem_unmap = _bus_dmamem_unmap; 369 dmat->_dmamem_unmap = _bus_dmamem_unmap;
370 dmat->_dmamem_mmap = _bus_dmamem_mmap; 370 dmat->_dmamem_mmap = _bus_dmamem_mmap;
 371
 372 dmat->_dmatag_subregion = _bus_dmatag_subregion;
 373 dmat->_dmatag_destroy = _bus_dmatag_destroy;
371} 374}
372 375
373/* 376/*
374 * i80312_local_dma_init: 377 * i80312_local_dma_init:
375 * 378 *
376 * Initialize the local DMA tag. 379 * Initialize the local DMA tag.
377 */ 380 */
378static void 381static void
379i80312_local_dma_init(struct i80312_softc *sc) 382i80312_local_dma_init(struct i80312_softc *sc)
380{ 383{
381 bus_dma_tag_t dmat = &sc->sc_local_dmat; 384 bus_dma_tag_t dmat = &sc->sc_local_dmat;
382  385
383 dmat->_ranges = NULL; 386 dmat->_ranges = NULL;

cvs diff -r1.23 -r1.24 src/sys/arch/arm/xscale/i80321.c (expand / switch to unified diff)

--- src/sys/arch/arm/xscale/i80321.c 2012/02/12 16:31:01 1.23
+++ src/sys/arch/arm/xscale/i80321.c 2012/09/18 05:47:28 1.24
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: i80321.c,v 1.23 2012/02/12 16:31:01 matt Exp $ */ 1/* $NetBSD: i80321.c,v 1.24 2012/09/18 05:47:28 matt Exp $ */
2 2
3/* 3/*
4 * Copyright (c) 2002 Wasabi Systems, Inc. 4 * Copyright (c) 2002 Wasabi Systems, Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * Written by Jason R. Thorpe for Wasabi Systems, Inc. 7 * Written by Jason R. Thorpe for Wasabi Systems, Inc.
8 * 8 *
9 * Redistribution and use in source and binary forms, with or without 9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions 10 * modification, are permitted provided that the following conditions
11 * are met: 11 * are met:
12 * 1. Redistributions of source code must retain the above copyright 12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer. 13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright 14 * 2. Redistributions in binary form must reproduce the above copyright
@@ -30,27 +30,27 @@ @@ -30,27 +30,27 @@
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE. 35 * POSSIBILITY OF SUCH DAMAGE.
36 */ 36 */
37 37
38/* 38/*
39 * Autoconfiguration support for the Intel i80321 I/O Processor. 39 * Autoconfiguration support for the Intel i80321 I/O Processor.
40 */ 40 */
41 41
42#include <sys/cdefs.h> 42#include <sys/cdefs.h>
43__KERNEL_RCSID(0, "$NetBSD: i80321.c,v 1.23 2012/02/12 16:31:01 matt Exp $"); 43__KERNEL_RCSID(0, "$NetBSD: i80321.c,v 1.24 2012/09/18 05:47:28 matt Exp $");
44 44
45#include <sys/param.h> 45#include <sys/param.h>
46#include <sys/systm.h> 46#include <sys/systm.h>
47#include <sys/device.h> 47#include <sys/device.h>
48 48
49#define _ARM32_BUS_DMA_PRIVATE 49#define _ARM32_BUS_DMA_PRIVATE
50#include <sys/bus.h> 50#include <sys/bus.h>
51 51
52#include <arm/xscale/i80321reg.h> 52#include <arm/xscale/i80321reg.h>
53#include <arm/xscale/i80321var.h> 53#include <arm/xscale/i80321var.h>
54 54
55#include "opt_i80321.h" 55#include "opt_i80321.h"
56 56
@@ -327,26 +327,29 @@ i80321_pci_dma_init(struct i80321_softc  @@ -327,26 +327,29 @@ i80321_pci_dma_init(struct i80321_softc
327 dmat->_dmamap_load = _bus_dmamap_load; 327 dmat->_dmamap_load = _bus_dmamap_load;
328 dmat->_dmamap_load_mbuf = _bus_dmamap_load_mbuf; 328 dmat->_dmamap_load_mbuf = _bus_dmamap_load_mbuf;
329 dmat->_dmamap_load_uio = _bus_dmamap_load_uio; 329 dmat->_dmamap_load_uio = _bus_dmamap_load_uio;
330 dmat->_dmamap_load_raw = _bus_dmamap_load_raw; 330 dmat->_dmamap_load_raw = _bus_dmamap_load_raw;
331 dmat->_dmamap_unload = _bus_dmamap_unload; 331 dmat->_dmamap_unload = _bus_dmamap_unload;
332 dmat->_dmamap_sync_pre = _bus_dmamap_sync; 332 dmat->_dmamap_sync_pre = _bus_dmamap_sync;
333 dmat->_dmamap_sync_post = NULL; 333 dmat->_dmamap_sync_post = NULL;
334 334
335 dmat->_dmamem_alloc = _bus_dmamem_alloc; 335 dmat->_dmamem_alloc = _bus_dmamem_alloc;
336 dmat->_dmamem_free = _bus_dmamem_free; 336 dmat->_dmamem_free = _bus_dmamem_free;
337 dmat->_dmamem_map = _bus_dmamem_map; 337 dmat->_dmamem_map = _bus_dmamem_map;
338 dmat->_dmamem_unmap = _bus_dmamem_unmap; 338 dmat->_dmamem_unmap = _bus_dmamem_unmap;
339 dmat->_dmamem_mmap = _bus_dmamem_mmap; 339 dmat->_dmamem_mmap = _bus_dmamem_mmap;
 340
 341 dmat->_dmatag_subregion = _bus_dmatag_subregion;
 342 dmat->_dmatag_destroy = _bus_dmatag_destroy;
340} 343}
341 344
342/* 345/*
343 * i80321_local_dma_init: 346 * i80321_local_dma_init:
344 * 347 *
345 * Initialize the local DMA tag. 348 * Initialize the local DMA tag.
346 */ 349 */
347void 350void
348i80321_local_dma_init(struct i80321_softc *sc) 351i80321_local_dma_init(struct i80321_softc *sc)
349{ 352{
350 bus_dma_tag_t dmat = &sc->sc_local_dmat; 353 bus_dma_tag_t dmat = &sc->sc_local_dmat;
351 354
352 dmat->_ranges = NULL; 355 dmat->_ranges = NULL;

cvs diff -r1.3 -r1.4 src/sys/arch/arm/xscale/ixp425_ixme.c (expand / switch to unified diff)

--- src/sys/arch/arm/xscale/ixp425_ixme.c 2011/07/01 20:32:51 1.3
+++ src/sys/arch/arm/xscale/ixp425_ixme.c 2012/09/18 05:47:28 1.4
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: ixp425_ixme.c,v 1.3 2011/07/01 20:32:51 dyoung Exp $ */ 1/* $NetBSD: ixp425_ixme.c,v 1.4 2012/09/18 05:47:28 matt Exp $ */
2 2
3/*- 3/*-
4 * Copyright (c) 2006 The NetBSD Foundation, Inc. 4 * Copyright (c) 2006 The NetBSD Foundation, Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * This code is derived from software contributed to The NetBSD Foundation 7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Steve C. Woodford. 8 * by Steve C. Woodford.
9 * 9 *
10 * Redistribution and use in source and binary forms, with or without 10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions 11 * modification, are permitted provided that the following conditions
12 * are met: 12 * are met:
13 * 1. Redistributions of source code must retain the above copyright 13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer. 14 * notice, this list of conditions and the following disclaimer.
@@ -20,27 +20,27 @@ @@ -20,27 +20,27 @@
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE. 29 * POSSIBILITY OF SUCH DAMAGE.
30 */ 30 */
31 31
32#include <sys/cdefs.h> 32#include <sys/cdefs.h>
33__KERNEL_RCSID(0, "$NetBSD: ixp425_ixme.c,v 1.3 2011/07/01 20:32:51 dyoung Exp $"); 33__KERNEL_RCSID(0, "$NetBSD: ixp425_ixme.c,v 1.4 2012/09/18 05:47:28 matt Exp $");
34 34
35#include <sys/param.h> 35#include <sys/param.h>
36#include <sys/systm.h> 36#include <sys/systm.h>
37#include <sys/kernel.h> 37#include <sys/kernel.h>
38#include <sys/device.h> 38#include <sys/device.h>
39 39
40#define _ARM32_BUS_DMA_PRIVATE 40#define _ARM32_BUS_DMA_PRIVATE
41#include <sys/bus.h> 41#include <sys/bus.h>
42 42
43#include <arm/xscale/ixp425var.h> 43#include <arm/xscale/ixp425var.h>
44#include <arm/xscale/ixp425_qmgr.h> 44#include <arm/xscale/ixp425_qmgr.h>
45#include <arm/xscale/ixp425_ixmevar.h> 45#include <arm/xscale/ixp425_ixmevar.h>
46 46
@@ -89,32 +89,36 @@ ixme_attach(struct device *parent, struc @@ -89,32 +89,36 @@ ixme_attach(struct device *parent, struc
89 sc->sc_dr.dr_len = physical_end - physical_start; 89 sc->sc_dr.dr_len = physical_end - physical_start;
90 sc->sc_dt._ranges = &sc->sc_dr; 90 sc->sc_dt._ranges = &sc->sc_dr;
91 sc->sc_dt._nranges = 1; 91 sc->sc_dt._nranges = 1;
92 92
93 sc->sc_dt._dmamap_create = _bus_dmamap_create; 93 sc->sc_dt._dmamap_create = _bus_dmamap_create;
94 sc->sc_dt._dmamap_destroy = _bus_dmamap_destroy; 94 sc->sc_dt._dmamap_destroy = _bus_dmamap_destroy;
95 sc->sc_dt._dmamap_load = _bus_dmamap_load; 95 sc->sc_dt._dmamap_load = _bus_dmamap_load;
96 sc->sc_dt._dmamap_load_mbuf = _bus_dmamap_load_mbuf; 96 sc->sc_dt._dmamap_load_mbuf = _bus_dmamap_load_mbuf;
97 sc->sc_dt._dmamap_load_uio = _bus_dmamap_load_uio; 97 sc->sc_dt._dmamap_load_uio = _bus_dmamap_load_uio;
98 sc->sc_dt._dmamap_load_raw = _bus_dmamap_load_raw; 98 sc->sc_dt._dmamap_load_raw = _bus_dmamap_load_raw;
99 sc->sc_dt._dmamap_unload = _bus_dmamap_unload; 99 sc->sc_dt._dmamap_unload = _bus_dmamap_unload;
100 sc->sc_dt._dmamap_sync_pre = _bus_dmamap_sync; 100 sc->sc_dt._dmamap_sync_pre = _bus_dmamap_sync;
101 sc->sc_dt._dmamap_sync_post = NULL; 101 sc->sc_dt._dmamap_sync_post = NULL;
 102
102 sc->sc_dt._dmamem_alloc = _bus_dmamem_alloc; 103 sc->sc_dt._dmamem_alloc = _bus_dmamem_alloc;
103 sc->sc_dt._dmamem_free = _bus_dmamem_free; 104 sc->sc_dt._dmamem_free = _bus_dmamem_free;
104 sc->sc_dt._dmamem_map = _bus_dmamem_map; 105 sc->sc_dt._dmamem_map = _bus_dmamem_map;
105 sc->sc_dt._dmamem_unmap = _bus_dmamem_unmap; 106 sc->sc_dt._dmamem_unmap = _bus_dmamem_unmap;
106 sc->sc_dt._dmamem_mmap = _bus_dmamem_mmap; 107 sc->sc_dt._dmamem_mmap = _bus_dmamem_mmap;
107 108
 109 sc->sc_dt._dmatag_subregion = _bus_dmatag_subregion;
 110 sc->sc_dt._dmatag_destroy = _bus_dmatag_destroy;
 111
108 config_search_ia(ixme_search, self, "ixme", NULL); 112 config_search_ia(ixme_search, self, "ixme", NULL);
109} 113}
110 114
111static int 115static int
112ixme_search(struct device *parent, struct cfdata *cf, const int *ldesc, 116ixme_search(struct device *parent, struct cfdata *cf, const int *ldesc,
113 void *arg) 117 void *arg)
114{ 118{
115 struct ixme_softc *sc = (void *)parent; 119 struct ixme_softc *sc = (void *)parent;
116 struct ixme_attach_args ixa; 120 struct ixme_attach_args ixa;
117 121
118 if (cf->cf_loc[IXMECF_NPE] < 0 || cf->cf_loc[IXMECF_NPE] > 2) 122 if (cf->cf_loc[IXMECF_NPE] < 0 || cf->cf_loc[IXMECF_NPE] > 2)
119 return (0); 123 return (0);
120 124

cvs diff -r1.5 -r1.6 src/sys/arch/arm/xscale/ixp425_pci_dma.c (expand / switch to unified diff)

--- src/sys/arch/arm/xscale/ixp425_pci_dma.c 2011/07/01 20:32:51 1.5
+++ src/sys/arch/arm/xscale/ixp425_pci_dma.c 2012/09/18 05:47:28 1.6
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: ixp425_pci_dma.c,v 1.5 2011/07/01 20:32:51 dyoung Exp $ */ 1/* $NetBSD: ixp425_pci_dma.c,v 1.6 2012/09/18 05:47:28 matt Exp $ */
2 2
3/* 3/*
4 * Copyright (c) 2003 4 * Copyright (c) 2003
5 * Ichiro FUKUHARA <ichiro@ichiro.org>. 5 * Ichiro FUKUHARA <ichiro@ichiro.org>.
6 * All rights reserved. 6 * All rights reserved.
7 * 7 *
8 * Redistribution and use in source and binary forms, with or without 8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions 9 * modification, are permitted provided that the following conditions
10 * are met: 10 * are met:
11 * 1. Redistributions of source code must retain the above copyright 11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer. 12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright 13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the 14 * notice, this list of conditions and the following disclaimer in the
@@ -18,27 +18,27 @@ @@ -18,27 +18,27 @@
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL ICHIRO FUKUHARA OR THE VOICES IN HIS HEAD BE LIABLE FOR 20 * IN NO EVENT SHALL ICHIRO FUKUHARA OR THE VOICES IN HIS HEAD BE LIABLE FOR
21 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE. 27 * SUCH DAMAGE.
28 */ 28 */
29 29
30#include <sys/cdefs.h> 30#include <sys/cdefs.h>
31__KERNEL_RCSID(0, "$NetBSD: ixp425_pci_dma.c,v 1.5 2011/07/01 20:32:51 dyoung Exp $"); 31__KERNEL_RCSID(0, "$NetBSD: ixp425_pci_dma.c,v 1.6 2012/09/18 05:47:28 matt Exp $");
32 32
33#include <sys/param.h> 33#include <sys/param.h>
34#include <sys/systm.h> 34#include <sys/systm.h>
35#include <sys/device.h> 35#include <sys/device.h>
36#include <sys/malloc.h> 36#include <sys/malloc.h>
37#include <sys/mbuf.h> 37#include <sys/mbuf.h>
38 38
39#include <uvm/uvm_extern.h> 39#include <uvm/uvm_extern.h>
40 40
41#define _ARM32_BUS_DMA_PRIVATE 41#define _ARM32_BUS_DMA_PRIVATE
42#include <sys/bus.h> 42#include <sys/bus.h>
43 43
44#include <arm/xscale/ixp425reg.h> 44#include <arm/xscale/ixp425reg.h>
@@ -64,14 +64,17 @@ ixp425_pci_dma_init(struct ixp425_softc  @@ -64,14 +64,17 @@ ixp425_pci_dma_init(struct ixp425_softc
64 dmat->_dmamap_load = _bus_dmamap_load; 64 dmat->_dmamap_load = _bus_dmamap_load;
65 dmat->_dmamap_load_mbuf = _bus_dmamap_load_mbuf; 65 dmat->_dmamap_load_mbuf = _bus_dmamap_load_mbuf;
66 dmat->_dmamap_load_uio = _bus_dmamap_load_uio; 66 dmat->_dmamap_load_uio = _bus_dmamap_load_uio;
67 dmat->_dmamap_load_raw = _bus_dmamap_load_raw; 67 dmat->_dmamap_load_raw = _bus_dmamap_load_raw;
68 dmat->_dmamap_unload = _bus_dmamap_unload; 68 dmat->_dmamap_unload = _bus_dmamap_unload;
69 dmat->_dmamap_sync_pre = _bus_dmamap_sync; 69 dmat->_dmamap_sync_pre = _bus_dmamap_sync;
70 dmat->_dmamap_sync_post = NULL; 70 dmat->_dmamap_sync_post = NULL;
71 71
72 dmat->_dmamem_alloc = _bus_dmamem_alloc; 72 dmat->_dmamem_alloc = _bus_dmamem_alloc;
73 dmat->_dmamem_free = _bus_dmamem_free; 73 dmat->_dmamem_free = _bus_dmamem_free;
74 dmat->_dmamem_map = _bus_dmamem_map; 74 dmat->_dmamem_map = _bus_dmamem_map;
75 dmat->_dmamem_unmap = _bus_dmamem_unmap; 75 dmat->_dmamem_unmap = _bus_dmamem_unmap;
76 dmat->_dmamem_mmap = _bus_dmamem_mmap; 76 dmat->_dmamem_mmap = _bus_dmamem_mmap;
 77
 78 dmat->_dmatag_subregion = _bus_dmatag_subregion;
 79 dmat->_dmatag_destroy = _bus_dmatag_destroy;
77} 80}

cvs diff -r1.5 -r1.6 src/sys/arch/arm/xscale/pxa2x0_dma.c (expand / switch to unified diff)

--- src/sys/arch/arm/xscale/pxa2x0_dma.c 2011/07/01 20:32:51 1.5
+++ src/sys/arch/arm/xscale/pxa2x0_dma.c 2012/09/18 05:47:28 1.6
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: pxa2x0_dma.c,v 1.5 2011/07/01 20:32:51 dyoung Exp $ */ 1/* $NetBSD: pxa2x0_dma.c,v 1.6 2012/09/18 05:47:28 matt Exp $ */
2 2
3/* 3/*
4 * Copyright (c) 2002 Genetec Corporation. All rights reserved. 4 * Copyright (c) 2002 Genetec Corporation. All rights reserved.
5 * Written by Hiroyuki Bessho for Genetec Corporation. 5 * Written by Hiroyuki Bessho for Genetec Corporation.
6 * 6 *
7 * Redistribution and use in source and binary forms, with or without 7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions 8 * modification, are permitted provided that the following conditions
9 * are met: 9 * are met:
10 * 1. Redistributions of source code must retain the above copyright 10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer. 11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright 12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the 13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution. 14 * documentation and/or other materials provided with the distribution.
@@ -29,46 +29,31 @@ @@ -29,46 +29,31 @@
29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
33 * POSSIBILITY OF SUCH DAMAGE. 33 * POSSIBILITY OF SUCH DAMAGE.
34 */ 34 */
35 35
36/* 36/*
37 * bus dma tag for PXA2[15]0 processor. 37 * bus dma tag for PXA2[15]0 processor.
38 * (Currently used only for LCD frame buffer) 38 * (Currently used only for LCD frame buffer)
39 */ 39 */
40 40
41#include <sys/cdefs.h> 41#include <sys/cdefs.h>
42__KERNEL_RCSID(0, "$NetBSD: pxa2x0_dma.c,v 1.5 2011/07/01 20:32:51 dyoung Exp $"); 42__KERNEL_RCSID(0, "$NetBSD: pxa2x0_dma.c,v 1.6 2012/09/18 05:47:28 matt Exp $");
43 43
44#include <sys/param.h> 44#include <sys/param.h>
45#include <sys/systm.h> 45#include <sys/systm.h>
46#include <sys/device.h> 46#include <sys/device.h>
47#include <sys/malloc.h> 47#include <sys/malloc.h>
48#include <sys/mbuf.h> 48#include <sys/mbuf.h>
49 49
50#include <uvm/uvm_extern.h> 50#include <uvm/uvm_extern.h>
51 51
52#define _ARM32_BUS_DMA_PRIVATE 52#define _ARM32_BUS_DMA_PRIVATE
53#include <sys/bus.h> 53#include <sys/bus.h>
54 54
55struct arm32_bus_dma_tag pxa2x0_bus_dma_tag = { 55struct arm32_bus_dma_tag pxa2x0_bus_dma_tag = {
56 0, 56 _BUS_DMAMAP_FUNCS,
57 0, 57 _BUS_DMAMEM_FUNCS,
58 NULL, /* _cookie */ 58 _BUS_DMATAG_FUNCS,
59 _bus_dmamap_create, 
60 _bus_dmamap_destroy, 
61 _bus_dmamap_load, 
62 _bus_dmamap_load_mbuf, 
63 _bus_dmamap_load_uio, 
64 _bus_dmamap_load_raw, 
65 _bus_dmamap_unload, 
66 _bus_dmamap_sync, 
67 NULL, /* sync_post */ 
68 _bus_dmamem_alloc, 
69 _bus_dmamem_free, 
70 _bus_dmamem_map, 
71 _bus_dmamem_unmap, 
72 _bus_dmamem_mmap 
73}; 59};
74