| @@ -1,14 +1,14 @@ | | | @@ -1,14 +1,14 @@ |
1 | /* $NetBSD: pthread_md.h,v 1.7 2012/08/16 04:49:48 matt Exp $ */ | | 1 | /* $NetBSD: pthread_md.h,v 1.8 2012/09/19 07:57:14 matt Exp $ */ |
2 | | | 2 | |
3 | /* | | 3 | /* |
4 | * Copyright (c) 2001 Wasabi Systems, Inc. | | 4 | * Copyright (c) 2001 Wasabi Systems, Inc. |
5 | * All rights reserved. | | 5 | * All rights reserved. |
6 | * | | 6 | * |
7 | * Written by Jason R. Thorpe for Wasabi Systems, Inc. | | 7 | * Written by Jason R. Thorpe for Wasabi Systems, Inc. |
8 | * | | 8 | * |
9 | * Redistribution and use in source and binary forms, with or without | | 9 | * Redistribution and use in source and binary forms, with or without |
10 | * modification, are permitted provided that the following conditions | | 10 | * modification, are permitted provided that the following conditions |
11 | * are met: | | 11 | * are met: |
12 | * 1. Redistributions of source code must retain the above copyright | | 12 | * 1. Redistributions of source code must retain the above copyright |
13 | * notice, this list of conditions and the following disclaimer. | | 13 | * notice, this list of conditions and the following disclaimer. |
14 | * 2. Redistributions in binary form must reproduce the above copyright | | 14 | * 2. Redistributions in binary form must reproduce the above copyright |
| @@ -39,28 +39,28 @@ | | | @@ -39,28 +39,28 @@ |
39 | #define _LIB_PTHREAD_ARM_MD_H | | 39 | #define _LIB_PTHREAD_ARM_MD_H |
40 | | | 40 | |
41 | static inline unsigned long | | 41 | static inline unsigned long |
42 | pthread__sp(void) | | 42 | pthread__sp(void) |
43 | { | | 43 | { |
44 | unsigned long ret; | | 44 | unsigned long ret; |
45 | | | 45 | |
46 | __asm volatile("mov %0, sp" | | 46 | __asm volatile("mov %0, sp" |
47 | : "=r" (ret)); | | 47 | : "=r" (ret)); |
48 | | | 48 | |
49 | return (ret); | | 49 | return (ret); |
50 | } | | 50 | } |
51 | | | 51 | |
52 | #define pthread__smt_pause() __asm __volatile("wfe") | | 52 | #define pthread__smt_pause() __asm __volatile(".inst 0xe320f002") /* wfe */ |
53 | #define pthread__smt_wake() __asm __volatile("sev") | | 53 | #define pthread__smt_wake() __asm __volatile(".inst 0xe320f004") /* sev */ |
54 | | | 54 | |
55 | #define pthread__uc_sp(ucp) ((ucp)->uc_mcontext.__gregs[_REG_SP]) | | 55 | #define pthread__uc_sp(ucp) ((ucp)->uc_mcontext.__gregs[_REG_SP]) |
56 | | | 56 | |
57 | /* | | 57 | /* |
58 | * Set initial, sane values for registers whose values aren't just | | 58 | * Set initial, sane values for registers whose values aren't just |
59 | * "don't care". | | 59 | * "don't care". |
60 | */ | | 60 | */ |
61 | #ifdef __APCS_26__ | | 61 | #ifdef __APCS_26__ |
62 | #define _INITCONTEXT_U_MD(ucp) \ | | 62 | #define _INITCONTEXT_U_MD(ucp) \ |
63 | /* Set R15_MODE_USR in the PC */ \ | | 63 | /* Set R15_MODE_USR in the PC */ \ |
64 | (ucp)->uc_mcontext.__gregs[_REG_PC] = \ | | 64 | (ucp)->uc_mcontext.__gregs[_REG_PC] = \ |
65 | ((ucp)->uc_mcontext.__gregs[_REG_PC] & 0x3fffffc) | 0x0; | | 65 | ((ucp)->uc_mcontext.__gregs[_REG_PC] & 0x3fffffc) | 0x0; |
66 | #else | | 66 | #else |