Sun Sep 23 15:56:32 2012 UTC ()
Map 1M beyond _end to make sure we bootstrap.


(skrll)
diff -r1.6 -r1.7 src/sys/arch/evbarm/rpi/rpi_start.S
cvs diff -r1.6 -r1.7 src/sys/arch/evbarm/rpi/Attic/rpi_start.S (expand / switch to unified diff)

--- src/sys/arch/evbarm/rpi/Attic/rpi_start.S 2012/09/16 14:14:56 1.6
+++ src/sys/arch/evbarm/rpi/Attic/rpi_start.S 2012/09/23 15:56:32 1.7
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: rpi_start.S,v 1.6 2012/09/16 14:14:56 skrll Exp $ */ 1/* $NetBSD: rpi_start.S,v 1.7 2012/09/23 15:56:32 skrll Exp $ */
2 2
3/* 3/*
4 * Copyright (c) 2002, 2003 Genetec Corporation. All rights reserved. 4 * Copyright (c) 2002, 2003 Genetec Corporation. All rights reserved.
5 * Written by Hiroyuki Bessho for Genetec Corporation. 5 * Written by Hiroyuki Bessho for Genetec Corporation.
6 * 6 *
7 * Redistribution and use in source and binary forms, with or without 7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions 8 * modification, are permitted provided that the following conditions
9 * are met: 9 * are met:
10 * 1. Redistributions of source code must retain the above copyright 10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer. 11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright 12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the 13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution. 14 * documentation and/or other materials provided with the distribution.
@@ -77,27 +77,27 @@ @@ -77,27 +77,27 @@
77 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 77 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
78 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 78 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
79 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 79 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
80 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 80 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
81 * SUCH DAMAGE. 81 * SUCH DAMAGE.
82 */ 82 */
83 83
84#include "opt_cputypes.h" 84#include "opt_cputypes.h"
85 85
86#include <machine/asm.h> 86#include <machine/asm.h>
87#include <arm/armreg.h> 87#include <arm/armreg.h>
88#include "assym.h" 88#include "assym.h"
89 89
90RCSID("$NetBSD: rpi_start.S,v 1.6 2012/09/16 14:14:56 skrll Exp $") 90RCSID("$NetBSD: rpi_start.S,v 1.7 2012/09/23 15:56:32 skrll Exp $")
91 91
92/* 92/*
93 * Workaround Erratum 411920  93 * Workaround Erratum 411920
94 *  94 *
95 * - value of arg 'reg' Should Be Zero 95 * - value of arg 'reg' Should Be Zero
96 */ 96 */
97#define Invalidate_I_cache(reg) \ 97#define Invalidate_I_cache(reg) \
98 .p2align 5; \ 98 .p2align 5; \
99 mcr p15, 0, reg, c7, c5, 0; /* Invalidate Entire I cache */ \ 99 mcr p15, 0, reg, c7, c5, 0; /* Invalidate Entire I cache */ \
100 mcr p15, 0, reg, c7, c5, 0; /* Invalidate Entire I cache */ \ 100 mcr p15, 0, reg, c7, c5, 0; /* Invalidate Entire I cache */ \
101 mcr p15, 0, reg, c7, c5, 0; /* Invalidate Entire I cache */ \ 101 mcr p15, 0, reg, c7, c5, 0; /* Invalidate Entire I cache */ \
102 mcr p15, 0, reg, c7, c5, 0; /* Invalidate Entire I cache */ \ 102 mcr p15, 0, reg, c7, c5, 0; /* Invalidate Entire I cache */ \
103 nop; \ 103 nop; \
@@ -298,31 +298,31 @@ Lcontrol_wax: @@ -298,31 +298,31 @@ Lcontrol_wax:
298Lctl_ID_dis: 298Lctl_ID_dis:
299 .word ~(CPU_CONTROL_IC_ENABLE|CPU_CONTROL_DC_ENABLE) 299 .word ~(CPU_CONTROL_IC_ENABLE|CPU_CONTROL_DC_ENABLE)
300 300
301/* We'll modify va and pa at run time so we can use relocatable addresses. */ 301/* We'll modify va and pa at run time so we can use relocatable addresses. */
302#define MMU_INIT(va,pa,n_sec,attr) \ 302#define MMU_INIT(va,pa,n_sec,attr) \
303 .word va ; \ 303 .word va ; \
304 .word pa ; \ 304 .word pa ; \
305 .word n_sec ; \ 305 .word n_sec ; \
306 .word attr ; 306 .word attr ;
307 307
308mmu_init_table: 308mmu_init_table:
309 /* Add 1MB of VA==PA at 0x00000000 so we can keep the kernel going */ 309 /* Add 1MB of VA==PA at 0x00000000 so we can keep the kernel going */
310 MMU_INIT(0x0, 0x0, 310 MMU_INIT(0x0, 0x0,
311 (_end - KERNEL_BASE + L1_S_SIZE - 1), 311 (_end - KERNEL_BASE + 2 * L1_S_SIZE - 1),
312 L1_S_PROTO | L1_S_AP_KRW) 312 L1_S_PROTO | L1_S_AP_KRW)
313 313
314 MMU_INIT(KERNEL_BASE, 0x0, 314 MMU_INIT(KERNEL_BASE, 0x0,
315 (_end - KERNEL_BASE + L1_S_SIZE - 1), 315 (_end - KERNEL_BASE + 2 * L1_S_SIZE - 1),
316 L1_S_PROTO | L1_S_AP_KRW | L1_S_B | L1_S_C) 316 L1_S_PROTO | L1_S_AP_KRW | L1_S_B | L1_S_C)
317 317
318 /* Map the 16MB of peripherals */ 318 /* Map the 16MB of peripherals */
319 MMU_INIT(RPI_KERNEL_IO_VBASE, RPI_KERNEL_IO_PBASE, 319 MMU_INIT(RPI_KERNEL_IO_VBASE, RPI_KERNEL_IO_PBASE,
320 (RPI_KERNEL_IO_VSIZE + L1_S_SIZE - 1), 320 (RPI_KERNEL_IO_VSIZE + L1_S_SIZE - 1),
321 L1_S_PROTO | L1_S_AP_KRW) 321 L1_S_PROTO | L1_S_AP_KRW)
322 322
323 /* end of table */ 323 /* end of table */
324 MMU_INIT(0, 0, 0, 0) 324 MMU_INIT(0, 0, 0, 0)
325 325
326 .globl _C_LABEL(rpi_boot_regs) 326 .globl _C_LABEL(rpi_boot_regs)
327rpi_boot_regs: 327rpi_boot_regs:
328 .space 4 * 4 328 .space 4 * 4