| @@ -1,38 +1,38 @@ | | | @@ -1,38 +1,38 @@ |
1 | /* $NetBSD: if_urtwn.c,v 1.13 2013/01/20 23:13:43 jmcneill Exp $ */ | | 1 | /* $NetBSD: if_urtwn.c,v 1.14 2013/01/21 00:02:11 jmcneill Exp $ */ |
2 | /* $OpenBSD: if_urtwn.c,v 1.20 2011/11/26 06:39:33 ckuethe Exp $ */ | | 2 | /* $OpenBSD: if_urtwn.c,v 1.20 2011/11/26 06:39:33 ckuethe Exp $ */ |
3 | | | 3 | |
4 | /*- | | 4 | /*- |
5 | * Copyright (c) 2010 Damien Bergamini <damien.bergamini@free.fr> | | 5 | * Copyright (c) 2010 Damien Bergamini <damien.bergamini@free.fr> |
6 | * | | 6 | * |
7 | * Permission to use, copy, modify, and distribute this software for any | | 7 | * Permission to use, copy, modify, and distribute this software for any |
8 | * purpose with or without fee is hereby granted, provided that the above | | 8 | * purpose with or without fee is hereby granted, provided that the above |
9 | * copyright notice and this permission notice appear in all copies. | | 9 | * copyright notice and this permission notice appear in all copies. |
10 | * | | 10 | * |
11 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES | | 11 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES |
12 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF | | 12 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF |
13 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR | | 13 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR |
14 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES | | 14 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES |
15 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN | | 15 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN |
16 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF | | 16 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF |
17 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. | | 17 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. |
18 | */ | | 18 | */ |
19 | | | 19 | |
20 | /*- | | 20 | /*- |
21 | * Driver for Realtek RTL8188CE-VAU/RTL8188CUS/RTL8188RU/RTL8192CU. | | 21 | * Driver for Realtek RTL8188CE-VAU/RTL8188CUS/RTL8188RU/RTL8192CU. |
22 | */ | | 22 | */ |
23 | | | 23 | |
24 | #include <sys/cdefs.h> | | 24 | #include <sys/cdefs.h> |
25 | __KERNEL_RCSID(0, "$NetBSD: if_urtwn.c,v 1.13 2013/01/20 23:13:43 jmcneill Exp $"); | | 25 | __KERNEL_RCSID(0, "$NetBSD: if_urtwn.c,v 1.14 2013/01/21 00:02:11 jmcneill Exp $"); |
26 | | | 26 | |
27 | #ifdef _KERNEL_OPT | | 27 | #ifdef _KERNEL_OPT |
28 | #include "opt_inet.h" | | 28 | #include "opt_inet.h" |
29 | #endif | | 29 | #endif |
30 | | | 30 | |
31 | #include <sys/param.h> | | 31 | #include <sys/param.h> |
32 | #include <sys/sockio.h> | | 32 | #include <sys/sockio.h> |
33 | #include <sys/sysctl.h> | | 33 | #include <sys/sysctl.h> |
34 | #include <sys/mbuf.h> | | 34 | #include <sys/mbuf.h> |
35 | #include <sys/kernel.h> | | 35 | #include <sys/kernel.h> |
36 | #include <sys/socket.h> | | 36 | #include <sys/socket.h> |
37 | #include <sys/systm.h> | | 37 | #include <sys/systm.h> |
38 | #include <sys/malloc.h> | | 38 | #include <sys/malloc.h> |
| @@ -1560,27 +1560,27 @@ urtwn_newstate_cb(struct urtwn_softc *sc | | | @@ -1560,27 +1560,27 @@ urtwn_newstate_cb(struct urtwn_softc *sc |
1560 | | | 1560 | |
1561 | /* Stop Rx of data frames. */ | | 1561 | /* Stop Rx of data frames. */ |
1562 | urtwn_write_2(sc, R92C_RXFLTMAP2, 0); | | 1562 | urtwn_write_2(sc, R92C_RXFLTMAP2, 0); |
1563 | | | 1563 | |
1564 | /* Reset TSF. */ | | 1564 | /* Reset TSF. */ |
1565 | urtwn_write_1(sc, R92C_DUAL_TSF_RST, 0x03); | | 1565 | urtwn_write_1(sc, R92C_DUAL_TSF_RST, 0x03); |
1566 | | | 1566 | |
1567 | /* Disable TSF synchronization. */ | | 1567 | /* Disable TSF synchronization. */ |
1568 | urtwn_write_1(sc, R92C_BCN_CTRL, | | 1568 | urtwn_write_1(sc, R92C_BCN_CTRL, |
1569 | urtwn_read_1(sc, R92C_BCN_CTRL) | | | 1569 | urtwn_read_1(sc, R92C_BCN_CTRL) | |
1570 | R92C_BCN_CTRL_DIS_TSF_UDT0); | | 1570 | R92C_BCN_CTRL_DIS_TSF_UDT0); |
1571 | | | 1571 | |
1572 | /* Back to 20MHz mode */ | | 1572 | /* Back to 20MHz mode */ |
1573 | urtwn_set_chan(sc, ic->ic_bss->ni_chan, | | 1573 | urtwn_set_chan(sc, ic->ic_curchan, |
1574 | IEEE80211_HTINFO_2NDCHAN_NONE); | | 1574 | IEEE80211_HTINFO_2NDCHAN_NONE); |
1575 | | | 1575 | |
1576 | if (ic->ic_opmode == IEEE80211_M_IBSS || | | 1576 | if (ic->ic_opmode == IEEE80211_M_IBSS || |
1577 | ic->ic_opmode == IEEE80211_M_HOSTAP) { | | 1577 | ic->ic_opmode == IEEE80211_M_HOSTAP) { |
1578 | /* Stop BCN */ | | 1578 | /* Stop BCN */ |
1579 | urtwn_write_1(sc, R92C_BCN_CTRL, | | 1579 | urtwn_write_1(sc, R92C_BCN_CTRL, |
1580 | urtwn_read_1(sc, R92C_BCN_CTRL) & | | 1580 | urtwn_read_1(sc, R92C_BCN_CTRL) & |
1581 | ~(R92C_BCN_CTRL_EN_BCN | R92C_BCN_CTRL_TXBCN_RPT)); | | 1581 | ~(R92C_BCN_CTRL_EN_BCN | R92C_BCN_CTRL_TXBCN_RPT)); |
1582 | } | | 1582 | } |
1583 | | | 1583 | |
1584 | /* Reset EDCA parameters. */ | | 1584 | /* Reset EDCA parameters. */ |
1585 | urtwn_write_4(sc, R92C_EDCA_VO_PARAM, 0x002f3217); | | 1585 | urtwn_write_4(sc, R92C_EDCA_VO_PARAM, 0x002f3217); |
1586 | urtwn_write_4(sc, R92C_EDCA_VI_PARAM, 0x005e4317); | | 1586 | urtwn_write_4(sc, R92C_EDCA_VI_PARAM, 0x005e4317); |
| @@ -2143,28 +2143,28 @@ urtwn_tx(struct urtwn_softc *sc, struct | | | @@ -2143,28 +2143,28 @@ urtwn_tx(struct urtwn_softc *sc, struct |
2143 | if (wh->i_fc[1] & IEEE80211_FC1_WEP) { | | 2143 | if (wh->i_fc[1] & IEEE80211_FC1_WEP) { |
2144 | k = ieee80211_crypto_encap(ic, ni, m); | | 2144 | k = ieee80211_crypto_encap(ic, ni, m); |
2145 | if (k == NULL) | | 2145 | if (k == NULL) |
2146 | return ENOBUFS; | | 2146 | return ENOBUFS; |
2147 | | | 2147 | |
2148 | /* packet header may have moved, reset our local pointer */ | | 2148 | /* packet header may have moved, reset our local pointer */ |
2149 | wh = mtod(m, struct ieee80211_frame *); | | 2149 | wh = mtod(m, struct ieee80211_frame *); |
2150 | } | | 2150 | } |
2151 | | | 2151 | |
2152 | if (__predict_false(sc->sc_drvbpf != NULL)) { | | 2152 | if (__predict_false(sc->sc_drvbpf != NULL)) { |
2153 | struct urtwn_tx_radiotap_header *tap = &sc->sc_txtap; | | 2153 | struct urtwn_tx_radiotap_header *tap = &sc->sc_txtap; |
2154 | | | 2154 | |
2155 | tap->wt_flags = 0; | | 2155 | tap->wt_flags = 0; |
2156 | tap->wt_chan_freq = htole16(ic->ic_bss->ni_chan->ic_freq); | | 2156 | tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); |
2157 | tap->wt_chan_flags = htole16(ic->ic_bss->ni_chan->ic_flags); | | 2157 | tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); |
2158 | if (wh->i_fc[1] & IEEE80211_FC1_WEP) | | 2158 | if (wh->i_fc[1] & IEEE80211_FC1_WEP) |
2159 | tap->wt_flags |= IEEE80211_RADIOTAP_F_WEP; | | 2159 | tap->wt_flags |= IEEE80211_RADIOTAP_F_WEP; |
2160 | | | 2160 | |
2161 | bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m); | | 2161 | bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m); |
2162 | } | | 2162 | } |
2163 | | | 2163 | |
2164 | if ((hasqos = IEEE80211_QOS_HAS_SEQ(wh))) { | | 2164 | if ((hasqos = IEEE80211_QOS_HAS_SEQ(wh))) { |
2165 | /* data frames in 11n mode */ | | 2165 | /* data frames in 11n mode */ |
2166 | struct ieee80211_qosframe *qwh = (void *)wh; | | 2166 | struct ieee80211_qosframe *qwh = (void *)wh; |
2167 | tid = qwh->i_qos[0] & IEEE80211_QOS_TID; | | 2167 | tid = qwh->i_qos[0] & IEEE80211_QOS_TID; |
2168 | qid = TID_TO_WME_AC(tid); | | 2168 | qid = TID_TO_WME_AC(tid); |
2169 | } else if (type != IEEE80211_FC0_TYPE_DATA) { | | 2169 | } else if (type != IEEE80211_FC0_TYPE_DATA) { |
2170 | /* Use AC_VO for management frames. */ | | 2170 | /* Use AC_VO for management frames. */ |
| @@ -3777,27 +3777,26 @@ urtwn_init(struct ifnet *ifp) | | | @@ -3777,27 +3777,26 @@ urtwn_init(struct ifnet *ifp) |
3777 | /* 1T1R */ | | 3777 | /* 1T1R */ |
3778 | urtwn_bb_write(sc, R92C_FPGA0_RFPARAM(0), | | 3778 | urtwn_bb_write(sc, R92C_FPGA0_RFPARAM(0), |
3779 | urtwn_bb_read(sc, R92C_FPGA0_RFPARAM(0)) | __BIT(13)); | | 3779 | urtwn_bb_read(sc, R92C_FPGA0_RFPARAM(0)) | __BIT(13)); |
3780 | } | | 3780 | } |
3781 | | | 3781 | |
3782 | /* Initialize GPIO setting. */ | | 3782 | /* Initialize GPIO setting. */ |
3783 | urtwn_write_1(sc, R92C_GPIO_MUXCFG, | | 3783 | urtwn_write_1(sc, R92C_GPIO_MUXCFG, |
3784 | urtwn_read_1(sc, R92C_GPIO_MUXCFG) & ~R92C_GPIO_MUXCFG_ENBT); | | 3784 | urtwn_read_1(sc, R92C_GPIO_MUXCFG) & ~R92C_GPIO_MUXCFG_ENBT); |
3785 | | | 3785 | |
3786 | /* Fix for lower temperature. */ | | 3786 | /* Fix for lower temperature. */ |
3787 | urtwn_write_1(sc, 0x15, 0xe9); | | 3787 | urtwn_write_1(sc, 0x15, 0xe9); |
3788 | | | 3788 | |
3789 | /* Set default channel. */ | | 3789 | /* Set default channel. */ |
3790 | ic->ic_bss->ni_chan = ic->ic_curchan; | | | |
3791 | urtwn_set_chan(sc, ic->ic_curchan, IEEE80211_HTINFO_2NDCHAN_NONE); | | 3790 | urtwn_set_chan(sc, ic->ic_curchan, IEEE80211_HTINFO_2NDCHAN_NONE); |
3792 | | | 3791 | |
3793 | /* Queue Rx xfers. */ | | 3792 | /* Queue Rx xfers. */ |
3794 | for (i = 0; i < URTWN_RX_LIST_COUNT; i++) { | | 3793 | for (i = 0; i < URTWN_RX_LIST_COUNT; i++) { |
3795 | data = &sc->rx_data[i]; | | 3794 | data = &sc->rx_data[i]; |
3796 | usbd_setup_xfer(data->xfer, sc->rx_pipe, data, data->buf, | | 3795 | usbd_setup_xfer(data->xfer, sc->rx_pipe, data, data->buf, |
3797 | URTWN_RXBUFSZ, USBD_SHORT_XFER_OK | USBD_NO_COPY, | | 3796 | URTWN_RXBUFSZ, USBD_SHORT_XFER_OK | USBD_NO_COPY, |
3798 | USBD_NO_TIMEOUT, urtwn_rxeof); | | 3797 | USBD_NO_TIMEOUT, urtwn_rxeof); |
3799 | error = usbd_transfer(data->xfer); | | 3798 | error = usbd_transfer(data->xfer); |
3800 | if (__predict_false(error != USBD_NORMAL_COMPLETION && | | 3799 | if (__predict_false(error != USBD_NORMAL_COMPLETION && |
3801 | error != USBD_IN_PROGRESS)) | | 3800 | error != USBD_IN_PROGRESS)) |
3802 | goto fail; | | 3801 | goto fail; |
3803 | } | | 3802 | } |