 @@ -1,14 +1,14 @@
-/*	$NetBSD: dwc_otg.c,v 1.28 2013/01/19 14:33:51 skrll Exp $	*/
+/*	$NetBSD: dwc_otg.c,v 1.29 2013/01/21 07:37:06 skrll Exp $	*/
 /*-
  * Copyright (c) 2012 Hans Petter Selasky. All rights reserved.
  * Copyright (c) 2010-2011 Aleksandr Rybalko. All rights reserved.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
 @@ -50,27 +50,27 @@
  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  */
 /*
  * Designware USB 2.0 OTG
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: dwc_otg.c,v 1.28 2013/01/19 14:33:51 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: dwc_otg.c,v 1.29 2013/01/21 07:37:06 skrll Exp $");
 #include <sys/param.h>
 #include <sys/systm.h>
 #include <sys/kmem.h>
 #include <sys/kernel.h>
 #include <sys/device.h>
 #include <sys/select.h>
 #include <sys/proc.h>
 #include <sys/queue.h>
 #include <sys/cpu.h>
 #include <machine/endian.h>
 @@ -1172,49 +1172,49 @@ dwc_otg_root_ctrl_done(usbd_xfer_handle
 Static usbd_status
 dwc_otg_root_intr_transfer(usbd_xfer_handle xfer)
+{
 	struct dwc_otg_softc *sc = xfer->pipe->device->bus->hci_private;
 	usbd_status err;
 	DPRINTF("\n");
 	/* Insert last in queue. */
 	mutex_enter(&sc->sc_lock);
 	err = usb_insert_transfer(xfer);
 	mutex_exit(&sc->sc_lock);
 	if (err)
-		return (err);
+		return err;
 	/* Pipe isn't running, start first */
-	return (dwc_otg_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
+	return dwc_otg_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue));
+}
 Static usbd_status
 dwc_otg_root_intr_start(usbd_xfer_handle xfer)
+{
 	usbd_pipe_handle pipe = xfer->pipe;
 	struct dwc_otg_softc *sc = pipe->device->bus->hci_private;
 	DPRINTF("\n");
 	if (sc->sc_dying)
-		return (USBD_IOERROR);
+		return USBD_IOERROR;
 	mutex_enter(&sc->sc_lock);
 	KASSERT(sc->sc_intrxfer == NULL);
 	sc->sc_intrxfer = xfer;
 	mutex_exit(&sc->sc_lock);
-	return (USBD_IN_PROGRESS);
+	return USBD_IN_PROGRESS;
+}
 /* Abort a root interrupt request. */
 Static void
 dwc_otg_root_intr_abort(usbd_xfer_handle xfer)
+{
 #ifdef DIAGNOSTIC
 	struct dwc_otg_softc *sc = xfer->pipe->device->bus->hci_private;
 #endif
 	DPRINTF("xfer=%p\n", xfer);
 	KASSERT(mutex_owned(&sc->sc_lock));
 @@ -1252,30 +1252,30 @@ dwc_otg_device_ctrl_transfer(usbd_xfer_h
 	struct dwc_otg_softc *sc = xfer->pipe->device->bus->hci_private;
 	usbd_status err;
 	DPRINTF("\n");
 	dwc_otg_xfer_setup(xfer);
 	dwc_otg_setup_ctrl_chain(xfer);
 	/* Insert last in queue. */
 	mutex_enter(&sc->sc_lock);
 	err = usb_insert_transfer(xfer);
 	mutex_exit(&sc->sc_lock);
 	if (err)
-		return (err);
+		return err;
 	/* Pipe isn't running, start first */
-	return (dwc_otg_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
+	return dwc_otg_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue));
+}
 Static usbd_status
 dwc_otg_device_ctrl_start(usbd_xfer_handle xfer)
+{
 	struct dwc_otg_softc *sc = xfer->pipe->device->bus->hci_private;
 	DPRINTF("\n");
 	mutex_enter(&sc->sc_lock);
 	xfer->status = USBD_IN_PROGRESS;
 	dwc_otg_xfer_start(xfer);
 	mutex_exit(&sc->sc_lock);
 @@ -1336,27 +1336,27 @@ dwc_otg_device_bulk_transfer(usbd_xfer_h
 #endif
 	dwc_otg_xfer_setup(xfer);
 	dwc_otg_setup_bulk_chain(xfer);
 	/* Insert last in queue. */
 	mutex_enter(&sc->sc_lock);
 	err = usb_insert_transfer(xfer);
 	mutex_exit(&sc->sc_lock);
 	if (err)
 		return err;
 	/* Pipe isn't running, start first */
-	return (dwc_otg_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
+	return dwc_otg_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue));
+}
 Static usbd_status
 dwc_otg_device_bulk_start(usbd_xfer_handle xfer)
+{
 	struct dwc_otg_softc *sc = xfer->pipe->device->bus->hci_private;
 	DPRINTF("xfer=%p\n", xfer);
 	mutex_enter(&sc->sc_lock);
 	xfer->status = USBD_IN_PROGRESS;
 	dwc_otg_xfer_start(xfer);
 	mutex_exit(&sc->sc_lock);
 @@ -1413,27 +1413,27 @@ dwc_otg_device_intr_transfer(usbd_xfer_h
 	DPRINTF("\n");
 	dwc_otg_xfer_setup(xfer);
 	dwc_otg_setup_intr_chain(xfer);
 	/* Insert last in queue. */
 	mutex_enter(&sc->sc_lock);
 	err = usb_insert_transfer(xfer);
 	mutex_exit(&sc->sc_lock);
 	if (err)
 		return err;
 	/* Pipe isn't running, start first */
-	return (dwc_otg_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
+	return dwc_otg_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue));
+}
 Static usbd_status
 dwc_otg_device_intr_start(usbd_xfer_handle xfer)
+{
 	struct dwc_otg_pipe *dpipe = (struct dwc_otg_pipe *)xfer->pipe;
 	usbd_device_handle dev = dpipe->pipe.device;
 	struct dwc_otg_softc *sc = dev->bus->hci_private;
 	DPRINTF("\n");
 	mutex_enter(&sc->sc_lock);
 	xfer->status = USBD_IN_PROGRESS;
 @@ -1507,27 +1507,27 @@ dwc_otg_device_isoc_transfer(usbd_xfer_h
 	usbd_status err;
 	DPRINTF("\n");
 	panic("not yet\n");
 	/* Insert last in queue. */
 	mutex_enter(&sc->sc_lock);
 	err = usb_insert_transfer(xfer);
 	mutex_exit(&sc->sc_lock);
 	if (err)
 		return err;
 	/* Pipe isn't running, start first */
-	return (dwc_otg_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
+	return dwc_otg_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue));
+}
 #if 0
 void
 dwc_otg_device_isoc_enter(usbd_xfer_handle xfer)
+{
 	struct dwc_otg_pipe *dpipe = (struct dwc_otg_pipe *)xfer->pipe;
 	usbd_device_handle dev = dpipe->pipe.device;
 	struct dwc_otg_softc *sc = dev->bus->hci_private;
 	DPRINTF("\n");
 	sc = sc;
 @@ -2182,31 +2182,31 @@ dwc_otg_host_channel_wait(struct dwc_otg
+{
 	struct dwc_otg_softc *sc;
 	uint8_t x;
 	x = td->channel;
 	DPRINTF("CH=%d\n", x);
 	/* get pointer to softc */
 	sc = DWC_OTG_TD2SC(td);
 	if (sc->sc_chan_state[x].wait_sof == 0) {
 		dwc_otg_clear_hcint(sc, x);
-		return (1);	/* done */
+		return 1;	/* done */
+	}
 	if (x == 0)
-		return (0);	/* wait */
+		return 0;	/* wait */
 	/* find new disabled channel */
 	for (x = 1; x != sc->sc_host_ch_max; x++) {
 		if (sc->sc_chan_state[x].allocated)
 			continue;
 		if (sc->sc_chan_state[x].wait_sof != 0)
 			continue;
 		sc->sc_chan_state[td->channel].allocated = 0;
 		sc->sc_chan_state[x].allocated = 1;
 		if (sc->sc_chan_state[td->channel].suspended) {
 @@ -2224,42 +2224,42 @@ dwc_otg_host_channel_wait(struct dwc_otg
 		if (sc->sc_last_rx_status != 0 &&
 		    GRXSTSRD_CHNUM_GET(sc->sc_last_rx_status) == td->channel) {
 			/* get rid of message */
 			dwc_otg_common_rx_ack(sc);
+		}
 		/* move active channel */
 		sc->sc_active_rx_ep &= ~(1 << td->channel);
 		sc->sc_active_rx_ep |= (1 << x);
 		/* set channel */
 		td->channel = x;
-		return (1);	/* new channel allocated */
+		return 1;	/* new channel allocated */
+	}
-	return (0);	/* wait */
+	return 0;	/* wait */
+}
 static uint8_t
 dwc_otg_host_channel_alloc(struct dwc_otg_td *td)
+{
 	struct dwc_otg_softc *sc;
 	uint8_t x;
 	uint8_t max_channel;
 	DPRINTFN(9, "\n");
 	if (td->channel < DWC_OTG_MAX_CHANNELS) {
-		return (0);		/* already allocated */
+		return 0;		/* already allocated */
+	}
 	/* get pointer to softc */
 	sc = DWC_OTG_TD2SC(td);
 	if ((td->hcchar & HCCHAR_EPNUM_MASK) == 0) {
 		max_channel = 1;
 		x = 0;
 	} else {
 		max_channel = sc->sc_host_ch_max;
 		x = 1;
+	}
 @@ -2274,29 +2274,29 @@ dwc_otg_host_channel_alloc(struct dwc_ot
 		/* clear interrupts */
 		dwc_otg_clear_hcint(sc, x);
 		DPRINTF("CH=%d HCCHAR=0x%08x HCSPLT=0x%08x\n",
 		    x, td->hcchar, td->hcsplt);
 		/* set active channel */
 		sc->sc_active_rx_ep |= (1 << x);
 		/* set channel */
 		td->channel = x;
-		return (0);	/* allocated */
+		return 0;	/* allocated */
+	}
-	return (1);	/* busy */
+	return 1;	/* busy */
+}
 static void
 dwc_otg_host_channel_disable(struct dwc_otg_softc *sc, uint8_t x)
+{
 	uint32_t hcchar;
 	if (sc->sc_chan_state[x].wait_sof != 0)
 		return;
 	hcchar = DWC_OTG_READ_4(sc, DOTG_HCCHAR(x));
 	if (hcchar & (HCCHAR_CHENA | HCCHAR_CHDIS)) {
 		/* disable channel */
 @@ -2341,50 +2341,50 @@ dwc_otg_host_channel_free(struct dwc_otg
 	/* clear active channel */
 	sc->sc_active_rx_ep &= ~(1 << x);
+}
 static uint8_t
 dwc_otg_host_setup_tx(struct dwc_otg_td *td)
+{
 	usb_device_request_t req __aligned(4);
 	struct dwc_otg_softc *sc;
 	uint32_t hcint;
 	uint32_t hcchar;
 	if (dwc_otg_host_channel_alloc(td))
-		return (1);		/* busy */
+		return 1;		/* busy */
 	/* get pointer to softc */
 	sc = DWC_OTG_TD2SC(td);
 	hcint = sc->sc_chan_state[td->channel].hcint;
 	DPRINTF("CH=%d ST=%d HCINT=0x%08x HCCHAR=0x%08x HCTSIZ=0x%08x\n",
 	    td->channel, td->state, hcint,
 	    DWC_OTG_READ_4(sc, DOTG_HCCHAR(td->channel)),
 	    DWC_OTG_READ_4(sc, DOTG_HCTSIZ(td->channel)));
 	if (hcint & (HCINT_RETRY | HCINT_ACK | HCINT_NYET)) {
 		/* give success bits priority over failure bits */
 	} else if (hcint & HCINT_STALL) {
 		DPRINTF("CH=%d STALL\n", td->channel);
 		td->error_stall = 1;
 		td->error_any = 1;
-		return (0);		/* complete */
+		return 0;		/* complete */
 	} else if (hcint & HCINT_ERRORS) {
 		td->errcnt++;
 		if (td->hcsplt != 0 || td->errcnt >= 3) {
 			td->error_any = 1;
-			return (0);		/* complete */
+			return 0;		/* complete */
+		}
+	}
 	/* channel must be disabled before we can complete the transfer */
 	if (hcint & (HCINT_ERRORS | HCINT_RETRY | HCINT_ACK | HCINT_NYET)) {
 		dwc_otg_host_channel_disable(sc, td->channel);
 		if (!(hcint & HCINT_ERRORS))
 			td->errcnt = 0;
+	}
 @@ -2395,27 +2395,27 @@ dwc_otg_host_setup_tx(struct dwc_otg_td
 	case DWC_CHAN_ST_WAIT_ANE:
 		if (hcint & (HCINT_RETRY | HCINT_ERRORS)) {
 			if (!dwc_otg_host_channel_wait(td))
 				break;
 			td->did_nak = 1;
 			goto send_pkt;
+		}
 		if (hcint & (HCINT_ACK | HCINT_NYET)) {
 			if (!dwc_otg_host_channel_wait(td))
 				break;
 			td->offset += td->tx_bytes;
 			td->remainder -= td->tx_bytes;
 			td->toggle = 1;
-			return (0);	/* complete */
+			return 0;	/* complete */
+		}
 		break;
 	case DWC_CHAN_ST_WAIT_S_ANE:
 		if (hcint & (HCINT_RETRY | HCINT_ERRORS)) {
 			if (!dwc_otg_host_channel_wait(td))
 				break;
 			td->did_nak = 1;
 			goto send_pkt;
+		}
 		if (hcint & (HCINT_ACK | HCINT_NYET)) {
 			if (!dwc_otg_host_channel_wait(td))
 				break;
 			goto send_cpkt;
 @@ -2429,55 +2429,55 @@ dwc_otg_host_setup_tx(struct dwc_otg_td
+		}
 		if (hcint & (HCINT_RETRY | HCINT_ERRORS)) {
 			if (!dwc_otg_host_channel_wait(td))
 				break;
 			td->did_nak = 1;
 			goto send_pkt;
+		}
 		if (hcint & HCINT_ACK) {
 			if (!dwc_otg_host_channel_wait(td))
 				break;
 			td->offset += td->tx_bytes;
 			td->remainder -= td->tx_bytes;
 			td->toggle = 1;
-			return (0);	/* complete */
+			return 0;	/* complete */
+		}
 		break;
 	case DWC_CHAN_ST_TX_PKT_SYNC:
 		goto send_pkt_sync;
 	default:
 		break;
+	}
-	return (1);		/* busy */
+	return 1;		/* busy */
 send_pkt:
 	if (sizeof(req) != td->remainder) {
 		td->error_any = 1;
-		return (0);		/* complete */
+		return 0;		/* complete */
+	}
 send_pkt_sync:
 	if (td->hcsplt != 0) {
 		uint32_t count;
 		count = DWC_OTG_READ_4(sc, DOTG_HFNUM) & 7;
 		/* check for not first microframe */
 		if (count != 0) {
 			/* enable SOF interrupt */
 			dwc_otg_enable_sof_irq(sc);
 			/* set state */
 			td->state = DWC_CHAN_ST_TX_PKT_SYNC;
 			dwc_otg_host_channel_free(td);
-			return (1);	/* busy */
+			return 1;	/* busy */
+		}
 		td->hcsplt &= ~HCSPLT_COMPSPLT;
 		td->state = DWC_CHAN_ST_WAIT_S_ANE;
 	} else {
 		td->state = DWC_CHAN_ST_WAIT_ANE;
+	}
 	/* XXX Why ? */
 	usbd_copy_out(td->buf, 0, &req, sizeof(req));
 	DWC_OTG_WRITE_4(sc, DOTG_HCTSIZ(td->channel),
 	    (sizeof(req) << HCTSIZ_XFERSIZE_SHIFT) |
 @@ -2490,45 +2490,45 @@ send_pkt_sync:
 	hcchar &= ~HCCHAR_EPDIR_IN;
 	/* must enable channel before writing data to FIFO */
 	DWC_OTG_WRITE_4(sc, DOTG_HCCHAR(td->channel), hcchar);
 	/* transfer data into FIFO */
 	bus_space_write_region_4(sc->sc_iot, sc->sc_ioh,
 	    DOTG_DFIFO(td->channel), (uint32_t *)&req, sizeof(req) / 4);
 	/* store number of bytes transmitted */
 	td->tx_bytes = sizeof(req);
-	return (1);	/* busy */
+	return 1;	/* busy */
 send_cpkt:
 	td->hcsplt |= HCSPLT_COMPSPLT;
 	td->state = DWC_CHAN_ST_WAIT_C_ANE;
 	DWC_OTG_WRITE_4(sc, DOTG_HCTSIZ(td->channel),
 	    (HCTSIZ_PID_SETUP << HCTSIZ_PID_SHIFT));
 	DWC_OTG_WRITE_4(sc, DOTG_HCSPLT(td->channel), td->hcsplt);
 	hcchar = td->hcchar;
 	hcchar &= ~HCCHAR_EPDIR_IN;
 	/* must enable channel before writing data to FIFO */
 	DWC_OTG_WRITE_4(sc, DOTG_HCCHAR(td->channel), hcchar);
-	return (1);	/* busy */
+	return 1;	/* busy */
+}
 static uint8_t
 dwc_otg_host_rate_check(struct dwc_otg_td *td)
+{
 	struct dwc_otg_softc *sc;
 	uint8_t ep_type;
 	/* get pointer to softc */
 	sc = DWC_OTG_TD2SC(td);
 	ep_type = ((td->hcchar &
 	    HCCHAR_EPTYPE_MASK) >> HCCHAR_EPTYPE_SHIFT);
 @@ -2549,71 +2549,71 @@ dwc_otg_host_rate_check(struct dwc_otg_t
 		if (delta >= 128)
 			goto busy;
 		td->tmr_val = sc->sc_tmr_val + td->tmr_res;
 	} else if (td->did_nak != 0) {
 		goto busy;
+	}
 	if (ep_type == UE_ISOCHRONOUS) {
 		td->toggle = 0;
 	} else if (td->set_toggle) {
 		td->set_toggle = 0;
 		td->toggle = 1;
+	}
-	return (0);
+	return 0;
 busy:
-	return (1);
+	return 1;
+}
 static uint8_t
 dwc_otg_host_data_rx(struct dwc_otg_td *td)
+{
 	struct dwc_otg_softc *sc;
 	uint32_t hcint;
 	uint32_t hcchar;
 	uint32_t count;
 	uint8_t ep_type;
 	if (dwc_otg_host_channel_alloc(td))
-		return (1);		/* busy */
+		return 1;		/* busy */
 	/* get pointer to softc */
 	sc = DWC_OTG_TD2SC(td);
 	ep_type = ((td->hcchar &
 	    HCCHAR_EPTYPE_MASK) >> HCCHAR_EPTYPE_SHIFT);
 	hcint = sc->sc_chan_state[td->channel].hcint;
 	DPRINTF("CH=%d ST=%d HCINT=0x%08x HCCHAR=0x%08x HCTSIZ=0x%08x\n",
 	    td->channel, td->state, hcint,
 	    DWC_OTG_READ_4(sc, DOTG_HCCHAR(td->channel)),
 	    DWC_OTG_READ_4(sc, DOTG_HCTSIZ(td->channel)));
 	/* check interrupt bits */
 	if (hcint & (HCINT_RETRY | HCINT_ACK | HCINT_NYET)) {
 		/* give success bits priority over failure bits */
 	} else if (hcint & HCINT_STALL) {
 		DPRINTF("CH=%d STALL\n", td->channel);
 		td->error_stall = 1;
 		td->error_any = 1;
-		return (0);		/* complete */
+		return 0;		/* complete */
 	} else if (hcint & HCINT_ERRORS) {
 		DPRINTF("CH=%d ERROR\n", td->channel);
 		td->errcnt++;
 		if (td->hcsplt != 0 || td->errcnt >= 3) {
 			td->error_any = 1;
-			return (0);		/* complete */
+			return 0;		/* complete */
+		}
+	}
 	/* channel must be disabled before we can complete the transfer */
 	if (hcint & (HCINT_ERRORS | HCINT_RETRY | HCINT_ACK | HCINT_NYET)) {
 		dwc_otg_host_channel_disable(sc, td->channel);
 		if (!(hcint & HCINT_ERRORS))
 			td->errcnt = 0;
+	}
 @@ -2646,38 +2646,38 @@ dwc_otg_host_data_rx(struct dwc_otg_td *
 		/* verify the packet byte count */
 		if (count != td->max_packet_size) {
 			if (count < td->max_packet_size) {
 				/* we have a short packet */
 				td->short_pkt = 1;
 				td->got_short = 1;
 			} else {
 				/* invalid USB packet */
 				td->error_any = 1;
 				/* release FIFO */
 				dwc_otg_common_rx_ack(sc);
-				return (0);	/* we are complete */
+				return 0;	/* we are complete */
+			}
+		}
 		/* verify the packet byte count */
 		if (count > td->remainder) {
 			/* invalid USB packet */
 			td->error_any = 1;
 			/* release FIFO */
 			dwc_otg_common_rx_ack(sc);
-			return (0);		/* we are complete */
+			return 0;		/* we are complete */
+		}
 		usbd_copy_in(td->buf, td->offset,
 		    sc->sc_rx_bounce_buffer, count);
 		td->remainder -= count;
 		td->offset += count;
 		td->actlen += count;
  		hcint |= HCINT_SOFTWARE_ONLY | HCINT_ACK;
 		sc->sc_chan_state[td->channel].hcint = hcint;
 		break;
 	default:
 		DPRINTF("OTHER\n");
 @@ -2712,27 +2712,27 @@ check_state:
 						break;
 					goto receive_pkt;
+				}
+			}
 			break;
+		}
 		if (hcint & (HCINT_ACK | HCINT_NYET)) {
 			if (!dwc_otg_host_channel_wait(td))
 				break;
 			/* check if we are complete */
 			if ((td->remainder == 0) || (td->got_short != 0)) {
 				if (td->short_pkt)
-					return (0);	/* complete */
+					return 0;	/* complete */
 				/*
 				 * Else need to receive a zero length
 				 * packet.
 				 */
+			}
 			if (td->hcsplt != 0)
 				goto receive_spkt;
 			else
 				goto receive_pkt;
+		}
 		break;
 @@ -2856,68 +2856,68 @@ receive_spkt_sync:
 	DWC_OTG_WRITE_4(sc, DOTG_HCTSIZ(td->channel),
 	    (td->toggle ? (HCTSIZ_PID_DATA1 << HCTSIZ_PID_SHIFT) :
 	    (HCTSIZ_PID_DATA0 << HCTSIZ_PID_SHIFT)));
 	DWC_OTG_WRITE_4(sc, DOTG_HCSPLT(td->channel), td->hcsplt);
 	hcchar = td->hcchar;
 	hcchar |= HCCHAR_EPDIR_IN;
 	/* must enable channel before data can be received */
 	DWC_OTG_WRITE_4(sc, DOTG_HCCHAR(td->channel), hcchar);
 busy:
-	return (1);	/* busy */
+	return 1;	/* busy */
+}
 static uint8_t
 dwc_otg_host_data_tx(struct dwc_otg_td *td)
+{
 	struct dwc_otg_softc *sc;
 	uint32_t count;
 	uint32_t hcint;
 	uint32_t hcchar;
 	uint8_t ep_type;
 	if (dwc_otg_host_channel_alloc(td))
-		return (1);		/* busy */
+		return 1;		/* busy */
 	/* get pointer to softc */
 	sc = DWC_OTG_TD2SC(td);
 	ep_type = ((td->hcchar &
 	    HCCHAR_EPTYPE_MASK) >> HCCHAR_EPTYPE_SHIFT);
 	hcint = sc->sc_chan_state[td->channel].hcint;
 	DPRINTF("CH=%d ST=%d HCINT=0x%08x HCCHAR=0x%08x HCTSIZ=0x%08x\n",
 	    td->channel, td->state, hcint,
 	    DWC_OTG_READ_4(sc, DOTG_HCCHAR(td->channel)),
 	    DWC_OTG_READ_4(sc, DOTG_HCTSIZ(td->channel)));
 	if (hcint & (HCINT_RETRY | HCINT_ACK | HCINT_NYET)) {
 		/* give success bits priority over failure bits */
 	} else if (hcint & HCINT_STALL) {
 		DPRINTF("CH=%d STALL\n", td->channel);
 		td->error_stall = 1;
 		td->error_any = 1;
-		return (0);		/* complete */
+		return 0;		/* complete */
 	} else if (hcint & HCINT_ERRORS) {
 		DPRINTF("CH=%d ERROR\n", td->channel);
 		td->errcnt++;
 		if (td->hcsplt != 0 || td->errcnt >= 3) {
 			td->error_any = 1;
-			return (0);		/* complete */
+			return 0;		/* complete */
+		}
+	}
 	/* channel must be disabled before we can complete the transfer */
 	if (hcint & (HCINT_ERRORS | HCINT_RETRY | HCINT_ACK | HCINT_NYET)) {
 		dwc_otg_host_channel_disable(sc, td->channel);
 		if (!(hcint & HCINT_ERRORS))
 			td->errcnt = 0;
+	}
 @@ -2934,27 +2934,27 @@ dwc_otg_host_data_tx(struct dwc_otg_td *
+		}
 		if (hcint & (HCINT_ACK | HCINT_NYET)) {
 			if (!dwc_otg_host_channel_wait(td))
 				break;
 			td->actlen += td->tx_bytes;
 			td->offset += td->tx_bytes;
 			td->remainder -= td->tx_bytes;
 			td->toggle ^= 1;
 			/* check remainder */
 			if (td->remainder == 0) {
 				if (td->short_pkt)
-					return (0);	/* complete */
+					return 0;	/* complete */
 				/*
 				 * Else we need to transmit a short
 				 * packet:
 				 */
+			}
 			goto send_pkt;
+		}
 		break;
 	case DWC_CHAN_ST_WAIT_S_ANE:
 		if (hcint & (HCINT_RETRY | HCINT_ERRORS)) {
 			if (!dwc_otg_host_channel_wait(td))
 				break;
 @@ -2980,27 +2980,27 @@ dwc_otg_host_data_tx(struct dwc_otg_td *
 			goto send_pkt;
+		}
 		if (hcint & HCINT_ACK) {
 			if (!dwc_otg_host_channel_wait(td))
 				break;
 			td->actlen += td->tx_bytes;
 			td->offset += td->tx_bytes;
 			td->remainder -= td->tx_bytes;
 			td->toggle ^= 1;
 			/* check remainder */
 			if (td->remainder == 0) {
 				if (td->short_pkt)
-					return (0);	/* complete */
+					return 0;	/* complete */
 				/* else we need to transmit a short packet */
+			}
 			goto send_pkt;
+		}
 		break;
 	case DWC_CHAN_ST_TX_PKT:
 		goto send_pkt;
 	case DWC_CHAN_ST_TX_PKT_SYNC:
 		goto send_pkt_sync;
 @@ -3100,27 +3100,27 @@ send_cpkt:
 	DWC_OTG_WRITE_4(sc, DOTG_HCTSIZ(td->channel),
 	    (td->toggle ? (HCTSIZ_PID_DATA1 << HCTSIZ_PID_SHIFT) :
 	    (HCTSIZ_PID_DATA0 << HCTSIZ_PID_SHIFT)));
 	DWC_OTG_WRITE_4(sc, DOTG_HCSPLT(td->channel), td->hcsplt);
 	hcchar = td->hcchar;
 	hcchar &= ~HCCHAR_EPDIR_IN;
 	/* must enable channel before writing data to FIFO */
 	DWC_OTG_WRITE_4(sc, DOTG_HCCHAR(td->channel), hcchar);
 busy:
-	return (1);	/* busy */
+	return 1;	/* busy */
+}
 uint32_t fifoenters;
 static uint8_t
 dwc_otg_xfer_do_fifo(usbd_xfer_handle xfer)
+{
 	struct dwc_otg_xfer *dxfer = (struct dwc_otg_xfer *)xfer;
 	struct dwc_otg_td *td;
 	uint8_t toggle;
 	uint8_t channel;
 	uint8_t tmr_val;
 	uint8_t tmr_res;
 @@ -3154,32 +3154,32 @@ dwc_otg_xfer_do_fifo(usbd_xfer_handle xf
 		 */
 		tmr_res = td->tmr_res;
 		tmr_val = td->tmr_val;
 		toggle = td->toggle;
 		channel = td->channel;
 		td = td->obj_next;
 		dxfer->td_transfer_cache = td;
 		td->toggle = toggle;	/* transfer toggle */
 		td->channel = channel;	/* transfer channel */
 		td->tmr_res = tmr_res;
 		td->tmr_val = tmr_val;
+	}
-	return (1);			/* not complete */
+	return 1;			/* not complete */
 done:
 	/* compute all actual lengths */
 	dwc_otg_standard_done(xfer);
-	return (0);			/* complete */
+	return 0;			/* complete */
+}
 Static void
 dwc_otg_timer_tick(void *_sc)
+{
 	struct dwc_otg_softc *sc = _sc;
 	workqueue_enqueue(sc->sc_wq, (struct work *)&sc->sc_timer_work, NULL);
+}
 Static void
 dwc_otg_timer(struct dwc_otg_softc *sc)
+{
 @@ -4044,27 +4044,27 @@ dwc_otg_standard_done_sub(usbd_xfer_hand
 		td = td->obj_next;
 		/* this USB frame is complete */
 		error = 0;
 		break;
 	} while (0);
 	/* update transfer cache */
 	dxfer->td_transfer_cache = td;
-	return (error);
+	return error;
+}
 Static void
 dwc_otg_standard_done(usbd_xfer_handle xfer)
+{
 	struct dwc_otg_xfer *dxfer = DWC_OTG_XFER2DXFER(xfer);
 	struct dwc_otg_td *td;
 	usbd_status err = 0;
 	DPRINTFN(13, "xfer=%p endpoint=%p transfer done\n",
 	    xfer, xfer->pipe->endpoint);