 @@ -1,779 +1,783 @@
-/*	$NetBSD: locore.S,v 1.7 2013/01/20 03:40:55 tsutsui Exp $	*/
+/*	$NetBSD: locore.S,v 1.8 2013/01/21 11:58:12 tsutsui Exp $	*/
 /*
  * Copyright (c) 1992 OMRON Corporation.
+ *
  * This code is derived from software contributed to Berkeley by
  * OMRON Corporation.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
  * 3. All advertising materials mentioning features or use of this software
  *    must display the following acknowledgement:
  *	This product includes software developed by the University of
  *	California, Berkeley and its contributors.
  * 4. Neither the name of the University nor the names of its contributors
  *    may be used to endorse or promote products derived from this software
  *    without specific prior written permission.
+ *
  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
+ *
  *	@(#)locore.s	8.1 (Berkeley) 6/10/93
  */
 /*
  * Copyright (c) 1990, 1993
  *	The Regents of the University of California.  All rights reserved.
+ *
  * This code is derived from software contributed to Berkeley by
  * OMRON Corporation.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
  * 3. Neither the name of the University nor the names of its contributors
  *    may be used to endorse or promote products derived from this software
  *    without specific prior written permission.
+ *
  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
+ *
  *	@(#)locore.s	8.1 (Berkeley) 6/10/93
  */
 /* For _C_LABEL() and friends. */
 #include <m68k/asm.h>
 #define	T_BUSERR	0
 #define	T_ADDRERR	1
 #define	T_ILLINST	2
 #define	T_ZERODIV	3
 #define	T_CHKINST	4
 #define	T_TRAPVINST	5
 #define	T_PRIVINST	6
 #define	T_MMUFLT	8
 #define	T_FMTERR	10
 #define	T_FPERR		11
 #define	T_COPERR	12
 #define	PSL_LOWIPL	0x2000		/* PSL_S | PSL_IPL0 */
 #define	PSL_HIGHIPL	0x2700		/* PSL_S | PSL_IPL7 */
 #define	SPL1		0x2100		/* PSL_S | PSL_IPL1 */
 #define	SPL2		0x2200		/* PSL_S | PSL_IPL2 */
 #define	SPL3		0x2300		/* PSL_S | PSL_IPL3 */
 #define	SPL4		0x2400		/* PSL_S | PSL_IPL4 */
 #define	SPL5		0x2500		/* PSL_S | PSL_IPL5 */
 #define	SPL6		0x2600		/* PSL_S | PSL_IPL6 */
 #define	CLOCK_REG	0x63000000
 #define	CLK_CLR		1
 #define	ILLGINST	16
 #define	NMIVEC		124
 #define	EVTRAPF		188
 	.text
 ASENTRY_NOPROFILE(start)
 ASGLOBAL(Reset)
 	jmp _C_LABEL(start1)	/* 0: NOT USED (reset PC) */
 	.word	0		/* 1: NOT USED (reset PC) */
 	VECTOR(buserr)		/* 2: bus error */
 	VECTOR(addrerr)		/* 3: address error */
 	VECTOR(illinst)		/* 4: illegal instruction */
 	VECTOR(zerodiv)		/* 5: zero divide */
 	VECTOR(chkinst)		/* 6: CHK instruction */
 	VECTOR(trapvinst)	/* 7: TRAPV instruction */
 	VECTOR(privinst)	/* 8: privilege violation */
 	VECTOR(badtrap)		/* 9: trace */
 	VECTOR(illinst)		/* 10: line 1010 emulator */
 	VECTOR(illinst)		/* 11: line 1111 emulator */
 	VECTOR(badtrap)		/* 12: unassigned, reserved */
 	VECTOR(coperr)		/* 13: coprocessor protocol violation */
 	VECTOR(fmterr)		/* 14: format error */
 	VECTOR(badtrap)		/* 15: uninitialized interrupt vector */
 	VECTOR(badtrap)		/* 16: unassigned, reserved */
 	VECTOR(badtrap)		/* 17: unassigned, reserved */
 	VECTOR(badtrap)		/* 18: unassigned, reserved */
 	VECTOR(badtrap)		/* 19: unassigned, reserved */
 	VECTOR(badtrap)		/* 20: unassigned, reserved */
 	VECTOR(badtrap)		/* 21: unassigned, reserved */
 	VECTOR(badtrap)		/* 22: unassigned, reserved */
 	VECTOR(badtrap)		/* 23: unassigned, reserved */
 	VECTOR(badtrap)		/* 24: unassigned, reserved */
 	VECTOR(badtrap)		/* 25: unassigned, reserved */
 	VECTOR(lev2intr)	/* 26: level 2 interrupt autovector */
 	VECTOR(lev3intr)	/* 27: level 3 interrupt autovector */
 	VECTOR(badtrap)		/* 28: level 4 interrupt autovector */
 	VECTOR(lev5intr)	/* 29: level 5 interrupt autovector */
 	VECTOR(lev6intr)	/* 30: level 6 interrupt autovector */
 	VECTOR(badtrap)		/* 31: level 7 interrupt autovector */
 	VECTOR(illinst)		/* 32: syscalls */
 	VECTOR(illinst)		/* 33: sigreturn syscall or breakpoint */
 	VECTOR(illinst)		/* 34: breakpoint or sigreturn syscall */
 	VECTOR(illinst)		/* 35: TRAP instruction vector */
 	VECTOR(illinst)		/* 36: TRAP instruction vector */
 	VECTOR(illinst)		/* 37: TRAP instruction vector */
 	VECTOR(illinst)		/* 38: TRAP instruction vector */
 	VECTOR(illinst)		/* 39: TRAP instruction vector */
 	VECTOR(illinst)		/* 40: TRAP instruction vector */
 	VECTOR(illinst)		/* 41: TRAP instruction vector */
 	VECTOR(illinst)		/* 42: TRAP instruction vector */
 	VECTOR(illinst)		/* 43: TRAP instruction vector */
 	VECTOR(illinst)		/* 44: TRAP instruction vector */
 	VECTOR(illinst)		/* 45: TRAP instruction vector */
 	VECTOR(illinst)		/* 45: TRAP instruction vector */
 	VECTOR(illinst)		/* 47: TRAP instruction vector */
  	VECTOR(fptrap)		/* 48: FPCP branch/set on unordered cond */
  	VECTOR(fptrap)		/* 49: FPCP inexact result */
  	VECTOR(fptrap)		/* 50: FPCP divide by zero */
  	VECTOR(fptrap)		/* 51: FPCP underflow */
  	VECTOR(fptrap)		/* 52: FPCP operand error */
  	VECTOR(fptrap)		/* 53: FPCP overflow */
  	VECTOR(fptrap)		/* 54: FPCP signalling NAN */
 	VECTOR(badtrap)		/* 55: unassigned, reserved */
 	VECTOR(badtrap)		/* 56: unassigned, reserved */
 	VECTOR(badtrap)		/* 57: unassigned, reserved */
 	VECTOR(badtrap)		/* 58: unassigned, reserved */
 	VECTOR(badtrap)		/* 59: unassigned, reserved */
 	VECTOR(badtrap)		/* 60: unassigned, reserved */
 	VECTOR(badtrap)		/* 61: unassigned, reserved */
 	VECTOR(badtrap)		/* 62: unassigned, reserved */
 	VECTOR(badtrap)		/* 63: unassigned, reserved */
 #define BADTRAP16       \
 	VECTOR(badtrap) ; VECTOR(badtrap) ; \
 	VECTOR(badtrap) ; VECTOR(badtrap) ; \
 	VECTOR(badtrap) ; VECTOR(badtrap) ; \
 	VECTOR(badtrap) ; VECTOR(badtrap) ; \
 	VECTOR(badtrap) ; VECTOR(badtrap) ; \
 	VECTOR(badtrap) ; VECTOR(badtrap) ; \
 	VECTOR(badtrap) ; VECTOR(badtrap) ; \
 	VECTOR(badtrap) ; VECTOR(badtrap)
 	BADTRAP16		/* 64-255: user interrupt vectors */
 	BADTRAP16		/* 64-255: user interrupt vectors */
 	BADTRAP16		/* 64-255: user interrupt vectors */
 	BADTRAP16		/* 64-255: user interrupt vectors */
 	BADTRAP16		/* 64-255: user interrupt vectors */
 	BADTRAP16		/* 64-255: user interrupt vectors */
 	BADTRAP16		/* 64-255: user interrupt vectors */
 	BADTRAP16		/* 64-255: user interrupt vectors */
 	BADTRAP16		/* 64-255: user interrupt vectors */
 	BADTRAP16		/* 64-255: user interrupt vectors */
 	BADTRAP16		/* 64-255: user interrupt vectors */
 	BADTRAP16		/* 64-255: user interrupt vectors */
 	STACK = 0x800000
 	DIPSW = 0x49000000
 ASENTRY_NOPROFILE(start1)
 	movw	#PSL_HIGHIPL,%sr	| no interrupts
 	movl	#STACK,%sp		| set SP
 	movl	#_C_LABEL(prgcore), %a2	| save program address
 	movl	#_ASM_LABEL(Reset), %a2@+	| save start of core
 	movl	#_C_LABEL(end),  %a2@+	| save end of core
 	movl	#STACK, %a2@		| save initial stack addr
 /* clear BSS area */
 	movl	#_C_LABEL(edata),%a2	| start of BSS
 	movl	#_C_LABEL(end),%a3	| end
 Lbssclr:
 	clrb	%a2@+			| clear BSS
 	cmpl	%a2,%a3			| done?
 	bne	Lbssclr			| no, keep going
 /* save address to goto ROM monitor */
 	movec	%vbr,%a0		| ROM vbr to %a0
 	movl	%a0@(NMIVEC),%d0	| restore NMIVEC
 	movl	#_ASM_LABEL(gotoROM),%a0	| save to _gotoROM
 	movl	%d0,%a0@		|
 	movl	#_ASM_LABEL(Reset),%a0	| BP vbr to %a0
 	movl	#_C_LABEL(exit),%a0@(NMIVEC)	| save address
 /* switch vector tabel */
 	movec	%vbr,%a0
 	movl	%a0@(ILLGINST),%sp@-	| save ILLINST vector for BrkPtr
 	movl	%a0@(EVTRAPF),%sp@-
 	movl	#_ASM_LABEL(Reset),%a0
 	movl	%sp@+,%a0@(EVTRAPF)
 	movl	%sp@+,%a0@(ILLGINST)	| restore ILLINST vector
 	movec	%a0,%vbr
 	movl	#DIPSW,%a0
 	movw	%a0@,%d0
 	lsrl	#8,%d0
 	andl	#0xFF,%d0
 	movl	%d0,_C_LABEL(dipsw1)
 	movw	%a0@,%d0
 	andl	#0xFF,%d0
 	movl	%d0,_C_LABEL(dipsw2)
 /* determine our CPU */
 	/* XXX should be generated via assym.h */
 	CACHE_OFF = 0x0808
 	DC_FREEZE = 0x0200
 	CPU_68030 = 1
 	CPU_68040 = 2
 	movl	#CACHE_OFF,%d0
 	movc	%d0,%cacr		| clear and disable on-chip cache(s)
 	movl	#DC_FREEZE,%d0		| data freeze bit
 	movc	%d0,%cacr		|   only exists on 68030
 	movc	%cacr,%d0		| read it back
 	tstl	%d0			| zero?
 	jeq	Lnot68030		| yes, we have 68040
 	movl	#CPU_68030,%d0
 	jra	Lstart0
 Lnot68030:
 	movl	#CPU_68040,%d0
 Lstart0:
 	movl	%d0,_C_LABEL(cputype)
 /* final setup for C code */
 	movw	#PSL_LOWIPL,%sr		| no interrupts
 	jsr	_C_LABEL(main)		| lets go
 	jsr	start
 /*
  * exit to ROM monitor
  */
 	ROM_VBR = 0
 ENTRY_NOPROFILE(exit)
 GLOBAL(_rtt)
 	movw	#PSL_HIGHIPL,%sr	| no interrupts
 	movl	#ROM_VBR,%a0
 	movec	%a0,%vbr
 	movl	#_ASM_LABEL(gotoROM),%a0
 	movl	%a0@,%a1
 	jmp	%a1@
 /*
  * Trap/interrupt vector routines
  */
 ENTRY_NOPROFILE(buserr)
 	tstl	_C_LABEL(nofault)	| device probe?
 	jeq	_C_LABEL(addrerr)	| no, handle as usual
 	movl	_C_LABEL(nofault),%sp@-	| yes,
 	jbsr	_C_LABEL(longjmp)	|  longjmp(nofault)
 ENTRY_NOPROFILE(addrerr)
 	clrw	%sp@-			| pad SR to longword
 	moveml	#0xFFFF,%sp@-		| save user registers
 	movl	%usp,%a0		| save the user SP
 	movl	%a0,%sp@(60)		|   in the savearea
 	lea	%sp@(64),%a1		| grab base of HW berr frame
 	movw	%a1@(12),%d0		| grab SSW for fault processing
 	btst	#12,%d0			| RB set?
 	jeq	LbeX0			| no, test RC
 	bset	#14,%d0			| yes, must set FB
 	movw	%d0,%a1@(12)		| for hardware too
 LbeX0:
 	btst	#13,%d0			| RC set?
 	jeq	LbeX1			| no, skip
 	bset	#15,%d0			| yes, must set FC
 	movw	%d0,%a1@(12)		| for hardware too
 LbeX1:
 	btst	#8,%d0			| data fault?
 	jeq	Lbe0			| no, check for hard cases
 	movl	%a1@(18),%d1		| fault address is as given in frame
 	jra	Lbe10			| thats it
 Lbe0:
 	btst	#4,%a1@(8)		| long (type B) stack frame?
 	jne	Lbe4			| yes, go handle
 	movl	%a1@(4),%d1		| no, can use save PC
 	btst	#14,%d0			| FB set?
 	jeq	Lbe3			| no, try FC
 	addql	#4,%d1			| yes, adjust address
 	jra	Lbe10			| done
 Lbe3:
 	btst	#15,%d0			| FC set?
 	jeq	Lbe10			| no, done
 	addql	#2,%d1			| yes, adjust address
 	jra	Lbe10			| done
 Lbe4:
 	movl	%a1@(38),%d1		| long format, use stage B address
 	btst	#15,%d0			| FC set?
 	jeq	Lbe10			| no, all done
 	subql	#2,%d1			| yes, adjust address
 Lbe10:
 	movl	%d1,%sp@-		| push fault VA
 	movw	%d0,%sp@-		| and SSW
 	clrw	%sp@-			|   padded to longword
 	movw	%a1@(8),%d0		| get frame format/vector offset
 	andw	#0x0FFF,%d0		| clear out frame format
 	cmpw	#12,%d0			| address error vector?
 	jeq	Lisaerr			| yes, go to it
 #if 0
 	movl	%d1,%a0			| fault address
 	.long	0xf0109e11		| ptestr #1,%a0@,#7
 	.long	0xf0176200		| pmove %psr,%sp@
 	btst	#7,%sp@			| bus error bit set?
 	jeq	Lismerr			| no, must be MMU fault
 	clrw	%sp@			| yes, re-clear pad word
 #endif
 	jra	Lisberr			| and process as normal bus error
 Lismerr:
 	movl	#T_MMUFLT,%sp@-		| show that we are an MMU fault
 	jra	Lbexit			| and deal with it
 Lisaerr:
 	movl	#T_ADDRERR,%sp@-	| mark address error
 	jra	Lbexit			| and deal with it
 Lisberr:
 	movl	#T_BUSERR,%sp@-		| mark bus error
 Lbexit:
 	jbsr	_C_LABEL(trap)		| handle the error
 	lea	%sp@(12),%sp		| pop value args
 	movl	%sp@(60),%a0		| restore user SP
 	movl	%a0,%usp		|   from save area
 	moveml	%sp@+,#0x7FFF		| restore most user regs
 	addql	#4,%sp			| toss SSP
 	tstw	%sp@+			| do we need to clean up stack?
 	jeq	_ASM_LABEL(rei)		| no, just continue
 	btst	#7,%sp@(6)		| type 9/10/11 frame?
 	jeq	_ASM_LABEL(rei)		| no, nothing to do
 	btst	#5,%sp@(6)		| type 9?
 	jne	Lbex1			| no, skip
 	movw	%sp@,%sp@(12)		| yes, push down SR
 	movl	%sp@(2),%sp@(14)	| and PC
 	clrw	%sp@(18)		| and mark as type 0 frame
 	lea	%sp@(12),%sp		| clean the excess
 	jra	_ASM_LABEL(rei)		| all done
 Lbex1:
 	btst	#4,%sp@(6)		| type 10?
 	jne	Lbex2			| no, skip
 	movw	%sp@,%sp@(24)		| yes, push down SR
 	movl	%sp@(2),%sp@(26)	| and PC
 	clrw	%sp@(30)		| and mark as type 0 frame
 	lea	%sp@(24),%sp		| clean the excess
 	jra	_ASM_LABEL(rei)		| all done
 Lbex2:
 	movw	%sp@,%sp@(84)		| type 11, push down SR
 	movl	%sp@(2),%sp@(86)	| and PC
 	clrw	%sp@(90)		| and mark as type 0 frame
 	lea	%sp@(84),%sp		| clean the excess
 	jra	_ASM_LABEL(rei)		| all done
 ENTRY_NOPROFILE(illinst)
 	clrw	%sp@-
 	moveml	#0xFFFF,%sp@-
 	moveq	#T_ILLINST,%d0
 	jra	_C_LABEL(fault)
 ENTRY_NOPROFILE(zerodiv)
 	clrw	%sp@-
 	moveml	#0xFFFF,%sp@-
 	moveq	#T_ZERODIV,%d0
 	jra	_C_LABEL(fault)
 ENTRY_NOPROFILE(chkinst)
 	clrw	%sp@-
 	moveml	#0xFFFF,%sp@-
 	moveq	#T_CHKINST,%d0
 	jra	_C_LABEL(fault)
 ENTRY_NOPROFILE(trapvinst)
 	clrw	%sp@-
 	moveml	#0xFFFF,%sp@-
 	moveq	#T_TRAPVINST,%d0
 	jra	_C_LABEL(fault)
 ENTRY_NOPROFILE(privinst)
 	clrw	%sp@-
 	moveml	#0xFFFF,%sp@-
 	moveq	#T_PRIVINST,%d0
 	jra	_C_LABEL(fault)
 ENTRY_NOPROFILE(coperr)
 	clrw	%sp@-
 	moveml	#0xFFFF,%sp@-
 	moveq	#T_COPERR,%d0
 	jra	_C_LABEL(fault)
 ENTRY_NOPROFILE(fmterr)
 	clrw	%sp@-
 	moveml	#0xFFFF,%sp@-
 	moveq	#T_FMTERR,%d0
 	jra	_C_LABEL(fault)
 ENTRY_NOPROFILE(fptrap)
 #ifdef FPCOPROC
 	clrw	%sp@-		| pad SR to longword
 	moveml	#0xFFFF,%sp@-	| save user registers
 	movl	%usp,%a0	| and save
 	movl	%a0,%sp@(60)	|   the user stack pointer
 	clrl	%sp@-		| no VA arg
 #if 0
 	lea	_u+PCB_FPCTX,%a0	| address of FP savearea
 	.word	0xf310		| fsave %a0@
 	tstb	%a0@		| null state frame?
 	jeq	Lfptnull	| yes, safe
 	clrw	%d0		| no, need to tweak BIU
 	movb	a0@(1),d0	| get frame size
 	bset	#3,%a0@(0,%d0:w)	| set exc_pend bit of BIU
 Lfptnull:
 	.word	0xf227,0xa800	| fmovem %fpsr,%sp@- (code arg)
 	.word	0xf350		| frestore %a0@
 #else
 	clrl	%sp@-		| push dummy FPSR
 #endif
 	movl	#T_FPERR,%sp@-	| push type arg
 	jbsr	_C_LABEL(trap)	| call trap
 	lea	%sp@(12),%sp	| pop value args
 	movl	%sp@(60),%a0	| restore
 	movl	%a0,%usp	|   user SP
 	moveml	%sp@+,#0x7FFF	| and remaining user registers
 	addql	#6,%sp		| pop SSP and align word
 	jra	_ASM_LABEL(rei)	| all done
 #else
 	jra	_C_LABEL(badtrap)	| treat as an unexpected trap
 #endif
 ENTRY_NOPROFILE(fault)
 	movl	%usp,%a0	| get and save
 	movl	%a0,%sp@(60)	|   the user stack pointer
 	clrl	%sp@-		| no VA arg
 	clrl	%sp@-		| or code arg
 	movl	%d0,%sp@-	| push trap type
 	jbsr	_C_LABEL(trap)	| handle trap
 	lea	%sp@(12),%sp	| pop value args
 	movl	%sp@(60),%a0	| restore
 	movl	%a0,%usp	|   user SP
 	moveml	%sp@+,#0x7FFF	| restore most user regs
 	addql	#6,%sp		| pop SP and pad word
 	jra	_ASM_LABEL(rei)	| all done
 ENTRY_NOPROFILE(badtrap)
 	clrw	%sp@-
 	moveml	#0xC0C0,%sp@-
 	movw	%sp@(24),%sp@-
 	clrw	%sp@-
 	jbsr	_C_LABEL(straytrap)
 	addql	#4,%sp
 	moveml	%sp@+,#0x0303
 	addql	#2,%sp
 	jra	_ASM_LABEL(rei)
 /*
  * Interrupt handlers.
  * All device interrupts are auto-vectored.  Most can be configured
  * to interrupt in the range IPL2 to IPL6.  Here are our assignments:
+ *
  *	Level 0:
  *	Level 1:
  *	Level 2:	SCSI SPC
  *	Level 3:
  *	Level 4:
  *	Level 5:	System Clock
  *	Level 6:	Internal SIO used uPD7201A
  *	Level 7:	Non-maskable: Abort Key (Dispatched vector to ROM monitor)
  */
 ENTRY_NOPROFILE(lev2intr)
 	clrw	%sp@-
 	moveml	#0xC0C0,%sp@-
 	jbsr	_C_LABEL(scintr)
 	moveml	%sp@+,#0x0303
 	addql	#2,%sp
 	jra	_ASM_LABEL(rei)
 ENTRY_NOPROFILE(lev3intr)
 	clrw	%sp@-
 	moveml	#0xC0C0,%sp@-
 	jbsr	_C_LABEL(lance_intr)
 	moveml	%sp@+,#0x0303
 	addql	#2,%sp
 	jra	_ASM_LABEL(rei)
 ENTRY_NOPROFILE(lev5intr)
 	clrw	%sp@-			| push pad word
 	moveml	#0xC0C0,%sp@-		| save scratch regs
 	movl	#CLOCK_REG,%a0		| get clock CR addr
 	movb	#CLK_CLR,%a0@		| reset system clock
 	lea	%sp@(16),%a1		| get pointer to PS
 	movl	%a1@,%sp@-		| push padded PS
 	movl	%a1@(4),%sp@-		| push PC
 	jbsr	_C_LABEL(hardclock)	| call generic clock int routine
 	addql	#8,%sp			| pop params
 	moveml	%sp@+,#0x0303		| restore scratch regs
 	addql	#2,%sp			| pop pad word
 	jra	_ASM_LABEL(rei)		| all done
 ENTRY_NOPROFILE(hardclock)
 	addql	#1,_C_LABEL(tick)
 	rts
 BSS(tick,4)
 ENTRY_NOPROFILE(lev6intr)
 	clrw	%sp@-
 	moveml	#0xC0C0,%sp@-
 	jbsr	_C_LABEL(_siointr)
 	moveml	%sp@+,#0x0303
 	addql	#2,%sp
 	jra	_ASM_LABEL(rei)
 /*
  * Emulation of VAX REI instruction.
+ *
  * This code deals with checking for and servicing ASTs
  * (profiling, scheduling) and software interrupts (network, softclock).
  * We check for ASTs first, just like the VAX.  To avoid excess overhead
  * the T_ASTFLT handling code will also check for software interrupts so we
  * do not have to do it here.
+ *
  * This code is complicated by the fact that sendsig may have been called
  * necessitating a stack cleanup.  A cleanup should only be needed at this
  * point for coprocessor mid-instruction frames (type 9), but we also test
  * for bus error frames (type 10 and 11).
  */
 #if 0
 	.comm	_ssir,1
 ASENTRY_NOPROFILE(rei)
 #ifdef DEBUG
 	tstl	_C_LABEL(panicstr)		| have we paniced?
 	jne	Ldorte			| yes, do not make matters worse
 #endif
 	btst	#PCB_ASTB,_u+PCB_FLAGS+1| AST pending?
 	jeq	Lchksir			| no, go check for SIR
 	btst	#5,%sp@			| yes, are we returning to user mode?
 	jne	Lchksir			| no, go check for SIR
 	clrw	%sp@-			| pad SR to longword
 	moveml	#0xFFFF,%sp@-		| save all registers
 	movl	%usp,%a1		| including
 	movl	%a1,%sp@(60)		|    the users SP
 	clrl	%sp@-			| VA == none
 	clrl	%sp@-			| code == none
 	movl	#T_ASTFLT,%sp@-		| type == async system trap
 	jbsr	_C_LABEL(trap)		| go handle it
 	lea	%sp@(12),%sp		| pop value args
 	movl	%sp@(60),%a0		| restore
 	movl	%a0,%usp		|   user SP
 	moveml	%sp@+,#0x7FFF		| and all remaining registers
 	addql	#4,%sp			| toss SSP
 	tstw	%sp@+			| do we need to clean up stack?
 	jeq	Ldorte			| no, just continue
 	btst	#7,%sp@(6)		| type 9/10/11 frame?
 	jeq	Ldorte			| no, nothing to do
 	btst	#5,%sp@(6)		| type 9?
 	jne	Last1			| no, skip
 	movw	%sp@,%sp@(12)		| yes, push down SR
 	movl	%sp@(2),%sp@(14)	| and PC
 	clrw	%sp@(18)		| and mark as type 0 frame
 	lea	%sp@(12),%sp		| clean the excess
 	jra	Ldorte			| all done
 Last1:
 	btst	#4,%sp@(6)		| type 10?
 	jne	Last2			| no, skip
 	movw	%sp@,%sp@(24)		| yes, push down SR
 	movl	%sp@(2),%sp@(26)	| and PC
 	clrw	%sp@(30)		| and mark as type 0 frame
 	lea	%sp@(24),%sp		| clean the excess
 	jra	Ldorte			| all done
 Last2:
 	movw	%sp@,%sp@(84)		| type 11, push down SR
 	movl	%sp@(2),%sp@(86)	| and PC
 	clrw	%sp@(90)		| and mark as type 0 frame
 	lea	%sp@(84),%sp		| clean the excess
 	jra	Ldorte			| all done
 Lchksir:
 	tstb	_ssir			| SIR pending?
 	jeq	Ldorte			| no, all done
 	movl	%d0,%sp@-		| need a scratch register
 	movw	%sp@(4),%d0		| get SR
 	andw	#PSL_IPL7,%d0		| mask all but IPL
 	jne	Lnosir			| came from interrupt, no can do
 	movl	%sp@+,%d0		| restore scratch register
 Lgotsir:
 	movw	#SPL1,%sr		| prevent others from servicing int
 	tstb	_ssir			| too late?
 	jeq	Ldorte			| yes, oh well...
 	clrw	%sp@-			| pad SR to longword
 	moveml	#0xFFFF,%sp@-		| save all registers
 	movl	%usp,%a1		| including
 	movl	%a1,%sp@(60)		|    the users SP
 	clrl	%sp@-			| VA == none
 	clrl	%sp@-			| code == none
 	movl	#T_SSIR,%sp@-		| type == software interrupt
 	jbsr	_trap			| go handle it
 	lea	%sp@(12),%sp		| pop value args
 	movl	%sp@(60),%a0		| restore
 	movl	%a0,%usp		|   user SP
 	moveml	%sp@+,#0x7FFF		| and all remaining registers
 	addql	#6,%sp			| pop SSP and align word
 	rte
 Lnosir:
 	movl	%sp@+,%d0		| restore scratch register
 Ldorte:
 #else
 ASENTRY_NOPROFILE(rei)			| dummy Entry of rei
 #endif
 	rte				| real return
 /*
  * non-local gotos
  */
 ALTENTRY(savectx, _setjmp)
 ENTRY(setjmp)
 	movl	%sp@(4),%a0	| savearea pointer
 	moveml	#0xFCFC,%a0@	| save d2-d7/a2-a7
 	movl	%sp@,%a0@(48)	| and return address
 	moveq	#0,%d0		| return 0
 	rts
 ENTRY(qsetjmp)
 	movl	%sp@(4),%a0	| savearea pointer
 	lea	%a0@(40),%a0	| skip regs we do not save
 	movl	%a6,%a0@+		| save FP
 	movl	%sp,%a0@+		| save SP
 	movl	%sp@,%a0@		| and return address
 	moveq	#0,%d0		| return 0
 	rts
 ENTRY(longjmp)
 	movl	%sp@(4),%a0
 	moveml	%a0@+,#0xFCFC
 	movl	%a0@,%sp@
 	moveq	#1,%d0
 	rts
 ENTRY_NOPROFILE(getsfc)
 	movc	%sfc,%d0
 	rts
 ENTRY_NOPROFILE(getdfc)
 	movc	%dfc,%d0
 	rts
 /*
  * Set processor priority level calls.  Most could (should) be replaced
  * by inline asm expansions.  However, SPL0 and SPLX require special
  * handling.  If we are returning to the base processor priority (SPL0)
  * we need to check for our emulated software interrupts.
  */
 ENTRY(spl0)
 	moveq	#0,%d0
 	movw	%sr,%d0			| get old SR for return
 	movw	#PSL_LOWIPL,%sr		| restore new SR
 |	jra	Lsplsir
 	rts
 ENTRY(splx)
 	moveq	#0,%d0
 	movw	%sr,%d0			| get current SR for return
 	movw	%sp@(6),%d1		| get new value
 	movw	%d1,%sr			| restore new SR
 |	andw	#PSL_IPL7,%d1		| mask all but PSL_IPL
 |	jne	Lspldone		| non-zero, all done
 |Lsplsir:
 |	tstb	_ssir			| software interrupt pending?
 |	jeq	Lspldone		| no, all done
 |	subql	#4,%sp			| make room for RTE frame
 |	movl	%sp@(4),%sp@(2)		| position return address
 |	clrw	%sp@(6)			| set frame type 0
 |	movw	#PSL_LOWIPL,%sp@	| and new SR
 |	jra	Lgotsir			| go handle it
 |Lspldone:
 	rts
 ENTRY(spl1)
 	moveq	#0,%d0
 	movw	%sr,%d0
 	movw	#SPL1,%sr
 	rts
 ALTENTRY(splscsi, _spl2)
 ENTRY(spl2)
 	moveq	#0,%d0
 	movw	%sr,%d0
 	movw	#SPL2,%sr
 	rts
 ENTRY(spl3)
 	moveq	#0,%d0
 	movw	%sr,%d0
 	movw	#SPL3,%sr
 	rts
 ENTRY(spl4)
 	moveq	#0,%d0
 	movw	%sr,%d0
 	movw	#SPL4,%sr
 	rts
 ENTRY(spl5)
 	moveq	#0,%d0
 	movw	%sr,%d0
 	movw	#SPL5,%sr
 	rts
 ENTRY(spl6)
 	moveq	#0,%d0
 	movw	%sr,%d0
 	movw	#SPL6,%sr
 	rts
 ALTENTRY(splhigh, _spl7)
 ENTRY(spl7)
 	moveq	#0,%d0
 	movw	%sr,%d0
 	movw	#PSL_HIGHIPL,%sr
 	rts
 	.data
 /*
  * Memory Infomation Field for secondary booter memory allocator
  */
 GLOBAL(prgcore)
 	.long	0
 	.long	0
 	.long	0
 ASLOCAL(gotoROM)
 	.long	0
 GLOBAL(dipsw1)
 	.long	0
 GLOBAL(dipsw2)
 	.long	0
 GLOBAL(cputype)
 	.long	CPU_68030

 @@ -1,228 +1,231 @@
-/*	$NetBSD: samachdep.h,v 1.7 2013/01/20 14:03:40 tsutsui Exp $	*/
+/*	$NetBSD: samachdep.h,v 1.8 2013/01/21 11:58:12 tsutsui Exp $	*/
 /*
  * Copyright (c) 1982, 1990, 1993
  *	The Regents of the University of California.  All rights reserved.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
  * 3. Neither the name of the University nor the names of its contributors
  *    may be used to endorse or promote products derived from this software
  *    without specific prior written permission.
+ *
  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
+ *
  *	@(#)samachdep.h	8.1 (Berkeley) 6/10/93
  */
 #include <sys/param.h>
 #include <m68k/frame.h>
 #include <lib/libsa/stand.h>
 #define	NSCSI		2
 #define NSD		8
 #define DK_NDRIVE	8
 #define MHZ_8		1
 #define MHZ_16		2
 #define MHZ_25		3
 #define MHZ_33		4
 #define MHZ_50		6
 #define MAXDEVNAME	16
 struct consdev;
 struct frame;
 typedef struct label_t {
 	int val[15];
 } label_t;
 /* autoconf.c */
 extern int cpuspeed;
 void configure(void);
 void find_devs(void);
 /* awaitkey.c */
 char awaitkey(const char *, int, bool);
 /* bmc.c */
 void bmccnprobe(struct consdev *);
 void bmccninit(struct consdev *);
 int  bmccngetc(dev_t);
 void bmccnputc(dev_t, int);
 /* bmd.c */
 void bmdinit(void);
 int bmdputc(int);
 void bmdadjust(short, short);
 void bmdclear(void);
 /* boot.c */
 extern int howto;
 extern char default_file[];
 int how_to_boot(int, char **);
 int boot(int, char **);
 int bootnetbsd(char *);
 /* clock.c */
 /* not yet */
 /* cons.c */
 void cninit(void);
 int cngetc(void);
 void cnputc(int);
 /* devopen.c */
 extern	u_int opendev;
 int atoi(char *);
 /* disklabel.c */
 extern u_char lbl_buff[];
 int disklabel(int, char **);
 /* exec.c */
 void exec_hp300(char *, u_long, int);
 /* font.c */
 extern u_short bmdfont[][20];
 /* fsdump.c */
 int fsdump(int, char **);
 int fsrestore(int, char **);
 /* getline.c */
 int getline(char *, char *);
 /* if_le.c */
 int leinit(void *);
 /* init_main.c */
 extern int cpuspeed;
 extern int hz;
 extern int nplane;
 extern int machtype;
 /* kbd.c */
 int kbd_decode(u_char);
 /* lance.c */
 void *lance_attach(int, void *, void *, uint8_t *);
 void *lance_cookie(int);
 uint8_t *lance_eaddr(void *);
 bool lance_init(void *);
 int lance_get(void *, void *, size_t);
 bool lance_put(void *, void *, size_t);
 bool lance_end(void *);
 int lance_intr(void);
 /* locore.S */
 extern	u_int bootdev;
 extern int dipsw1, dipsw2;
 extern int cputype;
 extern volatile uint32_t tick;
 int setjmp(label_t *);
 int splhigh(void);
 void splx(int);
 int getsfc(void);
 int getdfc(void);
 int spl0(void);
 int spl1(void);
 int spl2(void);
 int spl3(void);
 int spl4(void);
 int spl5(void);
 int spl6(void);
 /* ls.c */
 int cmd_ls(int, char **);
 /* machdep.c */
 void straytrap(int);
 int badaddr(volatile void *);
 void regdump(int *, int);
 char *hexstr(int, int);
 /* prf.c */
 #if 0
 int tgetchar(void);
 #endif
 /* parse.c */
 int check_args(int, char **);
 int exit_program(int, char **);
 int parse(int, char **);
 int getargs(char *, char **, int);
 /* romcons.c */
 void romcnprobe(struct consdev *);
 void romcninit(struct consdev *);
 int  romcngetc(dev_t);
 void romcnputc(dev_t, int);
 /* sc.c */
 struct scsi_fmt_cdb;
 int scsi_immed_command(int, int, int, struct scsi_fmt_cdb *, u_char *,
     unsigned int);
 int scsi_request_sense(int, int, int, u_char *, unsigned int);
 int scsi_test_unit_rdy(int, int, int);
 int scsi_format_unit(int, int, int);
 int scintr(void);
 /* scsi.c */
 int scsi(int, char **);
 int scsi_read_raw(u_int, u_int, u_int, u_char *, u_int);
 int scsi_read(u_int, u_char *, u_int);
 int scsi_write(u_int, u_char *, u_int);
 /* screen.c */
 int screen(int, char **);
 /* scsi.c */
 int scsi(int, char **);
 /* sd.c */
 int sdstrategy(void *, int, daddr_t, size_t, void *, size_t *);
 int sdopen(struct open_file *, ...);
 int sdclose(struct open_file *);
 /* sio.c */
 void _siointr(void);
 void siocnprobe(struct consdev *);
 void siocninit(struct consdev *);
 int  siocngetc(dev_t);
 void siocnputc(dev_t, int);
 void sioinit(void);
 /* tape.c */
 int tape(int, char **);
 /* trap.c */
 void trap(int, unsigned int, unsigned int, struct frame);
 /* ufs_disklabel.c */
 char *readdisklabel(int, int, struct disklabel *);
 #define DELAY(n)							\
 do {									\
 	register int __N = cpuspeed * (n);				\
 	do {								\
 		__asm("subql #1, %0" : "=r" (__N) : "0" (__N));		\
 	} while (__N > 0);						\
 } while (/* CONSTCOND */ 0)
 extern	struct fs_ops file_system_disk[];
 extern	int nfsys_disk;
 extern	struct fs_ops file_system_nfs[];
 extern	const char bootprog_name[], bootprog_rev[], bootprog_kernrev[];

 @@ -1,212 +1,213 @@
-/*	$NetBSD: boot.c,v 1.1 2013/01/05 17:44:24 tsutsui Exp $	*/
+/*	$NetBSD: boot.c,v 1.2 2013/01/21 11:58:12 tsutsui Exp $	*/
 /*
  * Copyright (c) 1992 OMRON Corporation.
+ *
  * This code is derived from software contributed to Berkeley by
  * OMRON Corporation.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
  * 3. All advertising materials mentioning features or use of this software
  *    must display the following acknowledgement:
  *	This product includes software developed by the University of
  *	California, Berkeley and its contributors.
  * 4. Neither the name of the University nor the names of its contributors
  *    may be used to endorse or promote products derived from this software
  *    without specific prior written permission.
+ *
  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
+ *
  *	@(#)boot.c	8.1 (Berkeley) 6/10/93
  */
 /*
  * Copyright (c) 1992, 1993
  *	The Regents of the University of California.  All rights reserved.
+ *
  * This code is derived from software contributed to Berkeley by
  * OMRON Corporation.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
  * 3. Neither the name of the University nor the names of its contributors
  *    may be used to endorse or promote products derived from this software
  *    without specific prior written permission.
+ *
  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
+ *
  *	@(#)boot.c	8.1 (Berkeley) 6/10/93
  */
 /*
  * boot.c -- boot program
  * by A.Fujita, MAR-01-1992
  */
 #include <sys/param.h>
 #include <sys/reboot.h>
 #include <sys/exec.h>
 #include <luna68k/stand/boot/samachdep.h>
 #include <luna68k/stand/boot/stinger.h>
 #include <luna68k/stand/boot/status.h>
 #include <lib/libsa/loadfile.h>
 int howto;
 static int get_boot_device(const char *, int *, int *, int *);
 struct exec header;
 char default_file[] = "sd(0,0)netbsd";
 char *how_to_info[] = {
 	"RB_ASKNAME	ask for file name to reboot from",
 	"RB_SINGLE	reboot to single user only",
 	"RB_NOSYNC	dont sync before reboot",
 	"RB_HALT	don't reboot, just halt",
 	"RB_INITNAME	name given for /etc/init (unused)",
 	"RB_DFLTROOT	use compiled-in rootdev",
 	"RB_KDB		give control to kernel debugger",
 	"RB_RDONLY	mount root fs read-only"
 };
 int
 how_to_boot(int argc, char *argv[])
+{
 	int i, h = howto;
 	if (argc < 2) {
 		printf("howto: 0x%s\n\n", hexstr(howto, 2));
 		if (h == 0) {
 			printf("\t%s\n", "RB_AUTOBOOT	flags for system auto-booting itself");
 		} else {
 			for (i = 0; i < 8; i++, h >>= 1) {
 				if (h & 0x01) {
 					printf("\t%s\n", how_to_info[i]);
+				}
+			}
+		}
 		printf("\n");
+	}
 	return ST_NORMAL;
+}
 int
 get_boot_device(const char *s, int *devp, int *unitp, int *partp)
+{
 	const char *p = s;
 	int unit, part;
 	while (*p != '(') {
 		if (*p == '\0')
 			goto error;
 		p++;
+	}
 	while (*++p != ',') {
 		if (*p == '\0')
 			goto error;
 		if (*p >= '0' && *p <= '9')
 			unit = (unit * 10) + (*p - '0');
+	}
 	while (*++p != ')') {
 		if (*p == '\0')
 			goto error;
 		if (*p >= '0' && *p <= '9')
 			part = (part * 10) + (*p - '0');
+	}
 	*devp  = 0;	/* XXX not yet */
 	*unitp = unit;	/* XXX should pass SCSI ID, not logical unit number */
 	*partp = part;
 	return 0;
 error:
 	return -1;
+}
 int
 boot(int argc, char *argv[])
+{
 	char *line;
 	if (argc < 2)
 		line = default_file;
 	else
 		line = argv[1];
 	printf("Booting %s\n", line);
 	return bootnetbsd(line);
+}
 int
 bootnetbsd(char *line)
+{
 	int io;
 	int dev, unit, part;
 	u_long marks[MARK_MAX];
 	void (*entry)(void);
 	if (get_boot_device(line, &dev, &unit, &part) != 0) {
 		printf("Bad file name %s\n", line);
 		return ST_ERROR;
+	}
 	/* Note marks[MARK_START] is passed as an load address offset */
 	memset(marks, 0, sizeof(marks));
 	io = loadfile(line, marks, LOAD_KERNEL);
 	if (io >= 0) {
 #ifdef DEBUG
 		printf("entry = 0x%lx\n", marks[MARK_ENTRY]);
 		printf("ssym  = 0x%lx\n", marks[MARK_SYM]);
 		printf("esym  = 0x%lx\n", marks[MARK_END]);
 #endif
 		/*
 		 * XXX TODO: fill bootinfo about symbols, boot device etc.
 		 */
 		entry = (void *)marks[MARK_ENTRY];
 		(*entry)();
+	}
 	printf("Booting kernel failed. (%s)\n", strerror(errno));
 	return ST_ERROR;
+}

 @@ -1,217 +1,233 @@
-/*	$NetBSD: init_main.c,v 1.4 2013/01/20 13:35:43 tsutsui Exp $	*/
+/*	$NetBSD: init_main.c,v 1.5 2013/01/21 11:58:12 tsutsui Exp $	*/
 /*
  * Copyright (c) 1992 OMRON Corporation.
+ *
  * This code is derived from software contributed to Berkeley by
  * OMRON Corporation.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
  * 3. All advertising materials mentioning features or use of this software
  *    must display the following acknowledgement:
  *	This product includes software developed by the University of
  *	California, Berkeley and its contributors.
  * 4. Neither the name of the University nor the names of its contributors
  *    may be used to endorse or promote products derived from this software
  *    without specific prior written permission.
+ *
  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
+ *
  *	@(#)init_main.c	8.2 (Berkeley) 8/15/93
  */
 /*
  * Copyright (c) 1992, 1993
  *	The Regents of the University of California.  All rights reserved.
+ *
  * This code is derived from software contributed to Berkeley by
  * OMRON Corporation.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
  * 3. Neither the name of the University nor the names of its contributors
  *    may be used to endorse or promote products derived from this software
  *    without specific prior written permission.
+ *
  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
+ *
  *	@(#)init_main.c	8.2 (Berkeley) 8/15/93
  */
 #include <sys/param.h>
 #include <machine/cpu.h>
 #include <luna68k/stand/boot/samachdep.h>
 #include <luna68k/stand/boot/stinger.h>
 #include <luna68k/stand/boot/romvec.h>
 #include <luna68k/stand/boot/status.h>
 #include <lib/libsa/loadfile.h>
 #ifdef SUPPORT_ETHERNET
 #include <lib/libsa/dev_net.h>
 #endif
 static int get_plane_numbers(void);
 static int reorder_dipsw(int);
 int cpuspeed;	/* for DELAY() macro */
 int hz = 60;
 int machtype;
 #define	VERS_LOCAL	"Phase-31"
 int nplane;
 /* KIFF */
 struct KernInter  KIFF;
 struct KernInter *kiff = &KIFF;
 /* for command parser */
 #define BUFFSIZE 100
 #define MAXARGS  30
 char buffer[BUFFSIZE];
 int   argc;
 char *argv[MAXARGS];
 #define BOOT_TIMEOUT 10
 int boot_timeout = BOOT_TIMEOUT;
 char  prompt[16] = "boot> ";
 void
 main(void)
+{
 	int i, status = 0;
 	const char *machstr;
 	/*
 	 * Initialize the console before we print anything out.
 	 */
 	if (cputype == CPU_68030) {
 		machtype = LUNA_I;
 		machstr  = "LUNA-I";
 		cpuspeed = MHZ_25;
 		hz = 60;
 	} else {
 		machtype = LUNA_II;
 		machstr  = "LUNA-II";
 		cpuspeed = MHZ_25 * 2;	/* XXX */
 		hz = 100;
+	}
 	nplane   = get_plane_numbers();
 	cninit();
 	printf("\n");
 	printf(">> %s, Revision %s\n", bootprog_name, bootprog_rev);
 	printf(">> (based on Stinger ver 0.0 [%s])\n", VERS_LOCAL);
 	printf("\n");
 	kiff->maxaddr = (void *) (ROM_memsize -1);
 	kiff->dipsw   = ~((dipsw2 << 8) | dipsw1) & 0xFFFF;
 	kiff->plane   = nplane;
 	i = (int) kiff->maxaddr + 1;
 	printf("Machine model   = %s\n", machstr);
 	printf("Physical Memory = 0x%x  ", i);
 	i >>= 20;
 	printf("(%d MB)\n", i);
 	printf("\n");
 	/*
 	 * IO configuration
 	 */
 #ifdef SUPPORT_ETHERNET
 	try_bootp = 1;
 #endif
 	find_devs();
 	configure();
 	printf("\n");
 	howto = reorder_dipsw(dipsw2);
 	if ((howto & 0xFE) == 0) {
-		printf("auto-boot %s\n", default_file);
+		char c;
 		bootnetbsd(default_file);
 		printf("Press return to boot now,"
 		    " any other key for boot menu\n");
 		printf("booting %s - starting in ", default_file);
 		c = awaitkey("%d seconds. ", boot_timeout, true);
 		if (c == '\r' || c == '\n' || c == 0) {
 			printf("auto-boot %s\n", default_file);
 			bootnetbsd(default_file);
+		}
+	}
 	/*
 	 * Main Loop
 	 */
 	printf("type \"help\" for help.\n");
 	do {
 		memset(buffer, 0, BUFFSIZE);
 		if (getline(prompt, buffer) > 0) {
 			argc = getargs(buffer, argv, sizeof(argv)/sizeof(char *));
 			status = parse(argc, argv);
 			if (status == ST_NOTFOUND)
 				printf("Command \"%s\" is not found !!\n", argv[0]);
+		}
 	} while(status != ST_EXIT);
 	exit(0);
+}
 int
 get_plane_numbers(void)
+{
 	int r = ROM_plane;
 	int n = 0;
 	for (; r ; r >>= 1)
 		if (r & 0x1)
 			n++;
 	return(n);
+}
 int
 reorder_dipsw(int dipsw)
+{
 	int i, sw = 0;
 	for (i = 0; i < 8; i++) {
 		if ((dipsw & 0x01) == 0)
 			sw += 1;
 		if (i == 7)
 			break;
 		sw <<= 1;
 		dipsw >>= 1;
+	}
 	return(sw);
+}

 @@ -1,166 +1,194 @@
-/*	$NetBSD: parse.c,v 1.2 2013/01/16 15:15:01 tsutsui Exp $	*/
+/*	$NetBSD: parse.c,v 1.3 2013/01/21 11:58:12 tsutsui Exp $	*/
 /*
  * Copyright (c) 1992 OMRON Corporation.
+ *
  * This code is derived from software contributed to Berkeley by
  * OMRON Corporation.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
  * 3. All advertising materials mentioning features or use of this software
  *    must display the following acknowledgement:
  *	This product includes software developed by the University of
  *	California, Berkeley and its contributors.
  * 4. Neither the name of the University nor the names of its contributors
  *    may be used to endorse or promote products derived from this software
  *    without specific prior written permission.
+ *
  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
+ *
  *	@(#)parse.c	8.1 (Berkeley) 6/10/93
  */
 /*
  * Copyright (c) 1992, 1993
  *	The Regents of the University of California.  All rights reserved.
+ *
  * This code is derived from software contributed to Berkeley by
  * OMRON Corporation.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
  * 3. Neither the name of the University nor the names of its contributors
  *    may be used to endorse or promote products derived from this software
  *    without specific prior written permission.
+ *
  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
+ *
  *	@(#)parse.c	8.1 (Berkeley) 6/10/93
  */
 /*
  * parse.c -- command parser
  * by A.Fujita, JAN-30-1992
  */
 #include <lib/libkern/libkern.h>
 #include <luna68k/stand/boot/samachdep.h>
 #include <luna68k/stand/boot/status.h>
 static int cmd_help(int, char *[]);
 int
 check_args(int argc, char *argv[])
+{
 	int i;
 	for ( i = 0; i < argc; i++)
 		printf("argv[%d] = \"%s\"\n", i, argv[i]);
 	return(ST_NORMAL);
+}
 int
 exit_program(int argc, char *argv[])
+{
 	return(ST_EXIT);
+}
 static const char helpmsg[] =
 	"commands are:\n"
 	"boot [device(unit,part)filename]\n"
 	" (ex. \"boot sd(0,0)netbsd\", \"boot le(0,0)netbsd.old\" etc.)\n"
 	"ls [device(unit, part)[path]]\n"
 	" (ex. \"ls sd(0,0)/bin\")\n"
 	"help\n"
 	"exit\n"
 #if 0 /* debug commands */
 	"checkargs\n"
 	"disklabel\n"
 	"howto\n"
 	"screen\n"
 	"scsi\n"
 #endif
+;
 static int
 cmd_help(int argc, char *argv[])
+{
 	printf(helpmsg);
 	return ST_NORMAL;
+}
 struct command_entry {
 	char *name;
 	int (*func)(int, char **);
 };
 struct command_entry entries[] = {
 	{ "b",		boot         },
 	{ "boot",	boot         },
 	{ "chkargs",	check_args   },
 	{ "disklabel",	disklabel    },
 	{ "exit",	exit_program },
 #ifdef notyet
 	{ "fsdump",	fsdump       },
 	{ "fsrestore",	fsrestore    },
 #endif
 	{ "help",	cmd_help     },
 	{ "howto",	how_to_boot  },
 	{ "ls",		cmd_ls       },
 	{ "screen",	screen	     },
 #ifdef notyet
 	{ "tape",	tape	     },
 	{ "tp",		tape	     },
 #endif
 	{ "scsi",	scsi         },
 	{ "quit",	exit_program },
 	{ 0, 0 }
 };
 int
 parse(int argc, char *argv[])
+{
 	int i, status = ST_NOTFOUND;
 	for (i = 0; entries[i].name != (char *) 0; i++) {
 		if (!strcmp(argv[0], entries[i].name)) {
 			status = (*entries[i].func)(argc, argv);
 			break;
+		}
+	}
 	return(status);
+}
 /*
  * getargs -- make argument arrays
  */
 int
 getargs(char buffer[], char *argv[], int maxargs)
+{
 	int n = 0;
 	char *p = buffer;
 	argv[n++] = p;
 	while (*p != '\0') {
 		if ( *p == ' ' ) {
 			*p = '\0';
 		} else if (p != buffer && *(p-1) == '\0') {
 			if ( n < maxargs )
 				argv[n++] = p;
+		}
 		p++;
+	}
 	return(n);
+}

 @@ -1,256 +1,255 @@
-/*	$NetBSD: sio.c,v 1.2 2013/01/12 07:04:57 tsutsui Exp $	*/
+/*	$NetBSD: sio.c,v 1.3 2013/01/21 11:58:12 tsutsui Exp $	*/
 /*
  * Copyright (c) 1992 OMRON Corporation.
+ *
  * This code is derived from software contributed to Berkeley by
  * OMRON Corporation.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
  * 3. All advertising materials mentioning features or use of this software
  *    must display the following acknowledgement:
  *	This product includes software developed by the University of
  *	California, Berkeley and its contributors.
  * 4. Neither the name of the University nor the names of its contributors
  *    may be used to endorse or promote products derived from this software
  *    without specific prior written permission.
+ *
  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
+ *
  *	@(#)sio.c	8.1 (Berkeley) 6/10/93
  */
 /*
  * Copyright (c) 1992, 1993
  *	The Regents of the University of California.  All rights reserved.
+ *
  * This code is derived from software contributed to Berkeley by
  * OMRON Corporation.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
  * 3. Neither the name of the University nor the names of its contributors
  *    may be used to endorse or promote products derived from this software
  *    without specific prior written permission.
+ *
  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
+ *
  *	@(#)sio.c	8.1 (Berkeley) 6/10/93
  */
 /* sio.c   NOV-25-1991 */
 #define NSIO 2
 #include <sys/param.h>
 #include <luna68k/stand/boot/samachdep.h>
 #include <luna68k/stand/boot/sioreg.h>
 #include <luna68k/stand/boot/rcvbuf.h>
 #include <luna68k/stand/boot/kbdreg.h>
 static void siointr(int);
 static int sioreg(int, int);
 struct rcvbuf	rcvbuf[NSIO];
 int	sioconsole = -1;
 struct	siodevice *sio_addr[2];
 int	cur_unit;
 #define	siounit(x)	( x & 0xffff )
 #define isprint(c)      ((c >= 0x20) && (c < 0x7F) ? 1 : 0)
 void
 _siointr(void)
+{
 	int unit;
 	for (unit = 0; unit < NSIO; unit++)
 		siointr(unit);
+}
 void
 siointr(int unit)
+{
 /*	struct siodevice *sio = sio_addr[unit]; */
 	int rr0 = sioreg(REG(unit, RR0), 0);
 	int rr1 = sioreg(REG(unit, RR1), 0);
 	if (rr0 & RR0_RXAVAIL) {
 		if (rr1 & RR1_FRAMING)
 			return;
 		if (rr1 & (RR1_PARITY | RR1_OVERRUN))
 		    sioreg(REG(unit, WR0), WR0_ERRRST); /* Channel-A Error Reset */
 		if (unit == 1) {
 			int c = kbd_decode(sio_addr[unit]->sio_data);
 			if ((c & KC_TYPE) == KC_CODE)
 				PUSH_RBUF(unit, c);
 		} else {
 			PUSH_RBUF(unit, sio_addr[unit]->sio_data);
+		}
+	}
+}
 /*
  * Following are all routines needed for SIO to act as console
  */
 #include <dev/cons.h>
 #include <luna68k/stand/boot/romvec.h>
 void
 siocnprobe(struct consdev *cp)
+{
 	sio_addr[0] = (struct siodevice *) 0x51000000;
 	sio_addr[1] = (struct siodevice *) 0x51000004;
 	/* make sure hardware exists */
 	if (badaddr((short *)sio_addr[0])) {
 		cp->cn_pri = CN_DEAD;
 		return;
+	}
 	/* locate the major number */
 	/* initialize required fields */
 	cp->cn_dev = cur_unit = 0;
 	cp->cn_pri = CN_NORMAL;
+}
 void
 siocninit(struct consdev *cp)
+{
 	int unit = siounit(cp->cn_dev);
 	sioinit();
 	sioconsole = unit;
+}
 int
 siocngetc(dev_t dev)
+{
 	int c, unit = siounit(dev);
-	while (RBUF_EMPTY(unit)) {
+	if (RBUF_EMPTY(unit))
-		DELAY(10);
+		return 0;
 	POP_RBUF(unit, c);
 	return(c);
+}
 void
 siocnputc(dev_t dev, int c)
+{
 	int unit = siounit(dev);
 	int s;
 	if (sioconsole == -1) {
 		(void) sioinit();
 		sioconsole = unit;
+	}
 	s = splsio();
 	/* wait for any pending transmission to finish */
 	while ((sioreg(REG(unit, RR0), 0) & RR0_TXEMPTY) == 0);
 	sio_addr[unit]->sio_data = (c & 0xFF);
 	/* wait for any pending transmission to finish */
 	while ((sioreg(REG(unit, RR0), 0) & RR0_TXEMPTY) == 0);
 	splx(s);
+}
 /* SIO misc routines */
 void
 sioinit(void)
+{
 	int s;
 	RBUF_INIT(0);
 	RBUF_INIT(1);
 	s = splsio();
 	sioreg(REG(0, WR0), WR0_CHANRST);		/* Channel-A Reset */
 	sioreg(WR2A, WR2_VEC86  | WR2_INTR_1);		/* Set CPU BUS Interface Mode */
 	sioreg(WR2B, 0);				/* Set Interrupt Vector */
 	sioreg(REG(0, WR0), WR0_RSTINT);		/* Reset E/S Interrupt */
 	sioreg(REG(0, WR4), WR4_BAUD96 | WR4_STOP1 | WR4_NPARITY);	/* Tx/Rx */
 	sioreg(REG(0, WR3), WR3_RX8BIT | WR3_RXENBL);		/* Rx */
 	sioreg(REG(0, WR5), WR5_TX8BIT | WR5_TXENBL | WR5_DTR | WR5_RTS);		/* Tx */
 	sioreg(REG(0, WR0), WR0_RSTINT);		/* Reset E/S Interrupt */
 	sioreg(REG(0, WR1), WR1_RXALLS);		/* Interrupted All Char. */
 	sioreg(REG(1, WR0), WR0_CHANRST);		/* Channel-A Reset */
 	sioreg(REG(1, WR0), WR0_RSTINT);		/* Reset E/S Interrupt */
 	sioreg(REG(1, WR4), WR4_BAUD96 | WR4_STOP1 | WR4_NPARITY);	/* Tx/Rx */
 	sioreg(REG(1, WR3), WR3_RX8BIT | WR3_RXENBL);		/* Rx */
 	sioreg(REG(1, WR5), WR5_TX8BIT | WR5_TXENBL);		/* Tx */
 	sioreg(REG(1, WR0), WR0_RSTINT);		/* Reset E/S Interrupt */
 	sioreg(REG(1, WR1), WR1_RXALLS);		/* Interrupted All Char. */
 	splx(s);
+}
 int
 sioreg(int reg, int val)
+{
 	int chan;
 	chan = CHANNEL(reg);
 	if (isStatusReg(reg)) {
 		if (REGNO(reg) != 0)
 		    sio_addr[chan]->sio_cmd = REGNO(reg);
 		return(sio_addr[chan]->sio_stat);
 	} else {
 		if (REGNO(reg) != 0)
 		    sio_addr[chan]->sio_cmd = REGNO(reg);
 		sio_addr[chan]->sio_cmd = val;
 		return(val);
+	}
+}

 @@ -1,98 +1,98 @@
-#	$NetBSD: Makefile,v 1.7 2013/01/20 02:35:13 tsutsui Exp $
+#	$NetBSD: Makefile,v 1.8 2013/01/21 11:58:12 tsutsui Exp $
 #	@(#)Makefile	8.2 (Berkeley) 8/15/93
 NOMAN= # defined
 .include <bsd.own.mk>
 .include <bsd.sys.mk>
 S= ${.CURDIR}/../../../..
 LIBSADIR=	${S}/lib/libsa
 CPPFLAGS+=	-nostdinc -D_STANDALONE
 CPPFLAGS+=	-I${.CURDIR} -I${.OBJDIR} -I${S} -I${S}/arch
 CPPFLAGS+=	-DSUPPORT_DISK
 #CPPFLAGS+=	-DSUPPORT_TAPE
 CPPFLAGS+=	-DSUPPORT_ETHERNET
 CPPFLAGS+=	-DSUPPORT_DHCP -DSUPPORT_BOOTP
 #CPPFLAGS+=	-DBOOTP_DEBUG -DNETIF_DEBUG -DETHER_DEBUG -DNFS_DEBUG
 #CPPFLAGS+=	-DRPC_DEBUG -DRARP_DEBUG -DNET_DEBUG -DDEBUG -DPARANOID
 CPPFLAGS+=	-DLIBSA_ENABLE_LS_OP
 CPPFLAGS+=	-DLIBSA_PRINTF_WIDTH_SUPPORT
 CFLAGS=		-Os -msoft-float
 CFLAGS+=	-ffreestanding
 CFLAGS+=	-Wall -Werror
 CFLAGS+=	-Wstrict-prototypes -Wmissing-prototypes -Wpointer-arith
 CFLAGS+=	-Wno-pointer-sign
 TEXTADDR=	700000
 LDSCRIPT=	${.CURDIR}/boot.ldscript
 LINKFORMAT=	-static -N -Ttext ${TEXTADDR} -T ${LDSCRIPT}
 SRCS=	locore.S
 SRCS+=	init_main.c autoconf.c ioconf.c
 SRCS+=	trap.c
 SRCS+=	devopen.c
 SRCS+=	conf.c
 SRCS+=	machdep.c
 SRCS+=	getline.c parse.c
 SRCS+=	boot.c
-SRCS+=	cons.c prf.c
+SRCS+=	cons.c prf.c awaitkey.c
 SRCS+=	romcons.c
 SRCS+=	sio.c
 SRCS+=	bmc.c bmd.c screen.c font.c kbd.c
 SRCS+=	scsi.c sc.c sd.c
 #SRCS+=	st.c tape.c
 SRCS+=	disklabel.c
 #SRCS+=	fsdump.c
 SRCS+=	ufs_disksubr.c
 SRCS+=	ls.c
 # netboot support
 SRCS+=	if_le.c lance.c getsecs.c
 .PATH: ${LIBSADIR}
 SRCS+=	dev_net.c
 PROG=   boot
 NEWVERSWHAT=	"${PROG}"
 SRCS+=          vers.c
 CLEANFILES+=    vers.c
 ### find out what to use for libkern
 KERN_AS=	library
 .include "${S}/lib/libkern/Makefile.inc"
 ### find out what to use for libz
 Z_AS=		library
 .include "${S}/lib/libz/Makefile.inc"
 ### find out what to use for libsa
 SA_AS=		library
 SAMISCMAKEFLAGS+=SA_USE_LOADFILE=yes SA_USE_CREAD=yes SA_ENABLE_LS_OP=yes
 .include "${S}/lib/libsa/Makefile.inc"
 LIBS=	${SALIB} ${ZLIB} ${KERNLIB}
 .PHONY: vers.c
 vers.c: ${.CURDIR}/version
 	${HOST_SH} ${S}/conf/newvers_stand.sh ${${MKREPRO} == "yes" :?:-D} \
 	    ${.CURDIR}/version ${MACHINE} ${NEWVERSWHAT}
 ${PROG}: ${LDSCRIPT} ${OBJS} ${LIBS}
 	${LD} ${LINKFORMAT} -x -o ${PROG}.elf ${OBJS} ${LIBS}
 	${ELF2AOUT} ${PROG}.elf ${PROG}.aout
 	mv ${PROG}.aout ${PROG}
 CLEANFILES+=	${PROG}.aout ${PROG}.elf
 cleandir distclean: .WAIT cleanlibdir
 cleanlibdir:
 	-rm -rf lib
 .include <bsd.klinks.mk>
 .include <bsd.prog.mk>

 @@ -1,10 +1,11 @@
-$NetBSD: version,v 1.4 2013/01/16 15:46:20 tsutsui Exp $
+$NetBSD: version,v 1.5 2013/01/21 11:58:12 tsutsui Exp $
 NOTE ANY CHANGES YOU MAKE TO THE BOOTBLOCKS HERE.  The format of this
 file is important - make sure the entries are appended on end, last item
 is taken as the current.
 .0:	Initial revision, based on 4.4BSD-Lite2/luna68k and NetBSD/hp300
 .1:	Add netboot support.
 .2:	Add support for secondary SPC SCSI on LUNA-II.
 .3:	Add UFS2 support.
 .4:	Add support for "awaiting key" to abort autoboot and get boot menu.