 @@ -1,14 +1,14 @@
-/*	$NetBSD: bus_dma.c,v 1.73 2013/02/04 13:26:19 macallan Exp $	*/
+/*	$NetBSD: bus_dma.c,v 1.74 2013/02/13 23:08:45 matt Exp $	*/
 /*-
  * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
  * All rights reserved.
+ *
  * This code is derived from software contributed to The NetBSD Foundation
  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
  * NASA Ames Research Center.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
 @@ -23,27 +23,27 @@
  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  */
 #define _ARM32_BUS_DMA_PRIVATE
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: bus_dma.c,v 1.73 2013/02/04 13:26:19 macallan Exp $");
+__KERNEL_RCSID(0, "$NetBSD: bus_dma.c,v 1.74 2013/02/13 23:08:45 matt Exp $");
 #include <sys/param.h>
 #include <sys/systm.h>
 #include <sys/kernel.h>
 #include <sys/proc.h>
 #include <sys/buf.h>
 #include <sys/reboot.h>
 #include <sys/conf.h>
 #include <sys/file.h>
 #include <sys/malloc.h>
 #include <sys/mbuf.h>
 #include <sys/vnode.h>
 #include <sys/device.h>
 @@ -441,27 +441,29 @@ _bus_dmamap_load(bus_dma_tag_t t, bus_dm
 				map->_dm_flags &= ~_BUS_DMAMAP_IS_BOUNCING;
+			}
 		} else
 #endif
 		STAT_INCR(unloads);
+	}
 	/*
 	 * Make sure that on error condition we return "no valid mappings".
 	 */
 	map->dm_mapsize = 0;
 	map->dm_nsegs = 0;
 	map->_dm_buftype = _BUS_DMA_BUFTYPE_INVALID;
-	KASSERT(map->dm_maxsegsz <= map->_dm_maxmaxsegsz);
+	KASSERTMSG(map->dm_maxsegsz <= map->_dm_maxmaxsegsz,
 	    "dm_maxsegsz %lu _dm_maxmaxsegsz %lu",
 	    map->dm_maxsegsz, map->_dm_maxmaxsegsz);
 	if (buflen > map->_dm_size)
 		return (EINVAL);
 	if (p != NULL) {
 		vm = p->p_vmspace;
 	} else {
 		vm = vmspace_kernel();
+	}
 	/* _bus_dmamap_load_buffer() clears this if we're not... */
 	map->_dm_flags |= _BUS_DMAMAP_COHERENT;
 @@ -508,27 +510,29 @@ _bus_dmamap_load_mbuf(bus_dma_tag_t t, b
 				map->_dm_flags &= ~_BUS_DMAMAP_IS_BOUNCING;
+			}
 		} else
 #endif
 		STAT_INCR(unloads);
+	}
 	/*
 	 * Make sure that on error condition we return "no valid mappings."
 	 */
 	map->dm_mapsize = 0;
 	map->dm_nsegs = 0;
 	map->_dm_buftype = _BUS_DMA_BUFTYPE_INVALID;
-	KASSERT(map->dm_maxsegsz <= map->_dm_maxmaxsegsz);
+	KASSERTMSG(map->dm_maxsegsz <= map->_dm_maxmaxsegsz,
 	    "dm_maxsegsz %lu _dm_maxmaxsegsz %lu",
 	    map->dm_maxsegsz, map->_dm_maxmaxsegsz);
 #ifdef DIAGNOSTIC
 	if ((m0->m_flags & M_PKTHDR) == 0)
 		panic("_bus_dmamap_load_mbuf: no packet header");
 #endif	/* DIAGNOSTIC */
 	if (m0->m_pkthdr.len > map->_dm_size)
 		return (EINVAL);
 	/* _bus_dmamap_load_paddr() clears this if we're not... */
 	map->_dm_flags |= _BUS_DMAMAP_COHERENT;
 	error = 0;
 @@ -630,27 +634,29 @@ int
 _bus_dmamap_load_uio(bus_dma_tag_t t, bus_dmamap_t map, struct uio *uio,
     int flags)
+{
 	int i, error;
 	bus_size_t minlen, resid;
 	struct iovec *iov;
 	void *addr;
 	/*
 	 * Make sure that on error condition we return "no valid mappings."
 	 */
 	map->dm_mapsize = 0;
 	map->dm_nsegs = 0;
-	KASSERT(map->dm_maxsegsz <= map->_dm_maxmaxsegsz);
+	KASSERTMSG(map->dm_maxsegsz <= map->_dm_maxmaxsegsz,
 	    "dm_maxsegsz %lu _dm_maxmaxsegsz %lu",
 	    map->dm_maxsegsz, map->_dm_maxmaxsegsz);
 	resid = uio->uio_resid;
 	iov = uio->uio_iov;
 	/* _bus_dmamap_load_buffer() clears this if we're not... */
 	map->_dm_flags |= _BUS_DMAMAP_COHERENT;
 	error = 0;
 	for (i = 0; i < uio->uio_iovcnt && resid != 0 && error == 0; i++) {
 		/*
 		 * Now at the first iovec to load.  Load each iovec
 		 * until we have exhausted the residual count.
 		 */
 @@ -947,41 +953,42 @@ _bus_dmamap_sync(bus_dma_tag_t t, bus_dm
 	 *	here in case a write-back is required by the back-end.
+	 *
 	 *	PREWRITE -- Write-back the D-cache.  Note that if
 	 *	we are doing a PREREAD|PREWRITE, we can collapse
 	 *	the whole thing into a single Wb-Inv.
+	 *
 	 *	POSTREAD -- Re-invalidate the D-cache in case speculative
 	 *	memory accesses caused cachelines to become valid with now
 	 *	invalid data.
+	 *
 	 *	POSTWRITE -- Nothing.
 	 */
 #ifdef _ARM32_NEED_BUS_DMA_BOUNCE
-	const bool bouncing = (map->_dm_flags & _BUS_DMA_IS_BOUNCING);
+	const bool bouncing = (map->_dm_flags & _BUS_DMAMAP_IS_BOUNCING);
 #else
 	const bool bouncing = false;
 #endif
 	const int pre_ops = ops & (BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
 #ifdef CPU_CORTEX
 	const int post_ops = ops & (BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
 #else
 	const int post_ops = 0;
 #endif
 	if (!bouncing && pre_ops == 0 && post_ops == BUS_DMASYNC_POSTWRITE) {
 		return;
+	}
-	KASSERT(pre_ops != 0 || (post_ops & BUS_DMASYNC_POSTREAD));
+	KASSERTMSG(bouncing || pre_ops != 0 || (post_ops & BUS_DMASYNC_POSTREAD),
 	    "pre_ops %#x post_ops %#x", pre_ops, post_ops);
 #ifdef _ARM32_NEED_BUS_DMA_BOUNCE
 	if (bouncing && (ops & BUS_DMASYNC_PREWRITE)) {
 		struct arm32_bus_dma_cookie * const cookie = map->_dm_cookie;
 		STAT_INCR(write_bounces);
 		char * const dataptr = (char *)cookie->id_bouncebuf + offset;
 		/*
 		 * Copy the caller's buffer to the bounce buffer.
 		 */
 		switch (map->_dm_buftype) {
 		case _BUS_DMA_BUFTYPE_LINEAR:
 			memcpy(dataptr, cookie->id_origlinearbuf + offset, len);
 			break;
 		case _BUS_DMA_BUFTYPE_MBUF:
 @@ -999,27 +1006,28 @@ _bus_dmamap_sync(bus_dma_tag_t t, bus_dm
 			panic("_bus_dmamap_sync(pre): _BUS_DMA_BUFTYPE_INVALID");
 			break;
 		default:
 			panic("_bus_dmamap_sync(pre): map %p: unknown buffer type %d\n",
 			    map, map->_dm_buftype);
 			break;
 #endif /* DIAGNOSTIC */
+		}
+	}
 #endif /* _ARM32_NEED_BUS_DMA_BOUNCE */
 	/* Skip cache frobbing if mapping was COHERENT. */
-	if (!bouncing && (map->_dm_flags & _BUS_DMAMAP_COHERENT)) {
+	if (!bouncing && pre_ops == 0
 	    && (map->_dm_flags & _BUS_DMAMAP_COHERENT)) {
 		/* Drain the write buffer. */
 		cpu_drain_writebuf();
 		return;
+	}
 #ifdef _ARM32_NEED_BUS_DMA_BOUNCE
 	if (bouncing && ((map->_dm_flags & _BUS_DMAMAP_COHERENT) || pre_ops == 0)) {
 		goto bounce_it;
+	}
 #endif /* _ARM32_NEED_BUS_DMA_BOUNCE */
 	/*
 	 * If the mapping belongs to a non-kernel vmspace, and the