| @@ -1,14 +1,14 @@ | | | @@ -1,14 +1,14 @@ |
1 | /* $NetBSD: if_bge.c,v 1.228 2013/03/27 10:26:05 msaitoh Exp $ */ | | 1 | /* $NetBSD: if_bge.c,v 1.229 2013/03/27 12:03:51 msaitoh Exp $ */ |
2 | | | 2 | |
3 | /* | | 3 | /* |
4 | * Copyright (c) 2001 Wind River Systems | | 4 | * Copyright (c) 2001 Wind River Systems |
5 | * Copyright (c) 1997, 1998, 1999, 2001 | | 5 | * Copyright (c) 1997, 1998, 1999, 2001 |
6 | * Bill Paul <wpaul@windriver.com>. All rights reserved. | | 6 | * Bill Paul <wpaul@windriver.com>. All rights reserved. |
7 | * | | 7 | * |
8 | * Redistribution and use in source and binary forms, with or without | | 8 | * Redistribution and use in source and binary forms, with or without |
9 | * modification, are permitted provided that the following conditions | | 9 | * modification, are permitted provided that the following conditions |
10 | * are met: | | 10 | * are met: |
11 | * 1. Redistributions of source code must retain the above copyright | | 11 | * 1. Redistributions of source code must retain the above copyright |
12 | * notice, this list of conditions and the following disclaimer. | | 12 | * notice, this list of conditions and the following disclaimer. |
13 | * 2. Redistributions in binary form must reproduce the above copyright | | 13 | * 2. Redistributions in binary form must reproduce the above copyright |
14 | * notice, this list of conditions and the following disclaimer in the | | 14 | * notice, this list of conditions and the following disclaimer in the |
| @@ -69,27 +69,27 @@ | | | @@ -69,27 +69,27 @@ |
69 | * does not support external SSRAM. | | 69 | * does not support external SSRAM. |
70 | * | | 70 | * |
71 | * Broadcom also produces a variation of the BCM5700 under the "Altima" | | 71 | * Broadcom also produces a variation of the BCM5700 under the "Altima" |
72 | * brand name, which is functionally similar but lacks PCI-X support. | | 72 | * brand name, which is functionally similar but lacks PCI-X support. |
73 | * | | 73 | * |
74 | * Without external SSRAM, you can only have at most 4 TX rings, | | 74 | * Without external SSRAM, you can only have at most 4 TX rings, |
75 | * and the use of the mini RX ring is disabled. This seems to imply | | 75 | * and the use of the mini RX ring is disabled. This seems to imply |
76 | * that these features are simply not available on the BCM5701. As a | | 76 | * that these features are simply not available on the BCM5701. As a |
77 | * result, this driver does not implement any support for the mini RX | | 77 | * result, this driver does not implement any support for the mini RX |
78 | * ring. | | 78 | * ring. |
79 | */ | | 79 | */ |
80 | | | 80 | |
81 | #include <sys/cdefs.h> | | 81 | #include <sys/cdefs.h> |
82 | __KERNEL_RCSID(0, "$NetBSD: if_bge.c,v 1.228 2013/03/27 10:26:05 msaitoh Exp $"); | | 82 | __KERNEL_RCSID(0, "$NetBSD: if_bge.c,v 1.229 2013/03/27 12:03:51 msaitoh Exp $"); |
83 | | | 83 | |
84 | #include "vlan.h" | | 84 | #include "vlan.h" |
85 | | | 85 | |
86 | #include <sys/param.h> | | 86 | #include <sys/param.h> |
87 | #include <sys/systm.h> | | 87 | #include <sys/systm.h> |
88 | #include <sys/callout.h> | | 88 | #include <sys/callout.h> |
89 | #include <sys/sockio.h> | | 89 | #include <sys/sockio.h> |
90 | #include <sys/mbuf.h> | | 90 | #include <sys/mbuf.h> |
91 | #include <sys/malloc.h> | | 91 | #include <sys/malloc.h> |
92 | #include <sys/kernel.h> | | 92 | #include <sys/kernel.h> |
93 | #include <sys/device.h> | | 93 | #include <sys/device.h> |
94 | #include <sys/socket.h> | | 94 | #include <sys/socket.h> |
95 | #include <sys/sysctl.h> | | 95 | #include <sys/sysctl.h> |
| @@ -1120,35 +1120,31 @@ bge_ape_unlock(struct bge_softc *sc, int | | | @@ -1120,35 +1120,31 @@ bge_ape_unlock(struct bge_softc *sc, int |
1120 | /* | | 1120 | /* |
1121 | * Send an event to the APE firmware. | | 1121 | * Send an event to the APE firmware. |
1122 | */ | | 1122 | */ |
1123 | void | | 1123 | void |
1124 | bge_ape_send_event(struct bge_softc *sc, uint32_t event) | | 1124 | bge_ape_send_event(struct bge_softc *sc, uint32_t event) |
1125 | { | | 1125 | { |
1126 | uint32_t apedata; | | 1126 | uint32_t apedata; |
1127 | int i; | | 1127 | int i; |
1128 | | | 1128 | |
1129 | /* NCSI does not support APE events. */ | | 1129 | /* NCSI does not support APE events. */ |
1130 | if ((sc->bge_mfw_flags & BGE_MFW_ON_APE) == 0) | | 1130 | if ((sc->bge_mfw_flags & BGE_MFW_ON_APE) == 0) |
1131 | return; | | 1131 | return; |
1132 | | | 1132 | |
1133 | printf("%s: APE event 0x%08x send\n", device_xname(sc->bge_dev), event); | | | |
1134 | | | | |
1135 | /* Wait up to 1ms for APE to service previous event. */ | | 1133 | /* Wait up to 1ms for APE to service previous event. */ |
1136 | for (i = 10; i > 0; i--) { | | 1134 | for (i = 10; i > 0; i--) { |
1137 | if (bge_ape_lock(sc, BGE_APE_LOCK_MEM) != 0) | | 1135 | if (bge_ape_lock(sc, BGE_APE_LOCK_MEM) != 0) |
1138 | break; | | 1136 | break; |
1139 | apedata = APE_READ_4(sc, BGE_APE_EVENT_STATUS); | | 1137 | apedata = APE_READ_4(sc, BGE_APE_EVENT_STATUS); |
1140 | printf("%s: APE data 0x%08x -> 0x%08x\n", | | | |
1141 | device_xname(sc->bge_dev), apedata, event); | | | |
1142 | if ((apedata & BGE_APE_EVENT_STATUS_EVENT_PENDING) == 0) { | | 1138 | if ((apedata & BGE_APE_EVENT_STATUS_EVENT_PENDING) == 0) { |
1143 | APE_WRITE_4(sc, BGE_APE_EVENT_STATUS, event | | | 1139 | APE_WRITE_4(sc, BGE_APE_EVENT_STATUS, event | |
1144 | BGE_APE_EVENT_STATUS_EVENT_PENDING); | | 1140 | BGE_APE_EVENT_STATUS_EVENT_PENDING); |
1145 | bge_ape_unlock(sc, BGE_APE_LOCK_MEM); | | 1141 | bge_ape_unlock(sc, BGE_APE_LOCK_MEM); |
1146 | APE_WRITE_4(sc, BGE_APE_EVENT, BGE_APE_EVENT_1); | | 1142 | APE_WRITE_4(sc, BGE_APE_EVENT, BGE_APE_EVENT_1); |
1147 | break; | | 1143 | break; |
1148 | } | | 1144 | } |
1149 | bge_ape_unlock(sc, BGE_APE_LOCK_MEM); | | 1145 | bge_ape_unlock(sc, BGE_APE_LOCK_MEM); |
1150 | DELAY(100); | | 1146 | DELAY(100); |
1151 | } | | 1147 | } |
1152 | if (i == 0) { | | 1148 | if (i == 0) { |
1153 | printf("%s: APE event 0x%08x send timed out\n", | | 1149 | printf("%s: APE event 0x%08x send timed out\n", |
1154 | device_xname(sc->bge_dev), event); | | 1150 | device_xname(sc->bge_dev), event); |
| @@ -3472,35 +3468,26 @@ bge_attach(device_t parent, device_t sel | | | @@ -3472,35 +3468,26 @@ bge_attach(device_t parent, device_t sel |
3472 | PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_BROADCOM_BCM57791 || | | 3468 | PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_BROADCOM_BCM57791 || |
3473 | PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_BROADCOM_BCM57795 || | | 3469 | PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_BROADCOM_BCM57795 || |
3474 | BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5906) { | | 3470 | BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5906) { |
3475 | capmask &= ~BMSR_EXTSTAT; | | 3471 | capmask &= ~BMSR_EXTSTAT; |
3476 | sc->bge_flags |= BGE_PHY_NO_WIRESPEED; | | 3472 | sc->bge_flags |= BGE_PHY_NO_WIRESPEED; |
3477 | } | | 3473 | } |
3478 | | | 3474 | |
3479 | if (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5700 || | | 3475 | if (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5700 || |
3480 | (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5705 && | | 3476 | (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5705 && |
3481 | (sc->bge_chipid != BGE_CHIPID_BCM5705_A0 && | | 3477 | (sc->bge_chipid != BGE_CHIPID_BCM5705_A0 && |
3482 | sc->bge_chipid != BGE_CHIPID_BCM5705_A1))) | | 3478 | sc->bge_chipid != BGE_CHIPID_BCM5705_A1))) |
3483 | sc->bge_flags |= BGE_PHY_NO_WIRESPEED; | | 3479 | sc->bge_flags |= BGE_PHY_NO_WIRESPEED; |
3484 | | | 3480 | |
3485 | if (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5719 || | | | |
3486 | BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5720 || | | | |
3487 | BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM57766 || | | | |
3488 | (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_BROADCOM_BCM5718 && | | | |
3489 | sc->bge_chipid != BGE_CHIPID_BCM5717_A0) || | | | |
3490 | (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM57765 && | | | |
3491 | sc->bge_chipid != BGE_CHIPID_BCM57765_A0)) | | | |
3492 | sc->bge_flags |= BGE_PHY_EEE; | | | |
3493 | | | | |
3494 | /* Set various PHY bug flags. */ | | 3481 | /* Set various PHY bug flags. */ |
3495 | if (sc->bge_chipid == BGE_CHIPID_BCM5701_A0 || | | 3482 | if (sc->bge_chipid == BGE_CHIPID_BCM5701_A0 || |
3496 | sc->bge_chipid == BGE_CHIPID_BCM5701_B0) | | 3483 | sc->bge_chipid == BGE_CHIPID_BCM5701_B0) |
3497 | sc->bge_flags |= BGE_PHY_CRC_BUG; | | 3484 | sc->bge_flags |= BGE_PHY_CRC_BUG; |
3498 | if (BGE_CHIPREV(sc->bge_chipid) == BGE_CHIPREV_5703_AX || | | 3485 | if (BGE_CHIPREV(sc->bge_chipid) == BGE_CHIPREV_5703_AX || |
3499 | BGE_CHIPREV(sc->bge_chipid) == BGE_CHIPREV_5704_AX) | | 3486 | BGE_CHIPREV(sc->bge_chipid) == BGE_CHIPREV_5704_AX) |
3500 | sc->bge_flags |= BGE_PHY_ADC_BUG; | | 3487 | sc->bge_flags |= BGE_PHY_ADC_BUG; |
3501 | if (sc->bge_chipid == BGE_CHIPID_BCM5704_A0) | | 3488 | if (sc->bge_chipid == BGE_CHIPID_BCM5704_A0) |
3502 | sc->bge_flags |= BGE_PHY_5704_A0_BUG; | | 3489 | sc->bge_flags |= BGE_PHY_5704_A0_BUG; |
3503 | if ((BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5700 || | | 3490 | if ((BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5700 || |
3504 | BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5701) && | | 3491 | BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5701) && |
3505 | PCI_VENDOR(subid) == PCI_VENDOR_DELL) | | 3492 | PCI_VENDOR(subid) == PCI_VENDOR_DELL) |
3506 | sc->bge_flags |= BGE_PHY_NO_3LED; | | 3493 | sc->bge_flags |= BGE_PHY_NO_3LED; |
| @@ -4122,33 +4109,26 @@ bge_reset(struct bge_softc *sc) | | | @@ -4122,33 +4109,26 @@ bge_reset(struct bge_softc *sc) |
4122 | BGE_ASICREV(sc->bge_chipid) != BGE_ASICREV_BCM5785) { | | 4109 | BGE_ASICREV(sc->bge_chipid) != BGE_ASICREV_BCM5785) { |
4123 | uint32_t v; | | 4110 | uint32_t v; |
4124 | | | 4111 | |
4125 | /* Enable PCI Express bug fix */ | | 4112 | /* Enable PCI Express bug fix */ |
4126 | v = CSR_READ_4(sc, BGE_TLP_CONTROL_REG); | | 4113 | v = CSR_READ_4(sc, BGE_TLP_CONTROL_REG); |
4127 | CSR_WRITE_4(sc, BGE_TLP_CONTROL_REG, | | 4114 | CSR_WRITE_4(sc, BGE_TLP_CONTROL_REG, |
4128 | v | BGE_TLP_DATA_FIFO_PROTECT); | | 4115 | v | BGE_TLP_DATA_FIFO_PROTECT); |
4129 | } | | 4116 | } |
4130 | | | 4117 | |
4131 | if (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5720) | | 4118 | if (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5720) |
4132 | BGE_CLRBIT(sc, BGE_CPMU_CLCK_ORIDE, | | 4119 | BGE_CLRBIT(sc, BGE_CPMU_CLCK_ORIDE, |
4133 | CPMU_CLCK_ORIDE_MAC_ORIDE_EN); | | 4120 | CPMU_CLCK_ORIDE_MAC_ORIDE_EN); |
4134 | | | 4121 | |
4135 | if ((sc->bge_flags & BGE_PHY_EEE) != 0) { | | | |
4136 | uint32_t eeemode; | | | |
4137 | | | | |
4138 | eeemode = CSR_READ_4(sc, BGE_CPMU_EEE_MODE); | | | |
4139 | printf("EEEMODE = %x\n", eeemode); | | | |
4140 | CSR_WRITE_4(sc, BGE_CPMU_EEE_MODE, 0); | | | |
4141 | } | | | |
4142 | return 0; | | 4122 | return 0; |
4143 | } | | 4123 | } |
4144 | | | 4124 | |
4145 | /* | | 4125 | /* |
4146 | * Frame reception handling. This is called if there's a frame | | 4126 | * Frame reception handling. This is called if there's a frame |
4147 | * on the receive return list. | | 4127 | * on the receive return list. |
4148 | * | | 4128 | * |
4149 | * Note: we have to be able to handle two possibilities here: | | 4129 | * Note: we have to be able to handle two possibilities here: |
4150 | * 1) the frame is from the jumbo receive ring | | 4130 | * 1) the frame is from the jumbo receive ring |
4151 | * 2) the frame is from the standard receive ring | | 4131 | * 2) the frame is from the standard receive ring |
4152 | */ | | 4132 | */ |
4153 | | | 4133 | |
4154 | static void | | 4134 | static void |
| @@ -5683,33 +5663,26 @@ bge_link_upd(struct bge_softc *sc) | | | @@ -5683,33 +5663,26 @@ bge_link_upd(struct bge_softc *sc) |
5683 | | | 5663 | |
5684 | if (BGE_STS_BIT(sc, BGE_STS_LINK) != link) { | | 5664 | if (BGE_STS_BIT(sc, BGE_STS_LINK) != link) { |
5685 | mii_pollstat(mii); | | 5665 | mii_pollstat(mii); |
5686 | | | 5666 | |
5687 | if (!BGE_STS_BIT(sc, BGE_STS_LINK) && | | 5667 | if (!BGE_STS_BIT(sc, BGE_STS_LINK) && |
5688 | mii->mii_media_status & IFM_ACTIVE && | | 5668 | mii->mii_media_status & IFM_ACTIVE && |
5689 | IFM_SUBTYPE(mii->mii_media_active) != IFM_NONE) | | 5669 | IFM_SUBTYPE(mii->mii_media_active) != IFM_NONE) |
5690 | BGE_STS_SETBIT(sc, BGE_STS_LINK); | | 5670 | BGE_STS_SETBIT(sc, BGE_STS_LINK); |
5691 | else if (BGE_STS_BIT(sc, BGE_STS_LINK) && | | 5671 | else if (BGE_STS_BIT(sc, BGE_STS_LINK) && |
5692 | (!(mii->mii_media_status & IFM_ACTIVE) || | | 5672 | (!(mii->mii_media_status & IFM_ACTIVE) || |
5693 | IFM_SUBTYPE(mii->mii_media_active) == IFM_NONE)) | | 5673 | IFM_SUBTYPE(mii->mii_media_active) == IFM_NONE)) |
5694 | BGE_STS_CLRBIT(sc, BGE_STS_LINK); | | 5674 | BGE_STS_CLRBIT(sc, BGE_STS_LINK); |
5695 | } | | 5675 | } |
5696 | } else { | | | |
5697 | /* | | | |
5698 | * For controllers that call mii_tick, we have to poll | | | |
5699 | * link status. | | | |
5700 | */ | | | |
5701 | mii_pollstat(mii); | | | |
5702 | bge_miibus_statchg(ifp); | | | |
5703 | } | | 5676 | } |
5704 | | | 5677 | |
5705 | /* Clear the attention */ | | 5678 | /* Clear the attention */ |
5706 | CSR_WRITE_4(sc, BGE_MAC_STS, BGE_MACSTAT_SYNC_CHANGED| | | 5679 | CSR_WRITE_4(sc, BGE_MAC_STS, BGE_MACSTAT_SYNC_CHANGED| |
5707 | BGE_MACSTAT_CFG_CHANGED|BGE_MACSTAT_MI_COMPLETE| | | 5680 | BGE_MACSTAT_CFG_CHANGED|BGE_MACSTAT_MI_COMPLETE| |
5708 | BGE_MACSTAT_LINK_CHANGED); | | 5681 | BGE_MACSTAT_LINK_CHANGED); |
5709 | } | | 5682 | } |
5710 | | | 5683 | |
5711 | static int | | 5684 | static int |
5712 | bge_sysctl_verify(SYSCTLFN_ARGS) | | 5685 | bge_sysctl_verify(SYSCTLFN_ARGS) |
5713 | { | | 5686 | { |
5714 | int error, t; | | 5687 | int error, t; |
5715 | struct sysctlnode node; | | 5688 | struct sysctlnode node; |