| @@ -1,859 +1,867 @@ | | | @@ -1,859 +1,867 @@ |
1 | /* $NetBSD: beagle_machdep.c,v 1.42 2013/05/12 02:55:54 matt Exp $ */ | | 1 | /* $NetBSD: beagle_machdep.c,v 1.43 2013/06/11 22:59:54 matt Exp $ */ |
2 | | | 2 | |
3 | /* | | 3 | /* |
4 | * Machine dependent functions for kernel setup for TI OSK5912 board. | | 4 | * Machine dependent functions for kernel setup for TI OSK5912 board. |
5 | * Based on lubbock_machdep.c which in turn was based on iq80310_machhdep.c | | 5 | * Based on lubbock_machdep.c which in turn was based on iq80310_machhdep.c |
6 | * | | 6 | * |
7 | * Copyright (c) 2002, 2003, 2005 Genetec Corporation. All rights reserved. | | 7 | * Copyright (c) 2002, 2003, 2005 Genetec Corporation. All rights reserved. |
8 | * Written by Hiroyuki Bessho for Genetec Corporation. | | 8 | * Written by Hiroyuki Bessho for Genetec Corporation. |
9 | * | | 9 | * |
10 | * Redistribution and use in source and binary forms, with or without | | 10 | * Redistribution and use in source and binary forms, with or without |
11 | * modification, are permitted provided that the following conditions | | 11 | * modification, are permitted provided that the following conditions |
12 | * are met: | | 12 | * are met: |
13 | * 1. Redistributions of source code must retain the above copyright | | 13 | * 1. Redistributions of source code must retain the above copyright |
14 | * notice, this list of conditions and the following disclaimer. | | 14 | * notice, this list of conditions and the following disclaimer. |
15 | * 2. Redistributions in binary form must reproduce the above copyright | | 15 | * 2. Redistributions in binary form must reproduce the above copyright |
16 | * notice, this list of conditions and the following disclaimer in the | | 16 | * notice, this list of conditions and the following disclaimer in the |
17 | * documentation and/or other materials provided with the distribution. | | 17 | * documentation and/or other materials provided with the distribution. |
18 | * 3. The name of Genetec Corporation may not be used to endorse or | | 18 | * 3. The name of Genetec Corporation may not be used to endorse or |
19 | * promote products derived from this software without specific prior | | 19 | * promote products derived from this software without specific prior |
20 | * written permission. | | 20 | * written permission. |
21 | * | | 21 | * |
22 | * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND | | 22 | * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND |
23 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED | | 23 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED |
24 | * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR | | 24 | * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR |
25 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION | | 25 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION |
26 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR | | 26 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
27 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF | | 27 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
28 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS | | 28 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
29 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN | | 29 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
30 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) | | 30 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
31 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE | | 31 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
32 | * POSSIBILITY OF SUCH DAMAGE. | | 32 | * POSSIBILITY OF SUCH DAMAGE. |
33 | * | | 33 | * |
34 | * Copyright (c) 2001 Wasabi Systems, Inc. | | 34 | * Copyright (c) 2001 Wasabi Systems, Inc. |
35 | * All rights reserved. | | 35 | * All rights reserved. |
36 | * | | 36 | * |
37 | * Written by Jason R. Thorpe for Wasabi Systems, Inc. | | 37 | * Written by Jason R. Thorpe for Wasabi Systems, Inc. |
38 | * | | 38 | * |
39 | * Redistribution and use in source and binary forms, with or without | | 39 | * Redistribution and use in source and binary forms, with or without |
40 | * modification, are permitted provided that the following conditions | | 40 | * modification, are permitted provided that the following conditions |
41 | * are met: | | 41 | * are met: |
42 | * 1. Redistributions of source code must retain the above copyright | | 42 | * 1. Redistributions of source code must retain the above copyright |
43 | * notice, this list of conditions and the following disclaimer. | | 43 | * notice, this list of conditions and the following disclaimer. |
44 | * 2. Redistributions in binary form must reproduce the above copyright | | 44 | * 2. Redistributions in binary form must reproduce the above copyright |
45 | * notice, this list of conditions and the following disclaimer in the | | 45 | * notice, this list of conditions and the following disclaimer in the |
46 | * documentation and/or other materials provided with the distribution. | | 46 | * documentation and/or other materials provided with the distribution. |
47 | * 3. All advertising materials mentioning features or use of this software | | 47 | * 3. All advertising materials mentioning features or use of this software |
48 | * must display the following acknowledgement: | | 48 | * must display the following acknowledgement: |
49 | * This product includes software developed for the NetBSD Project by | | 49 | * This product includes software developed for the NetBSD Project by |
50 | * Wasabi Systems, Inc. | | 50 | * Wasabi Systems, Inc. |
51 | * 4. The name of Wasabi Systems, Inc. may not be used to endorse | | 51 | * 4. The name of Wasabi Systems, Inc. may not be used to endorse |
52 | * or promote products derived from this software without specific prior | | 52 | * or promote products derived from this software without specific prior |
53 | * written permission. | | 53 | * written permission. |
54 | * | | 54 | * |
55 | * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND | | 55 | * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND |
56 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED | | 56 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED |
57 | * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR | | 57 | * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR |
58 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC | | 58 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC |
59 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR | | 59 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
60 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF | | 60 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
61 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS | | 61 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
62 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN | | 62 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
63 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) | | 63 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
64 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE | | 64 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
65 | * POSSIBILITY OF SUCH DAMAGE. | | 65 | * POSSIBILITY OF SUCH DAMAGE. |
66 | * | | 66 | * |
67 | * Copyright (c) 1997,1998 Mark Brinicombe. | | 67 | * Copyright (c) 1997,1998 Mark Brinicombe. |
68 | * Copyright (c) 1997,1998 Causality Limited. | | 68 | * Copyright (c) 1997,1998 Causality Limited. |
69 | * All rights reserved. | | 69 | * All rights reserved. |
70 | * | | 70 | * |
71 | * Redistribution and use in source and binary forms, with or without | | 71 | * Redistribution and use in source and binary forms, with or without |
72 | * modification, are permitted provided that the following conditions | | 72 | * modification, are permitted provided that the following conditions |
73 | * are met: | | 73 | * are met: |
74 | * 1. Redistributions of source code must retain the above copyright | | 74 | * 1. Redistributions of source code must retain the above copyright |
75 | * notice, this list of conditions and the following disclaimer. | | 75 | * notice, this list of conditions and the following disclaimer. |
76 | * 2. Redistributions in binary form must reproduce the above copyright | | 76 | * 2. Redistributions in binary form must reproduce the above copyright |
77 | * notice, this list of conditions and the following disclaimer in the | | 77 | * notice, this list of conditions and the following disclaimer in the |
78 | * documentation and/or other materials provided with the distribution. | | 78 | * documentation and/or other materials provided with the distribution. |
79 | * 3. All advertising materials mentioning features or use of this software | | 79 | * 3. All advertising materials mentioning features or use of this software |
80 | * must display the following acknowledgement: | | 80 | * must display the following acknowledgement: |
81 | * This product includes software developed by Mark Brinicombe | | 81 | * This product includes software developed by Mark Brinicombe |
82 | * for the NetBSD Project. | | 82 | * for the NetBSD Project. |
83 | * 4. The name of the company nor the name of the author may be used to | | 83 | * 4. The name of the company nor the name of the author may be used to |
84 | * endorse or promote products derived from this software without specific | | 84 | * endorse or promote products derived from this software without specific |
85 | * prior written permission. | | 85 | * prior written permission. |
86 | * | | 86 | * |
87 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED | | 87 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED |
88 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF | | 88 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
89 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. | | 89 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
90 | * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, | | 90 | * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, |
91 | * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES | | 91 | * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
92 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR | | 92 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
93 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) | | 93 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
94 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT | | 94 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
95 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY | | 95 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
96 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF | | 96 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
97 | * SUCH DAMAGE. | | 97 | * SUCH DAMAGE. |
98 | * | | 98 | * |
99 | * Copyright (c) 2007 Microsoft | | 99 | * Copyright (c) 2007 Microsoft |
100 | * All rights reserved. | | 100 | * All rights reserved. |
101 | * | | 101 | * |
102 | * Redistribution and use in source and binary forms, with or without | | 102 | * Redistribution and use in source and binary forms, with or without |
103 | * modification, are permitted provided that the following conditions | | 103 | * modification, are permitted provided that the following conditions |
104 | * are met: | | 104 | * are met: |
105 | * 1. Redistributions of source code must retain the above copyright | | 105 | * 1. Redistributions of source code must retain the above copyright |
106 | * notice, this list of conditions and the following disclaimer. | | 106 | * notice, this list of conditions and the following disclaimer. |
107 | * 2. Redistributions in binary form must reproduce the above copyright | | 107 | * 2. Redistributions in binary form must reproduce the above copyright |
108 | * notice, this list of conditions and the following disclaimer in the | | 108 | * notice, this list of conditions and the following disclaimer in the |
109 | * documentation and/or other materials provided with the distribution. | | 109 | * documentation and/or other materials provided with the distribution. |
110 | * 3. All advertising materials mentioning features or use of this software | | 110 | * 3. All advertising materials mentioning features or use of this software |
111 | * must display the following acknowledgement: | | 111 | * must display the following acknowledgement: |
112 | * This product includes software developed by Microsoft | | 112 | * This product includes software developed by Microsoft |
113 | * | | 113 | * |
114 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED | | 114 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED |
115 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF | | 115 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
116 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. | | 116 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
117 | * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTERS BE LIABLE FOR ANY DIRECT, | | 117 | * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTERS BE LIABLE FOR ANY DIRECT, |
118 | * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES | | 118 | * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
119 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR | | 119 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
120 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) | | 120 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
121 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT | | 121 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
122 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY | | 122 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
123 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF | | 123 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
124 | * SUCH DAMAGE. | | 124 | * SUCH DAMAGE. |
125 | */ | | 125 | */ |
126 | | | 126 | |
127 | #include <sys/cdefs.h> | | 127 | #include <sys/cdefs.h> |
128 | __KERNEL_RCSID(0, "$NetBSD: beagle_machdep.c,v 1.42 2013/05/12 02:55:54 matt Exp $"); | | 128 | __KERNEL_RCSID(0, "$NetBSD: beagle_machdep.c,v 1.43 2013/06/11 22:59:54 matt Exp $"); |
129 | | | 129 | |
130 | #include "opt_machdep.h" | | 130 | #include "opt_machdep.h" |
131 | #include "opt_ddb.h" | | 131 | #include "opt_ddb.h" |
132 | #include "opt_kgdb.h" | | 132 | #include "opt_kgdb.h" |
133 | #include "opt_ipkdb.h" | | 133 | #include "opt_ipkdb.h" |
134 | #include "opt_md.h" | | 134 | #include "opt_md.h" |
135 | #include "opt_com.h" | | 135 | #include "opt_com.h" |
136 | #include "opt_omap.h" | | 136 | #include "opt_omap.h" |
137 | #include "prcm.h" | | 137 | #include "prcm.h" |
138 | #include "com.h" | | 138 | #include "com.h" |
139 | | | 139 | |
140 | #include <sys/param.h> | | 140 | #include <sys/param.h> |
141 | #include <sys/systm.h> | | 141 | #include <sys/systm.h> |
142 | #include <sys/bus.h> | | 142 | #include <sys/bus.h> |
143 | #include <sys/cpu.h> | | 143 | #include <sys/cpu.h> |
144 | #include <sys/device.h> | | 144 | #include <sys/device.h> |
145 | #include <sys/exec.h> | | 145 | #include <sys/exec.h> |
146 | #include <sys/kernel.h> | | 146 | #include <sys/kernel.h> |
147 | #include <sys/ksyms.h> | | 147 | #include <sys/ksyms.h> |
148 | #include <sys/msgbuf.h> | | 148 | #include <sys/msgbuf.h> |
149 | #include <sys/proc.h> | | 149 | #include <sys/proc.h> |
150 | #include <sys/reboot.h> | | 150 | #include <sys/reboot.h> |
151 | #include <sys/termios.h> | | 151 | #include <sys/termios.h> |
152 | | | 152 | |
153 | #include <uvm/uvm_extern.h> | | 153 | #include <uvm/uvm_extern.h> |
154 | | | 154 | |
155 | #include <sys/conf.h> | | 155 | #include <sys/conf.h> |
156 | #include <dev/cons.h> | | 156 | #include <dev/cons.h> |
157 | #include <dev/md.h> | | 157 | #include <dev/md.h> |
158 | | | 158 | |
159 | #include <machine/db_machdep.h> | | 159 | #include <machine/db_machdep.h> |
160 | #include <ddb/db_sym.h> | | 160 | #include <ddb/db_sym.h> |
161 | #include <ddb/db_extern.h> | | 161 | #include <ddb/db_extern.h> |
162 | #ifdef KGDB | | 162 | #ifdef KGDB |
163 | #include <sys/kgdb.h> | | 163 | #include <sys/kgdb.h> |
164 | #endif | | 164 | #endif |
165 | | | 165 | |
166 | #include <machine/bootconfig.h> | | 166 | #include <machine/bootconfig.h> |
167 | #include <arm/armreg.h> | | 167 | #include <arm/armreg.h> |
168 | #include <arm/undefined.h> | | 168 | #include <arm/undefined.h> |
169 | | | 169 | |
170 | #include <arm/arm32/machdep.h> | | 170 | #include <arm/arm32/machdep.h> |
171 | #include <arm/mainbus/mainbus.h> | | 171 | #include <arm/mainbus/mainbus.h> |
172 | | | 172 | |
173 | #include <arm/omap/omap_com.h> | | 173 | #include <arm/omap/omap_com.h> |
174 | #include <arm/omap/omap_var.h> | | 174 | #include <arm/omap/omap_var.h> |
175 | #include <arm/omap/omap_wdtvar.h> | | 175 | #include <arm/omap/omap_wdtvar.h> |
176 | #include <arm/omap/omap2_prcm.h> | | 176 | #include <arm/omap/omap2_prcm.h> |
177 | #include <arm/omap/omap2_gpio.h> | | 177 | #include <arm/omap/omap2_gpio.h> |
178 | #ifdef TI_AM335X | | 178 | #ifdef TI_AM335X |
179 | # include <arm/omap/am335x_prcm.h> | | 179 | # include <arm/omap/am335x_prcm.h> |
180 | #endif | | 180 | #endif |
181 | | | 181 | |
182 | #include <evbarm/include/autoconf.h> | | 182 | #include <evbarm/include/autoconf.h> |
183 | #include <evbarm/beagle/beagle.h> | | 183 | #include <evbarm/beagle/beagle.h> |
184 | | | 184 | |
185 | #include <dev/i2c/i2cvar.h> | | 185 | #include <dev/i2c/i2cvar.h> |
186 | #include <dev/i2c/ddcreg.h> | | 186 | #include <dev/i2c/ddcreg.h> |
187 | | | 187 | |
188 | #include "prcm.h" | | 188 | #include "prcm.h" |
189 | #include "omapwdt32k.h" | | 189 | #include "omapwdt32k.h" |
190 | #include "ukbd.h" | | 190 | #include "ukbd.h" |
191 | #include <dev/usb/ukbdvar.h> | | 191 | #include <dev/usb/ukbdvar.h> |
192 | | | 192 | |
193 | BootConfig bootconfig; /* Boot config storage */ | | 193 | BootConfig bootconfig; /* Boot config storage */ |
194 | static char bootargs[MAX_BOOT_STRING]; | | 194 | static char bootargs[MAX_BOOT_STRING]; |
195 | char *boot_args = NULL; | | 195 | char *boot_args = NULL; |
196 | char *boot_file = NULL; | | 196 | char *boot_file = NULL; |
197 | | | 197 | |
198 | static uint8_t beagle_edid[128]; /* EDID storage */ | | 198 | static uint8_t beagle_edid[128]; /* EDID storage */ |
199 | | | 199 | |
200 | u_int uboot_args[4] = { 0 }; /* filled in by beagle_start.S (not in bss) */ | | 200 | u_int uboot_args[4] = { 0 }; /* filled in by beagle_start.S (not in bss) */ |
201 | | | 201 | |
202 | /* Same things, but for the free (unused by the kernel) memory. */ | | 202 | /* Same things, but for the free (unused by the kernel) memory. */ |
203 | | | 203 | |
204 | extern char KERNEL_BASE_phys[]; | | 204 | extern char KERNEL_BASE_phys[]; |
205 | extern char _end[]; | | 205 | extern char _end[]; |
206 | | | 206 | |
207 | #if NCOM > 0 | | 207 | #if NCOM > 0 |
208 | int use_fb_console = false; | | 208 | int use_fb_console = false; |
209 | #else | | 209 | #else |
210 | int use_fb_console = true; | | 210 | int use_fb_console = true; |
211 | #endif | | 211 | #endif |
212 | | | 212 | |
213 | /* | | 213 | /* |
214 | * Macros to translate between physical and virtual for a subset of the | | 214 | * Macros to translate between physical and virtual for a subset of the |
215 | * kernel address space. *Not* for general use. | | 215 | * kernel address space. *Not* for general use. |
216 | */ | | 216 | */ |
217 | #define KERNEL_BASE_PHYS ((paddr_t)KERNEL_BASE_phys) | | 217 | #define KERNEL_BASE_PHYS ((paddr_t)KERNEL_BASE_phys) |
218 | | | 218 | |
219 | /* Prototypes */ | | 219 | /* Prototypes */ |
220 | | | 220 | |
221 | void consinit(void); | | 221 | void consinit(void); |
222 | #ifdef KGDB | | 222 | #ifdef KGDB |
223 | static void kgdb_port_init(void); | | 223 | static void kgdb_port_init(void); |
224 | #endif | | 224 | #endif |
225 | | | 225 | |
226 | static void init_clocks(void); | | 226 | static void init_clocks(void); |
227 | static void beagle_device_register(device_t, void *); | | 227 | static void beagle_device_register(device_t, void *); |
228 | static void beagle_reset(void); | | 228 | static void beagle_reset(void); |
229 | #if defined(OMAP_3430) || defined(OMAP_3530) || defined(TI_DM37XX) | | 229 | #if defined(OMAP_3430) || defined(OMAP_3530) || defined(TI_DM37XX) |
230 | static void omap3_cpu_clk(void); | | 230 | static void omap3_cpu_clk(void); |
231 | #endif | | 231 | #endif |
232 | #if defined(OMAP_4430) | | 232 | #if defined(OMAP_4430) |
233 | static void omap4_cpu_clk(void); | | 233 | static void omap4_cpu_clk(void); |
234 | #endif | | 234 | #endif |
235 | #if defined(TI_AM335X) | | 235 | #if defined(TI_AM335X) |
236 | static void am335x_cpu_clk(void); | | 236 | static void am335x_cpu_clk(void); |
237 | static psize_t am335x_memprobe(void); | | 237 | static psize_t am335x_memprobe(void); |
238 | #endif | | 238 | #endif |
239 | | | 239 | |
240 | #if defined(OMAP_3430) || defined(OMAP_3530) | | 240 | #if defined(OMAP_3430) || defined(OMAP_3530) |
241 | static psize_t omap3530_memprobe(void); | | 241 | static psize_t omap3530_memprobe(void); |
242 | #endif | | 242 | #endif |
243 | | | 243 | |
244 | bs_protos(bs_notimpl); | | 244 | bs_protos(bs_notimpl); |
245 | | | 245 | |
246 | #if NCOM > 0 | | 246 | #if NCOM > 0 |
247 | #include <dev/ic/comreg.h> | | 247 | #include <dev/ic/comreg.h> |
248 | #include <dev/ic/comvar.h> | | 248 | #include <dev/ic/comvar.h> |
249 | #endif | | 249 | #endif |
250 | | | 250 | |
251 | /* | | 251 | /* |
252 | * Static device mappings. These peripheral registers are mapped at | | 252 | * Static device mappings. These peripheral registers are mapped at |
253 | * fixed virtual addresses very early in initarm() so that we can use | | 253 | * fixed virtual addresses very early in initarm() so that we can use |
254 | * them while booting the kernel, and stay at the same address | | 254 | * them while booting the kernel, and stay at the same address |
255 | * throughout whole kernel's life time. | | 255 | * throughout whole kernel's life time. |
256 | * | | 256 | * |
257 | * We use this table twice; once with bootstrap page table, and once | | 257 | * We use this table twice; once with bootstrap page table, and once |
258 | * with kernel's page table which we build up in initarm(). | | 258 | * with kernel's page table which we build up in initarm(). |
259 | * | | 259 | * |
260 | * Since we map these registers into the bootstrap page table using | | 260 | * Since we map these registers into the bootstrap page table using |
261 | * pmap_devmap_bootstrap() which calls pmap_map_chunk(), we map | | 261 | * pmap_devmap_bootstrap() which calls pmap_map_chunk(), we map |
262 | * registers segment-aligned and segment-rounded in order to avoid | | 262 | * registers segment-aligned and segment-rounded in order to avoid |
263 | * using the 2nd page tables. | | 263 | * using the 2nd page tables. |
264 | */ | | 264 | */ |
265 | | | 265 | |
266 | #define _A(a) ((a) & ~L1_S_OFFSET) | | 266 | #define _A(a) ((a) & ~L1_S_OFFSET) |
267 | #define _S(s) (((s) + L1_S_SIZE - 1) & ~(L1_S_SIZE-1)) | | 267 | #define _S(s) (((s) + L1_S_SIZE - 1) & ~(L1_S_SIZE-1)) |
268 | | | 268 | |
269 | static const struct pmap_devmap devmap[] = { | | 269 | static const struct pmap_devmap devmap[] = { |
270 | { | | 270 | { |
271 | /* | | 271 | /* |
272 | * Map the first 1MB of L4 Core area | | 272 | * Map the first 1MB of L4 Core area |
273 | * this gets us the ICU, I2C, USB, GPT[10-11], MMC, McSPI | | 273 | * this gets us the ICU, I2C, USB, GPT[10-11], MMC, McSPI |
274 | * UART[12], clock manager, sDMA, ... | | 274 | * UART[12], clock manager, sDMA, ... |
275 | */ | | 275 | */ |
276 | .pd_va = _A(OMAP_L4_CORE_VBASE), | | 276 | .pd_va = _A(OMAP_L4_CORE_VBASE), |
277 | .pd_pa = _A(OMAP_L4_CORE_BASE), | | 277 | .pd_pa = _A(OMAP_L4_CORE_BASE), |
278 | .pd_size = _S(OMAP_L4_CORE_SIZE), | | 278 | .pd_size = _S(OMAP_L4_CORE_SIZE), |
279 | .pd_prot = VM_PROT_READ|VM_PROT_WRITE, | | 279 | .pd_prot = VM_PROT_READ|VM_PROT_WRITE, |
280 | .pd_cache = PTE_NOCACHE | | 280 | .pd_cache = PTE_NOCACHE |
281 | }, | | 281 | }, |
282 | { | | 282 | { |
283 | /* | | 283 | /* |
284 | * Map the all 1MB of the L4 Core area | | 284 | * Map the all 1MB of the L4 Core area |
285 | * this gets us the console UART3, GPT[2-9], WDT1, | | 285 | * this gets us the console UART3, GPT[2-9], WDT1, |
286 | * and GPIO[2-6]. | | 286 | * and GPIO[2-6]. |
287 | */ | | 287 | */ |
288 | .pd_va = _A(OMAP_L4_PERIPHERAL_VBASE), | | 288 | .pd_va = _A(OMAP_L4_PERIPHERAL_VBASE), |
289 | .pd_pa = _A(OMAP_L4_PERIPHERAL_BASE), | | 289 | .pd_pa = _A(OMAP_L4_PERIPHERAL_BASE), |
290 | .pd_size = _S(OMAP_L4_PERIPHERAL_SIZE), | | 290 | .pd_size = _S(OMAP_L4_PERIPHERAL_SIZE), |
291 | .pd_prot = VM_PROT_READ|VM_PROT_WRITE, | | 291 | .pd_prot = VM_PROT_READ|VM_PROT_WRITE, |
292 | .pd_cache = PTE_NOCACHE | | 292 | .pd_cache = PTE_NOCACHE |
293 | }, | | 293 | }, |
294 | #if defined(OMAP_L4_WAKEUP_BASE) && defined(OMAP_L4_WAKEUP_VBASE) | | 294 | #if defined(OMAP_L4_WAKEUP_BASE) && defined(OMAP_L4_WAKEUP_VBASE) |
295 | { | | 295 | { |
296 | /* | | 296 | /* |
297 | * Map all 256KB of the L4 Wakeup area | | 297 | * Map all 256KB of the L4 Wakeup area |
298 | * this gets us GPIO1, WDT2, GPT1, 32K and power/reset regs | | 298 | * this gets us GPIO1, WDT2, GPT1, 32K and power/reset regs |
299 | */ | | 299 | */ |
300 | .pd_va = _A(OMAP_L4_WAKEUP_VBASE), | | 300 | .pd_va = _A(OMAP_L4_WAKEUP_VBASE), |
301 | .pd_pa = _A(OMAP_L4_WAKEUP_BASE), | | 301 | .pd_pa = _A(OMAP_L4_WAKEUP_BASE), |
302 | .pd_size = _S(OMAP_L4_WAKEUP_SIZE), | | 302 | .pd_size = _S(OMAP_L4_WAKEUP_SIZE), |
303 | .pd_prot = VM_PROT_READ|VM_PROT_WRITE, | | 303 | .pd_prot = VM_PROT_READ|VM_PROT_WRITE, |
304 | .pd_cache = PTE_NOCACHE | | 304 | .pd_cache = PTE_NOCACHE |
305 | }, | | 305 | }, |
306 | #endif | | 306 | #endif |
307 | #ifdef OMAP_L4_FAST_BASE | | 307 | #ifdef OMAP_L4_FAST_BASE |
308 | { | | 308 | { |
309 | /* | | 309 | /* |
310 | * Map all of the L4 Fast area | | 310 | * Map all of the L4 Fast area |
311 | * this gets us GPIO1, WDT2, GPT1, 32K and power/reset regs | | 311 | * this gets us GPIO1, WDT2, GPT1, 32K and power/reset regs |
312 | */ | | 312 | */ |
313 | .pd_va = _A(OMAP_L4_FAST_VBASE), | | 313 | .pd_va = _A(OMAP_L4_FAST_VBASE), |
314 | .pd_pa = _A(OMAP_L4_FAST_BASE), | | 314 | .pd_pa = _A(OMAP_L4_FAST_BASE), |
315 | .pd_size = _S(OMAP_L4_FAST_SIZE), | | 315 | .pd_size = _S(OMAP_L4_FAST_SIZE), |
316 | .pd_prot = VM_PROT_READ|VM_PROT_WRITE, | | 316 | .pd_prot = VM_PROT_READ|VM_PROT_WRITE, |
317 | .pd_cache = PTE_NOCACHE | | 317 | .pd_cache = PTE_NOCACHE |
318 | }, | | 318 | }, |
319 | #endif | | 319 | #endif |
320 | #ifdef OMAP_EMIF_BASE | | 320 | #ifdef OMAP_EMIF_BASE |
321 | { | | 321 | { |
322 | /* | | 322 | /* |
323 | * Map all of the L4 EMIF area | | 323 | * Map all of the L4 EMIF area |
324 | */ | | 324 | */ |
325 | .pd_va = _A(OMAP_EMIF_VBASE), | | 325 | .pd_va = _A(OMAP_EMIF_VBASE), |
326 | .pd_pa = _A(OMAP_EMIF_BASE), | | 326 | .pd_pa = _A(OMAP_EMIF_BASE), |
327 | .pd_size = _S(OMAP_EMIF_SIZE), | | 327 | .pd_size = _S(OMAP_EMIF_SIZE), |
328 | .pd_prot = VM_PROT_READ|VM_PROT_WRITE, | | 328 | .pd_prot = VM_PROT_READ|VM_PROT_WRITE, |
329 | .pd_cache = PTE_NOCACHE | | 329 | .pd_cache = PTE_NOCACHE |
330 | }, | | 330 | }, |
331 | #endif | | 331 | #endif |
332 | #ifdef OMAP_L4_ABE_BASE | | 332 | #ifdef OMAP_L4_ABE_BASE |
333 | { | | 333 | { |
334 | /* | | 334 | /* |
335 | * Map all of the L4 Fast area | | 335 | * Map all of the L4 Fast area |
336 | * this gets us GPIO1, WDT2, GPT1, 32K and power/reset regs | | 336 | * this gets us GPIO1, WDT2, GPT1, 32K and power/reset regs |
337 | */ | | 337 | */ |
338 | .pd_va = _A(OMAP_L4_ABE_VBASE), | | 338 | .pd_va = _A(OMAP_L4_ABE_VBASE), |
339 | .pd_pa = _A(OMAP_L4_ABE_BASE), | | 339 | .pd_pa = _A(OMAP_L4_ABE_BASE), |
340 | .pd_size = _S(OMAP_L4_ABE_SIZE), | | 340 | .pd_size = _S(OMAP_L4_ABE_SIZE), |
341 | .pd_prot = VM_PROT_READ|VM_PROT_WRITE, | | 341 | .pd_prot = VM_PROT_READ|VM_PROT_WRITE, |
342 | .pd_cache = PTE_NOCACHE | | 342 | .pd_cache = PTE_NOCACHE |
343 | }, | | 343 | }, |
344 | #endif | | 344 | #endif |
345 | #ifdef OMAP_SDRC_BASE | | 345 | #ifdef OMAP_SDRC_BASE |
346 | { | | 346 | { |
347 | /* | | 347 | /* |
348 | * Map SDRAM Controller (SDRC) registers | | 348 | * Map SDRAM Controller (SDRC) registers |
349 | */ | | 349 | */ |
350 | .pd_va = _A(OMAP_SDRC_VBASE), | | 350 | .pd_va = _A(OMAP_SDRC_VBASE), |
351 | .pd_pa = _A(OMAP_SDRC_BASE), | | 351 | .pd_pa = _A(OMAP_SDRC_BASE), |
352 | .pd_size = _S(OMAP_SDRC_SIZE), | | 352 | .pd_size = _S(OMAP_SDRC_SIZE), |
353 | .pd_prot = VM_PROT_READ|VM_PROT_WRITE, | | 353 | .pd_prot = VM_PROT_READ|VM_PROT_WRITE, |
354 | .pd_cache = PTE_NOCACHE, | | 354 | .pd_cache = PTE_NOCACHE, |
355 | }, | | 355 | }, |
356 | #endif | | 356 | #endif |
357 | {0} | | 357 | {0} |
358 | }; | | 358 | }; |
359 | | | 359 | |
360 | #undef _A | | 360 | #undef _A |
361 | #undef _S | | 361 | #undef _S |
362 | | | 362 | |
363 | #ifdef DDB | | 363 | #ifdef DDB |
364 | static void | | 364 | static void |
365 | beagle_db_trap(int where) | | 365 | beagle_db_trap(int where) |
366 | { | | 366 | { |
367 | #if NOMAPWDT32K > 0 | | 367 | #if NOMAPWDT32K > 0 |
368 | static int oldwatchdogstate; | | 368 | static int oldwatchdogstate; |
369 | | | 369 | |
370 | if (where) { | | 370 | if (where) { |
371 | oldwatchdogstate = omapwdt32k_enable(0); | | 371 | oldwatchdogstate = omapwdt32k_enable(0); |
372 | } else { | | 372 | } else { |
373 | omapwdt32k_enable(oldwatchdogstate); | | 373 | omapwdt32k_enable(oldwatchdogstate); |
374 | } | | 374 | } |
375 | #endif | | 375 | #endif |
376 | } | | 376 | } |
377 | #endif | | 377 | #endif |
378 | | | 378 | |
379 | void beagle_putchar(char c); | | 379 | void beagle_putchar(char c); |
380 | void | | 380 | void |
381 | beagle_putchar(char c) | | 381 | beagle_putchar(char c) |
382 | { | | 382 | { |
383 | #if NCOM > 0 | | 383 | #if NCOM > 0 |
384 | unsigned char *com0addr = (char *)CONSADDR_VA; | | 384 | unsigned char *com0addr = (char *)CONSADDR_VA; |
385 | int timo = 150000; | | 385 | int timo = 150000; |
386 | | | 386 | |
387 | while ((com0addr[5 * 4] & 0x20) == 0) | | 387 | while ((com0addr[5 * 4] & 0x20) == 0) |
388 | if (--timo == 0) | | 388 | if (--timo == 0) |
389 | break; | | 389 | break; |
390 | | | 390 | |
391 | com0addr[0] = c; | | 391 | com0addr[0] = c; |
392 | | | 392 | |
393 | while ((com0addr[5 * 4] & 0x20) == 0) | | 393 | while ((com0addr[5 * 4] & 0x20) == 0) |
394 | if (--timo == 0) | | 394 | if (--timo == 0) |
395 | break; | | 395 | break; |
396 | #endif | | 396 | #endif |
397 | } | | 397 | } |
398 | | | 398 | |
399 | /* | | 399 | /* |
400 | * u_int initarm(...) | | 400 | * u_int initarm(...) |
401 | * | | 401 | * |
402 | * Initial entry point on startup. This gets called before main() is | | 402 | * Initial entry point on startup. This gets called before main() is |
403 | * entered. | | 403 | * entered. |
404 | * It should be responsible for setting up everything that must be | | 404 | * It should be responsible for setting up everything that must be |
405 | * in place when main is called. | | 405 | * in place when main is called. |
406 | * This includes | | 406 | * This includes |
407 | * Taking a copy of the boot configuration structure. | | 407 | * Taking a copy of the boot configuration structure. |
408 | * Initialising the physical console so characters can be printed. | | 408 | * Initialising the physical console so characters can be printed. |
409 | * Setting up page tables for the kernel | | 409 | * Setting up page tables for the kernel |
410 | * Relocating the kernel to the bottom of physical memory | | 410 | * Relocating the kernel to the bottom of physical memory |
411 | */ | | 411 | */ |
412 | u_int | | 412 | u_int |
413 | initarm(void *arg) | | 413 | initarm(void *arg) |
414 | { | | 414 | { |
415 | psize_t ram_size = 0; | | 415 | psize_t ram_size = 0; |
416 | char *ptr; | | 416 | char *ptr; |
417 | #if 1 | | 417 | #if 1 |
418 | beagle_putchar('d'); | | 418 | beagle_putchar('d'); |
419 | #endif | | 419 | #endif |
420 | /* | | 420 | /* |
421 | * When we enter here, we are using a temporary first level | | 421 | * When we enter here, we are using a temporary first level |
422 | * translation table with section entries in it to cover the OBIO | | 422 | * translation table with section entries in it to cover the OBIO |
423 | * peripherals and SDRAM. The temporary first level translation table | | 423 | * peripherals and SDRAM. The temporary first level translation table |
424 | * is at the end of SDRAM. | | 424 | * is at the end of SDRAM. |
425 | */ | | 425 | */ |
426 | #if defined(OMAP_3430) || defined(OMAP_3530) || defined(TI_DM37XX) | | 426 | #if defined(OMAP_3430) || defined(OMAP_3530) || defined(TI_DM37XX) |
427 | omap3_cpu_clk(); // find our CPU speed. | | 427 | omap3_cpu_clk(); // find our CPU speed. |
428 | #endif | | 428 | #endif |
429 | #if defined(OMAP_4430) | | 429 | #if defined(OMAP_4430) |
430 | omap4_cpu_clk(); // find our CPU speed. | | 430 | omap4_cpu_clk(); // find our CPU speed. |
431 | #endif | | 431 | #endif |
432 | #if defined(TI_AM335X) | | 432 | #if defined(TI_AM335X) |
433 | am335x_cpu_clk(); | | 433 | am335x_cpu_clk(); |
434 | #endif | | 434 | #endif |
435 | /* Heads up ... Setup the CPU / MMU / TLB functions. */ | | 435 | /* Heads up ... Setup the CPU / MMU / TLB functions. */ |
436 | if (set_cpufuncs()) | | 436 | if (set_cpufuncs()) |
437 | panic("cpu not recognized!"); | | 437 | panic("cpu not recognized!"); |
438 | | | 438 | |
439 | init_clocks(); | | 439 | init_clocks(); |
440 | | | 440 | |
441 | /* The console is going to try to map things. Give pmap a devmap. */ | | 441 | /* The console is going to try to map things. Give pmap a devmap. */ |
442 | pmap_devmap_register(devmap); | | 442 | pmap_devmap_register(devmap); |
443 | consinit(); | | 443 | consinit(); |
444 | #if 1 | | 444 | #if 1 |
445 | beagle_putchar('h'); | | 445 | beagle_putchar('h'); |
446 | #endif | | 446 | #endif |
447 | printf("uboot arg = %#x, %#x, %#x, %#x\n", | | 447 | printf("uboot arg = %#x, %#x, %#x, %#x\n", |
448 | uboot_args[0], uboot_args[1], uboot_args[2], uboot_args[3]); | | 448 | uboot_args[0], uboot_args[1], uboot_args[2], uboot_args[3]); |
449 | | | 449 | |
450 | #ifdef KGDB | | 450 | #ifdef KGDB |
451 | kgdb_port_init(); | | 451 | kgdb_port_init(); |
452 | #endif | | 452 | #endif |
453 | | | 453 | |
454 | cpu_reset_address = beagle_reset; | | 454 | cpu_reset_address = beagle_reset; |
455 | | | 455 | |
456 | #ifdef VERBOSE_INIT_ARM | | 456 | #ifdef VERBOSE_INIT_ARM |
457 | /* Talk to the user */ | | 457 | /* Talk to the user */ |
458 | printf("\nNetBSD/evbarm (beagle) booting ...\n"); | | 458 | printf("\nNetBSD/evbarm (beagle) booting ...\n"); |
459 | #endif | | 459 | #endif |
460 | | | 460 | |
461 | #ifdef BOOT_ARGSt | | 461 | #ifdef BOOT_ARGSt |
462 | char mi_bootargs[] = BOOT_ARGS; | | 462 | char mi_bootargs[] = BOOT_ARGS; |
463 | parse_mi_bootargs(mi_bootargs); | | 463 | parse_mi_bootargs(mi_bootargs); |
464 | #endif | | 464 | #endif |
465 | | | 465 | |
466 | #ifdef VERBOSE_INIT_ARM | | 466 | #ifdef VERBOSE_INIT_ARM |
467 | printf("initarm: Configuring system ...\n"); | | 467 | printf("initarm: Configuring system ...\n"); |
468 | #endif | | 468 | #endif |
469 | | | 469 | |
470 | /* | | 470 | /* |
471 | * Set up the variables that define the availability of physical | | 471 | * Set up the variables that define the availability of physical |
472 | * memory. | | 472 | * memory. |
473 | */ | | 473 | */ |
474 | #if defined(OMAP_3430) || defined(OMAP_3530) | | 474 | #if defined(OMAP_3430) || defined(OMAP_3530) |
475 | ram_size = omap3530_memprobe(); | | 475 | ram_size = omap3530_memprobe(); |
476 | #endif | | 476 | #endif |
477 | #if defined(TI_AM335X) | | 477 | #if defined(TI_AM335X) |
478 | ram_size = am335x_memprobe(); | | 478 | ram_size = am335x_memprobe(); |
479 | #endif | | 479 | #endif |
480 | /* | | 480 | /* |
481 | * If MEMSIZE specified less than what we really have, limit ourselves | | 481 | * If MEMSIZE specified less than what we really have, limit ourselves |
482 | * to that. | | 482 | * to that. |
483 | */ | | 483 | */ |
484 | #ifdef MEMSIZE | | 484 | #ifdef MEMSIZE |
485 | if (ram_size == 0 || ram_size > MEMSIZE * 1024 * 1024) | | 485 | if (ram_size == 0 || ram_size > MEMSIZE * 1024 * 1024) |
486 | ram_size = MEMSIZE * 1024 * 1024; | | 486 | ram_size = MEMSIZE * 1024 * 1024; |
487 | #else | | 487 | #else |
488 | KASSERTMSG(ram_size > 0, "RAM size unknown and MEMSIZE undefined"); | | 488 | KASSERTMSG(ram_size > 0, "RAM size unknown and MEMSIZE undefined"); |
489 | #endif | | 489 | #endif |
490 | | | 490 | |
491 | /* Fake bootconfig structure for the benefit of pmap.c. */ | | 491 | /* Fake bootconfig structure for the benefit of pmap.c. */ |
492 | bootconfig.dramblocks = 1; | | 492 | bootconfig.dramblocks = 1; |
493 | bootconfig.dram[0].address = KERNEL_BASE_PHYS & -0x400000; | | 493 | bootconfig.dram[0].address = KERNEL_BASE_PHYS & -0x400000; |
494 | bootconfig.dram[0].pages = ram_size / PAGE_SIZE; | | 494 | bootconfig.dram[0].pages = ram_size / PAGE_SIZE; |
495 | | | 495 | |
| | | 496 | #ifdef __HAVE_MM_MD_DIRECT_MAPPED_PHYS |
| | | 497 | const bool mapallmem_p = true; |
| | | 498 | KASSERT(ram_size <= KERNEL_VM_BASE - KERNEL_BASE); |
| | | 499 | #else |
| | | 500 | const bool mapallmem_p = false; |
| | | 501 | #endif |
| | | 502 | |
496 | arm32_bootmem_init(bootconfig.dram[0].address, ram_size, | | 503 | arm32_bootmem_init(bootconfig.dram[0].address, ram_size, |
497 | KERNEL_BASE_PHYS); | | 504 | KERNEL_BASE_PHYS); |
498 | arm32_kernel_vm_init(KERNEL_VM_BASE, ARM_VECTORS_HIGH, 0, devmap, true); | | 505 | arm32_kernel_vm_init(KERNEL_VM_BASE, ARM_VECTORS_HIGH, 0, devmap, |
| | | 506 | mapallmem_p); |
499 | | | 507 | |
500 | /* "bootargs" env variable is passed as 4th argument to kernel */ | | 508 | /* "bootargs" env variable is passed as 4th argument to kernel */ |
501 | if ((uboot_args[3] & 0xf0000000) == 0x80000000) { | | 509 | if ((uboot_args[3] & 0xf0000000) == 0x80000000) { |
502 | strlcpy(bootargs, (char *)uboot_args[3], sizeof(bootargs)); | | 510 | strlcpy(bootargs, (char *)uboot_args[3], sizeof(bootargs)); |
503 | } | | 511 | } |
504 | boot_args = bootargs; | | 512 | boot_args = bootargs; |
505 | parse_mi_bootargs(boot_args); | | 513 | parse_mi_bootargs(boot_args); |
506 | | | 514 | |
507 | /* we've a specific device_register routine */ | | 515 | /* we've a specific device_register routine */ |
508 | evbarm_device_register = beagle_device_register; | | 516 | evbarm_device_register = beagle_device_register; |
509 | | | 517 | |
510 | db_trap_callback = beagle_db_trap; | | 518 | db_trap_callback = beagle_db_trap; |
511 | | | 519 | |
512 | if (get_bootconf_option(boot_args, "console", | | 520 | if (get_bootconf_option(boot_args, "console", |
513 | BOOTOPT_TYPE_STRING, &ptr) && strncmp(ptr, "fb", 2) == 0) { | | 521 | BOOTOPT_TYPE_STRING, &ptr) && strncmp(ptr, "fb", 2) == 0) { |
514 | use_fb_console = true; | | 522 | use_fb_console = true; |
515 | } | | 523 | } |
516 | | | 524 | |
517 | return initarm_common(KERNEL_VM_BASE, KERNEL_VM_SIZE, NULL, 0); | | 525 | return initarm_common(KERNEL_VM_BASE, KERNEL_VM_SIZE, NULL, 0); |
518 | | | 526 | |
519 | } | | 527 | } |
520 | | | 528 | |
521 | static void | | 529 | static void |
522 | init_clocks(void) | | 530 | init_clocks(void) |
523 | { | | 531 | { |
524 | #ifdef NOTYET | | 532 | #ifdef NOTYET |
525 | static volatile uint32_t * const clksel_reg = (volatile uint32_t *) (OMAP3530_L4_WAKEUP_VBASE + OMAP2_CM_BASE + OMAP2_CM_CLKSEL_MPU - OMAP3530_L4_WAKEUP_BASE); | | 533 | static volatile uint32_t * const clksel_reg = (volatile uint32_t *) (OMAP3530_L4_WAKEUP_VBASE + OMAP2_CM_BASE + OMAP2_CM_CLKSEL_MPU - OMAP3530_L4_WAKEUP_BASE); |
526 | uint32_t v; | | 534 | uint32_t v; |
527 | beagle_putchar('E'); | | 535 | beagle_putchar('E'); |
528 | v = *clksel_reg; | | 536 | v = *clksel_reg; |
529 | beagle_putchar('F'); | | 537 | beagle_putchar('F'); |
530 | if (v != OMAP3530_CM_CLKSEL_MPU_FULLSPEED) { | | 538 | if (v != OMAP3530_CM_CLKSEL_MPU_FULLSPEED) { |
531 | printf("Changed CPU speed from half (%d) ", v); | | 539 | printf("Changed CPU speed from half (%d) ", v); |
532 | *clksel_reg = OMAP3530_CM_CLKSEL_MPU_FULLSPEED; | | 540 | *clksel_reg = OMAP3530_CM_CLKSEL_MPU_FULLSPEED; |
533 | printf("to full speed.\n"); | | 541 | printf("to full speed.\n"); |
534 | } | | 542 | } |
535 | beagle_putchar('G'); | | 543 | beagle_putchar('G'); |
536 | #endif | | 544 | #endif |
537 | } | | 545 | } |
538 | | | 546 | |
539 | #if NCOM > 0 | | 547 | #if NCOM > 0 |
540 | #ifndef CONSADDR | | 548 | #ifndef CONSADDR |
541 | #error Specify the address of the console UART with the CONSADDR option. | | 549 | #error Specify the address of the console UART with the CONSADDR option. |
542 | #endif | | 550 | #endif |
543 | #ifndef CONSPEED | | 551 | #ifndef CONSPEED |
544 | #define CONSPEED 115200 | | 552 | #define CONSPEED 115200 |
545 | #endif | | 553 | #endif |
546 | #ifndef CONMODE | | 554 | #ifndef CONMODE |
547 | #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ | | 555 | #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ |
548 | #endif | | 556 | #endif |
549 | | | 557 | |
550 | static const bus_addr_t consaddr = CONSADDR; | | 558 | static const bus_addr_t consaddr = CONSADDR; |
551 | static const int conspeed = CONSPEED; | | 559 | static const int conspeed = CONSPEED; |
552 | static const int conmode = CONMODE; | | 560 | static const int conmode = CONMODE; |
553 | #endif | | 561 | #endif |
554 | | | 562 | |
555 | void | | 563 | void |
556 | consinit(void) | | 564 | consinit(void) |
557 | { | | 565 | { |
558 | #if NCOM > 0 | | 566 | #if NCOM > 0 |
559 | bus_space_handle_t bh; | | 567 | bus_space_handle_t bh; |
560 | #endif | | 568 | #endif |
561 | static int consinit_called = 0; | | 569 | static int consinit_called = 0; |
562 | | | 570 | |
563 | if (consinit_called != 0) | | 571 | if (consinit_called != 0) |
564 | return; | | 572 | return; |
565 | | | 573 | |
566 | consinit_called = 1; | | 574 | consinit_called = 1; |
567 | | | 575 | |
568 | beagle_putchar('e'); | | 576 | beagle_putchar('e'); |
569 | | | 577 | |
570 | #if NCOM > 0 | | 578 | #if NCOM > 0 |
571 | if (bus_space_map(&omap_a4x_bs_tag, consaddr, OMAP_COM_SIZE, 0, &bh)) | | 579 | if (bus_space_map(&omap_a4x_bs_tag, consaddr, OMAP_COM_SIZE, 0, &bh)) |
572 | panic("Serial console can not be mapped."); | | 580 | panic("Serial console can not be mapped."); |
573 | | | 581 | |
574 | if (comcnattach(&omap_a4x_bs_tag, consaddr, conspeed, | | 582 | if (comcnattach(&omap_a4x_bs_tag, consaddr, conspeed, |
575 | OMAP_COM_FREQ, COM_TYPE_NORMAL, conmode)) | | 583 | OMAP_COM_FREQ, COM_TYPE_NORMAL, conmode)) |
576 | panic("Serial console can not be initialized."); | | 584 | panic("Serial console can not be initialized."); |
577 | | | 585 | |
578 | bus_space_unmap(&omap_a4x_bs_tag, bh, OMAP_COM_SIZE); | | 586 | bus_space_unmap(&omap_a4x_bs_tag, bh, OMAP_COM_SIZE); |
579 | #endif | | 587 | #endif |
580 | | | 588 | |
581 | #if NUKBD > 0 | | 589 | #if NUKBD > 0 |
582 | ukbd_cnattach(); /* allow USB keyboard to become console */ | | 590 | ukbd_cnattach(); /* allow USB keyboard to become console */ |
583 | #endif | | 591 | #endif |
584 | | | 592 | |
585 | beagle_putchar('f'); | | 593 | beagle_putchar('f'); |
586 | beagle_putchar('g'); | | 594 | beagle_putchar('g'); |
587 | } | | 595 | } |
588 | | | 596 | |
589 | void | | 597 | void |
590 | beagle_reset(void) | | 598 | beagle_reset(void) |
591 | { | | 599 | { |
592 | #if defined(OMAP_4430) | | 600 | #if defined(OMAP_4430) |
593 | *(volatile uint32_t *)(OMAP_L4_CORE_VBASE + (OMAP_L4_WAKEUP_BASE - OMAP_L4_CORE_BASE) + OMAP4_PRM_RSTCTRL) = OMAP4_PRM_RSTCTRL_WARM; | | 601 | *(volatile uint32_t *)(OMAP_L4_CORE_VBASE + (OMAP_L4_WAKEUP_BASE - OMAP_L4_CORE_BASE) + OMAP4_PRM_RSTCTRL) = OMAP4_PRM_RSTCTRL_WARM; |
594 | #elif defined(TI_AM335X) | | 602 | #elif defined(TI_AM335X) |
595 | *(volatile uint32_t *)(OMAP_L4_CORE_VBASE + (OMAP2_CM_BASE - OMAP_L4_CORE_BASE) + AM335X_PRCM_PRM_DEVICE + PRM_RSTCTRL) = RST_GLOBAL_WARM_SW; | | 603 | *(volatile uint32_t *)(OMAP_L4_CORE_VBASE + (OMAP2_CM_BASE - OMAP_L4_CORE_BASE) + AM335X_PRCM_PRM_DEVICE + PRM_RSTCTRL) = RST_GLOBAL_WARM_SW; |
596 | #else | | 604 | #else |
597 | #if NPRCM > 0 | | 605 | #if NPRCM > 0 |
598 | prcm_cold_reset(); | | 606 | prcm_cold_reset(); |
599 | #endif | | 607 | #endif |
600 | #if NOMAPWDT32K > 0 | | 608 | #if NOMAPWDT32K > 0 |
601 | omapwdt32k_reboot(); | | 609 | omapwdt32k_reboot(); |
602 | #endif | | 610 | #endif |
603 | #endif | | 611 | #endif |
604 | } | | 612 | } |
605 | | | 613 | |
606 | #ifdef KGDB | | 614 | #ifdef KGDB |
607 | #ifndef KGDB_DEVADDR | | 615 | #ifndef KGDB_DEVADDR |
608 | #error Specify the address of the kgdb UART with the KGDB_DEVADDR option. | | 616 | #error Specify the address of the kgdb UART with the KGDB_DEVADDR option. |
609 | #endif | | 617 | #endif |
610 | #ifndef KGDB_DEVRATE | | 618 | #ifndef KGDB_DEVRATE |
611 | #define KGDB_DEVRATE 115200 | | 619 | #define KGDB_DEVRATE 115200 |
612 | #endif | | 620 | #endif |
613 | | | 621 | |
614 | #ifndef KGDB_DEVMODE | | 622 | #ifndef KGDB_DEVMODE |
615 | #define KGDB_DEVMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ | | 623 | #define KGDB_DEVMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ |
616 | #endif | | 624 | #endif |
617 | static const vaddr_t comkgdbaddr = KGDB_DEVADDR; | | 625 | static const vaddr_t comkgdbaddr = KGDB_DEVADDR; |
618 | static const int comkgdbspeed = KGDB_DEVRATE; | | 626 | static const int comkgdbspeed = KGDB_DEVRATE; |
619 | static const int comkgdbmode = KGDB_DEVMODE; | | 627 | static const int comkgdbmode = KGDB_DEVMODE; |
620 | | | 628 | |
621 | void | | 629 | void |
622 | static kgdb_port_init(void) | | 630 | static kgdb_port_init(void) |
623 | { | | 631 | { |
624 | static int kgdbsinit_called = 0; | | 632 | static int kgdbsinit_called = 0; |
625 | | | 633 | |
626 | if (kgdbsinit_called != 0) | | 634 | if (kgdbsinit_called != 0) |
627 | return; | | 635 | return; |
628 | | | 636 | |
629 | kgdbsinit_called = 1; | | 637 | kgdbsinit_called = 1; |
630 | | | 638 | |
631 | bus_space_handle_t bh; | | 639 | bus_space_handle_t bh; |
632 | if (bus_space_map(&omap_a4x_bs_tag, comkgdbaddr, OMAP_COM_SIZE, 0, &bh)) | | 640 | if (bus_space_map(&omap_a4x_bs_tag, comkgdbaddr, OMAP_COM_SIZE, 0, &bh)) |
633 | panic("kgdb port can not be mapped."); | | 641 | panic("kgdb port can not be mapped."); |
634 | | | 642 | |
635 | if (com_kgdb_attach(&omap_a4x_bs_tag, comkgdbaddr, comkgdbspeed, | | 643 | if (com_kgdb_attach(&omap_a4x_bs_tag, comkgdbaddr, comkgdbspeed, |
636 | OMAP_COM_FREQ, COM_TYPE_NORMAL, comkgdbmode)) | | 644 | OMAP_COM_FREQ, COM_TYPE_NORMAL, comkgdbmode)) |
637 | panic("KGDB uart can not be initialized."); | | 645 | panic("KGDB uart can not be initialized."); |
638 | | | 646 | |
639 | bus_space_unmap(&omap_a4x_bs_tag, bh, OMAP_COM_SIZE); | | 647 | bus_space_unmap(&omap_a4x_bs_tag, bh, OMAP_COM_SIZE); |
640 | } | | 648 | } |
641 | #endif | | 649 | #endif |
642 | | | 650 | |
643 | #if defined(OMAP_3430) || defined(OMAP_3530) || defined(TI_DM37XX) | | 651 | #if defined(OMAP_3430) || defined(OMAP_3530) || defined(TI_DM37XX) |
644 | void | | 652 | void |
645 | omap3_cpu_clk(void) | | 653 | omap3_cpu_clk(void) |
646 | { | | 654 | { |
647 | const vaddr_t prm_base = OMAP2_PRM_BASE - OMAP_L4_CORE_BASE + OMAP_L4_CORE_VBASE; | | 655 | const vaddr_t prm_base = OMAP2_PRM_BASE - OMAP_L4_CORE_BASE + OMAP_L4_CORE_VBASE; |
648 | const uint32_t prm_clksel = *(volatile uint32_t *)(prm_base + PLL_MOD + OMAP3_PRM_CLKSEL); | | 656 | const uint32_t prm_clksel = *(volatile uint32_t *)(prm_base + PLL_MOD + OMAP3_PRM_CLKSEL); |
649 | static const uint32_t prm_clksel_freqs[] = OMAP3_PRM_CLKSEL_FREQS; | | 657 | static const uint32_t prm_clksel_freqs[] = OMAP3_PRM_CLKSEL_FREQS; |
650 | const uint32_t sys_clk = prm_clksel_freqs[__SHIFTOUT(prm_clksel, OMAP3_PRM_CLKSEL_CLKIN)]; | | 658 | const uint32_t sys_clk = prm_clksel_freqs[__SHIFTOUT(prm_clksel, OMAP3_PRM_CLKSEL_CLKIN)]; |
651 | const vaddr_t cm_base = OMAP2_CM_BASE - OMAP_L4_CORE_BASE + OMAP_L4_CORE_VBASE; | | 659 | const vaddr_t cm_base = OMAP2_CM_BASE - OMAP_L4_CORE_BASE + OMAP_L4_CORE_VBASE; |
652 | const uint32_t dpll1 = *(volatile uint32_t *)(cm_base + OMAP3_CM_CLKSEL1_PLL_MPU); | | 660 | const uint32_t dpll1 = *(volatile uint32_t *)(cm_base + OMAP3_CM_CLKSEL1_PLL_MPU); |
653 | const uint32_t dpll2 = *(volatile uint32_t *)(cm_base + OMAP3_CM_CLKSEL2_PLL_MPU); | | 661 | const uint32_t dpll2 = *(volatile uint32_t *)(cm_base + OMAP3_CM_CLKSEL2_PLL_MPU); |
654 | const uint32_t m = __SHIFTOUT(dpll1, OMAP3_CM_CLKSEL1_PLL_MPU_DPLL_MULT); | | 662 | const uint32_t m = __SHIFTOUT(dpll1, OMAP3_CM_CLKSEL1_PLL_MPU_DPLL_MULT); |
655 | const uint32_t n = __SHIFTOUT(dpll1, OMAP3_CM_CLKSEL1_PLL_MPU_DPLL_DIV); | | 663 | const uint32_t n = __SHIFTOUT(dpll1, OMAP3_CM_CLKSEL1_PLL_MPU_DPLL_DIV); |
656 | const uint32_t m2 = __SHIFTOUT(dpll2, OMAP3_CM_CLKSEL2_PLL_MPU_DPLL_CLKOUT_DIV); | | 664 | const uint32_t m2 = __SHIFTOUT(dpll2, OMAP3_CM_CLKSEL2_PLL_MPU_DPLL_CLKOUT_DIV); |
657 | | | 665 | |
658 | /* | | 666 | /* |
659 | * MPU_CLK supplies ARM_FCLK which is twice the CPU frequency. | | 667 | * MPU_CLK supplies ARM_FCLK which is twice the CPU frequency. |
660 | */ | | 668 | */ |
661 | curcpu()->ci_data.cpu_cc_freq = ((sys_clk * m) / ((n + 1) * m2 * 2)) * OMAP3_PRM_CLKSEL_MULT; | | 669 | curcpu()->ci_data.cpu_cc_freq = ((sys_clk * m) / ((n + 1) * m2 * 2)) * OMAP3_PRM_CLKSEL_MULT; |
662 | } | | 670 | } |
663 | #endif /* OMAP_3430 || OMAP_3530 || TI_DM37XX */ | | 671 | #endif /* OMAP_3430 || OMAP_3530 || TI_DM37XX */ |
664 | | | 672 | |
665 | #if defined(OMAP_4430) | | 673 | #if defined(OMAP_4430) |
666 | void | | 674 | void |
667 | omap4_cpu_clk(void) | | 675 | omap4_cpu_clk(void) |
668 | { | | 676 | { |
669 | const vaddr_t prm_base = OMAP2_PRM_BASE - OMAP_L4_CORE_BASE + OMAP_L4_CORE_VBASE; | | 677 | const vaddr_t prm_base = OMAP2_PRM_BASE - OMAP_L4_CORE_BASE + OMAP_L4_CORE_VBASE; |
670 | const vaddr_t cm_base = OMAP2_CM_BASE - OMAP_L4_CORE_BASE + OMAP_L4_CORE_VBASE; | | 678 | const vaddr_t cm_base = OMAP2_CM_BASE - OMAP_L4_CORE_BASE + OMAP_L4_CORE_VBASE; |
671 | static const uint32_t cm_clksel_freqs[] = OMAP4_CM_CLKSEL_FREQS; | | 679 | static const uint32_t cm_clksel_freqs[] = OMAP4_CM_CLKSEL_FREQS; |
672 | const uint32_t prm_clksel = *(volatile uint32_t *)(prm_base + OMAP4_CM_SYS_CLKSEL); | | 680 | const uint32_t prm_clksel = *(volatile uint32_t *)(prm_base + OMAP4_CM_SYS_CLKSEL); |
673 | const uint32_t sys_clk = cm_clksel_freqs[__SHIFTOUT(prm_clksel, OMAP4_CM_SYS_CLKSEL_CLKIN)]; | | 681 | const uint32_t sys_clk = cm_clksel_freqs[__SHIFTOUT(prm_clksel, OMAP4_CM_SYS_CLKSEL_CLKIN)]; |
674 | const uint32_t dpll1 = *(volatile uint32_t *)(cm_base + OMAP4_CM_CLKSEL_DPLL_MPU); | | 682 | const uint32_t dpll1 = *(volatile uint32_t *)(cm_base + OMAP4_CM_CLKSEL_DPLL_MPU); |
675 | const uint32_t dpll2 = *(volatile uint32_t *)(cm_base + OMAP4_CM_DIV_M2_DPLL_MPU); | | 683 | const uint32_t dpll2 = *(volatile uint32_t *)(cm_base + OMAP4_CM_DIV_M2_DPLL_MPU); |
676 | const uint32_t m = __SHIFTOUT(dpll1, OMAP4_CM_CLKSEL_DPLL_MPU_DPLL_MULT); | | 684 | const uint32_t m = __SHIFTOUT(dpll1, OMAP4_CM_CLKSEL_DPLL_MPU_DPLL_MULT); |
677 | const uint32_t n = __SHIFTOUT(dpll1, OMAP4_CM_CLKSEL_DPLL_MPU_DPLL_DIV); | | 685 | const uint32_t n = __SHIFTOUT(dpll1, OMAP4_CM_CLKSEL_DPLL_MPU_DPLL_DIV); |
678 | const uint32_t m2 = __SHIFTOUT(dpll2, OMAP4_CM_DIV_M2_DPLL_MPU_DPLL_CLKOUT_DIV); | | 686 | const uint32_t m2 = __SHIFTOUT(dpll2, OMAP4_CM_DIV_M2_DPLL_MPU_DPLL_CLKOUT_DIV); |
679 | | | 687 | |
680 | /* | | 688 | /* |
681 | * MPU_CLK supplies ARM_FCLK which is twice the CPU frequency. | | 689 | * MPU_CLK supplies ARM_FCLK which is twice the CPU frequency. |
682 | */ | | 690 | */ |
683 | curcpu()->ci_data.cpu_cc_freq = ((sys_clk * 2 * m) / ((n + 1) * m2)) * OMAP4_CM_CLKSEL_MULT / 2; | | 691 | curcpu()->ci_data.cpu_cc_freq = ((sys_clk * 2 * m) / ((n + 1) * m2)) * OMAP4_CM_CLKSEL_MULT / 2; |
684 | printf("%s: %"PRIu64": sys_clk=%u m=%u n=%u (%u) m2=%u mult=%u\n", | | 692 | printf("%s: %"PRIu64": sys_clk=%u m=%u n=%u (%u) m2=%u mult=%u\n", |
685 | __func__, curcpu()->ci_data.cpu_cc_freq, | | 693 | __func__, curcpu()->ci_data.cpu_cc_freq, |
686 | sys_clk, m, n, n+1, m2, OMAP4_CM_CLKSEL_MULT); | | 694 | sys_clk, m, n, n+1, m2, OMAP4_CM_CLKSEL_MULT); |
687 | } | | 695 | } |
688 | #endif /* OMAP_4400 */ | | 696 | #endif /* OMAP_4400 */ |
689 | | | 697 | |
690 | #if defined(TI_AM335X) | | 698 | #if defined(TI_AM335X) |
691 | void | | 699 | void |
692 | am335x_cpu_clk(void) | | 700 | am335x_cpu_clk(void) |
693 | { | | 701 | { |
694 | static const uint32_t sys_clks[4] = { | | 702 | static const uint32_t sys_clks[4] = { |
695 | [0] = 19200000, [1] = 24000000, [2] = 25000000, [3] = 26000000 | | 703 | [0] = 19200000, [1] = 24000000, [2] = 25000000, [3] = 26000000 |
696 | }; | | 704 | }; |
697 | const vaddr_t cm_base = OMAP2_CM_BASE - OMAP_L4_CORE_BASE + OMAP_L4_CORE_VBASE; | | 705 | const vaddr_t cm_base = OMAP2_CM_BASE - OMAP_L4_CORE_BASE + OMAP_L4_CORE_VBASE; |
698 | const vaddr_t cm_wkup_base = cm_base + AM335X_PRCM_CM_WKUP; | | 706 | const vaddr_t cm_wkup_base = cm_base + AM335X_PRCM_CM_WKUP; |
699 | const vaddr_t ctlmod_base = TI_AM335X_CTLMOD_BASE - OMAP_L4_CORE_BASE + OMAP_L4_CORE_VBASE; | | 707 | const vaddr_t ctlmod_base = TI_AM335X_CTLMOD_BASE - OMAP_L4_CORE_BASE + OMAP_L4_CORE_VBASE; |
700 | const uint32_t control_status = *(const volatile uint32_t *)(ctlmod_base + CTLMOD_CONTROL_STATUS); | | 708 | const uint32_t control_status = *(const volatile uint32_t *)(ctlmod_base + CTLMOD_CONTROL_STATUS); |
701 | const uint32_t sys_clk = sys_clks[__SHIFTOUT(control_status, CTLMOD_CONTROL_STATUS_SYSBOOT1)]; | | 709 | const uint32_t sys_clk = sys_clks[__SHIFTOUT(control_status, CTLMOD_CONTROL_STATUS_SYSBOOT1)]; |
702 | const uint32_t clksel_dpll_mpu = *(volatile uint32_t *)(cm_wkup_base + TI_AM335X_CM_CLKSEL_DPLL_MPU); | | 710 | const uint32_t clksel_dpll_mpu = *(volatile uint32_t *)(cm_wkup_base + TI_AM335X_CM_CLKSEL_DPLL_MPU); |
703 | const uint32_t div_m2_dpll_mpu = *(volatile uint32_t *)(cm_wkup_base + TI_AM335X_CM_DIV_M2_DPLL_MPU); | | 711 | const uint32_t div_m2_dpll_mpu = *(volatile uint32_t *)(cm_wkup_base + TI_AM335X_CM_DIV_M2_DPLL_MPU); |
704 | const uint32_t m = __SHIFTOUT(clksel_dpll_mpu, TI_AM335X_CM_CLKSEL_DPLL_MPU_DPLL_MULT); | | 712 | const uint32_t m = __SHIFTOUT(clksel_dpll_mpu, TI_AM335X_CM_CLKSEL_DPLL_MPU_DPLL_MULT); |
705 | const uint32_t n = __SHIFTOUT(clksel_dpll_mpu, TI_AM335X_CM_CLKSEL_DPLL_MPU_DPLL_DIV); | | 713 | const uint32_t n = __SHIFTOUT(clksel_dpll_mpu, TI_AM335X_CM_CLKSEL_DPLL_MPU_DPLL_DIV); |
706 | const uint32_t m2 = __SHIFTOUT(div_m2_dpll_mpu, TI_AM335X_CM_DIV_M2_DPLL_MPU_DPLL_CLKOUT_DIV); | | 714 | const uint32_t m2 = __SHIFTOUT(div_m2_dpll_mpu, TI_AM335X_CM_DIV_M2_DPLL_MPU_DPLL_CLKOUT_DIV); |
707 | /* XXX This ignores CM_CLKSEL_DPLL_MPU[DPLL_REGM4XEN]. */ | | 715 | /* XXX This ignores CM_CLKSEL_DPLL_MPU[DPLL_REGM4XEN]. */ |
708 | curcpu()->ci_data.cpu_cc_freq = ((m * (sys_clk / (n + 1))) / m2); | | 716 | curcpu()->ci_data.cpu_cc_freq = ((m * (sys_clk / (n + 1))) / m2); |
709 | printf("%s: %"PRIu64": sys_clk=%u m=%u n=%u (%u) m2=%u\n", | | 717 | printf("%s: %"PRIu64": sys_clk=%u m=%u n=%u (%u) m2=%u\n", |
710 | __func__, curcpu()->ci_data.cpu_cc_freq, | | 718 | __func__, curcpu()->ci_data.cpu_cc_freq, |
711 | sys_clk, m, n, n+1, m2); | | 719 | sys_clk, m, n, n+1, m2); |
712 | } | | 720 | } |
713 | | | 721 | |
714 | static psize_t | | 722 | static psize_t |
715 | am335x_memprobe(void) | | 723 | am335x_memprobe(void) |
716 | { | | 724 | { |
717 | const vaddr_t emif_base = OMAP_EMIF_VBASE; | | 725 | const vaddr_t emif_base = OMAP_EMIF_VBASE; |
718 | uint32_t sdram_config = *(const volatile uint32_t *)(emif_base + EMIF_SDRAM_CONFIG); | | 726 | uint32_t sdram_config = *(const volatile uint32_t *)(emif_base + EMIF_SDRAM_CONFIG); |
719 | /* | | 727 | /* |
720 | * The original bbone's u-boot misprograms the EMIF so correct it | | 728 | * The original bbone's u-boot misprograms the EMIF so correct it |
721 | * if we detect if it has the wrong value. | | 729 | * if we detect if it has the wrong value. |
722 | */ | | 730 | */ |
723 | if (sdram_config == 0x41805332) | | 731 | if (sdram_config == 0x41805332) |
724 | sdram_config -= __SHIFTIN(1, SDRAM_CONFIG_RSIZE); | | 732 | sdram_config -= __SHIFTIN(1, SDRAM_CONFIG_RSIZE); |
725 | | | 733 | |
726 | const u_int ibank = __SHIFTOUT(sdram_config, SDRAM_CONFIG_IBANK); | | 734 | const u_int ibank = __SHIFTOUT(sdram_config, SDRAM_CONFIG_IBANK); |
727 | const u_int rsize = 9 + __SHIFTOUT(sdram_config, SDRAM_CONFIG_RSIZE); | | 735 | const u_int rsize = 9 + __SHIFTOUT(sdram_config, SDRAM_CONFIG_RSIZE); |
728 | const u_int pagesize = 8 + __SHIFTOUT(sdram_config, SDRAM_CONFIG_PAGESIZE); | | 736 | const u_int pagesize = 8 + __SHIFTOUT(sdram_config, SDRAM_CONFIG_PAGESIZE); |
729 | const u_int width = 2 - __SHIFTOUT(sdram_config, SDRAM_CONFIG_WIDTH); | | 737 | const u_int width = 2 - __SHIFTOUT(sdram_config, SDRAM_CONFIG_WIDTH); |
730 | printf("sdram_config = %#x\n", sdram_config); | | 738 | printf("sdram_config = %#x\n", sdram_config); |
731 | return 1L << (ibank + rsize + pagesize + width); | | 739 | return 1L << (ibank + rsize + pagesize + width); |
732 | } | | 740 | } |
733 | #endif | | 741 | #endif |
734 | | | 742 | |
735 | #if defined(OMAP_3430) || defined(OMAP_3530) | | 743 | #if defined(OMAP_3430) || defined(OMAP_3530) |
736 | #define SDRC_MCFG(p) (0x80 + (0x30 * (p))) | | 744 | #define SDRC_MCFG(p) (0x80 + (0x30 * (p))) |
737 | #define SDRC_MCFG_MEMSIZE(m) ((((m) & __BITS(8,17)) >> 8) * 2) | | 745 | #define SDRC_MCFG_MEMSIZE(m) ((((m) & __BITS(8,17)) >> 8) * 2) |
738 | static psize_t | | 746 | static psize_t |
739 | omap3530_memprobe(void) | | 747 | omap3530_memprobe(void) |
740 | { | | 748 | { |
741 | const vaddr_t gpmc_base = OMAP_SDRC_VBASE; | | 749 | const vaddr_t gpmc_base = OMAP_SDRC_VBASE; |
742 | const uint32_t mcfg0 = *(volatile uint32_t *)(gpmc_base + SDRC_MCFG(0)); | | 750 | const uint32_t mcfg0 = *(volatile uint32_t *)(gpmc_base + SDRC_MCFG(0)); |
743 | const uint32_t mcfg1 = *(volatile uint32_t *)(gpmc_base + SDRC_MCFG(1)); | | 751 | const uint32_t mcfg1 = *(volatile uint32_t *)(gpmc_base + SDRC_MCFG(1)); |
744 | | | 752 | |
745 | printf("mcfg0 = %#x, size %lld\n", mcfg0, SDRC_MCFG_MEMSIZE(mcfg0)); | | 753 | printf("mcfg0 = %#x, size %lld\n", mcfg0, SDRC_MCFG_MEMSIZE(mcfg0)); |
746 | printf("mcfg1 = %#x, size %lld\n", mcfg1, SDRC_MCFG_MEMSIZE(mcfg1)); | | 754 | printf("mcfg1 = %#x, size %lld\n", mcfg1, SDRC_MCFG_MEMSIZE(mcfg1)); |
747 | | | 755 | |
748 | return (SDRC_MCFG_MEMSIZE(mcfg0) + SDRC_MCFG_MEMSIZE(mcfg1)) * 1024 * 1024; | | 756 | return (SDRC_MCFG_MEMSIZE(mcfg0) + SDRC_MCFG_MEMSIZE(mcfg1)) * 1024 * 1024; |
749 | } | | 757 | } |
750 | #endif | | 758 | #endif |
751 | | | 759 | |
752 | /* | | 760 | /* |
753 | * EDID can be read from DVI-D (HDMI) port on BeagleBoard from | | 761 | * EDID can be read from DVI-D (HDMI) port on BeagleBoard from |
754 | * If EDID data is present, this function fills in the supplied edid_buf | | 762 | * If EDID data is present, this function fills in the supplied edid_buf |
755 | * and returns true. Otherwise, it returns false and the contents of the | | 763 | * and returns true. Otherwise, it returns false and the contents of the |
756 | * buffer are undefined. | | 764 | * buffer are undefined. |
757 | */ | | 765 | */ |
758 | static bool | | 766 | static bool |
759 | beagle_read_edid(uint8_t *edid_buf, size_t edid_buflen) | | 767 | beagle_read_edid(uint8_t *edid_buf, size_t edid_buflen) |
760 | { | | 768 | { |
761 | #if defined(OMAP_3530) | | 769 | #if defined(OMAP_3530) |
762 | i2c_tag_t ic = NULL; | | 770 | i2c_tag_t ic = NULL; |
763 | uint8_t reg; | | 771 | uint8_t reg; |
764 | int error; | | 772 | int error; |
765 | | | 773 | |
766 | /* On Beagleboard, EDID is accessed using I2C2 ("omapiic2"). */ | | 774 | /* On Beagleboard, EDID is accessed using I2C2 ("omapiic2"). */ |
767 | extern i2c_tag_t omap3_i2c_get_tag(device_t); | | 775 | extern i2c_tag_t omap3_i2c_get_tag(device_t); |
768 | ic = omap3_i2c_get_tag(device_find_by_xname("omapiic2")); | | 776 | ic = omap3_i2c_get_tag(device_find_by_xname("omapiic2")); |
769 | | | 777 | |
770 | if (ic == NULL) | | 778 | if (ic == NULL) |
771 | return false; | | 779 | return false; |
772 | | | 780 | |
773 | iic_acquire_bus(ic, 0); | | 781 | iic_acquire_bus(ic, 0); |
774 | for (reg = DDC_EDID_START; reg < edid_buflen; reg++) { | | 782 | for (reg = DDC_EDID_START; reg < edid_buflen; reg++) { |
775 | error = iic_exec(ic, I2C_OP_READ_WITH_STOP, DDC_ADDR, | | 783 | error = iic_exec(ic, I2C_OP_READ_WITH_STOP, DDC_ADDR, |
776 | ®, sizeof(reg), &edid_buf[reg], 1, 0); | | 784 | ®, sizeof(reg), &edid_buf[reg], 1, 0); |
777 | if (error) | | 785 | if (error) |
778 | break; | | 786 | break; |
779 | } | | 787 | } |
780 | iic_release_bus(ic, 0); | | 788 | iic_release_bus(ic, 0); |
781 | | | 789 | |
782 | return error == 0 ? true : false; | | 790 | return error == 0 ? true : false; |
783 | #else | | 791 | #else |
784 | return false; | | 792 | return false; |
785 | #endif | | 793 | #endif |
786 | } | | 794 | } |
787 | | | 795 | |
788 | void | | 796 | void |
789 | beagle_device_register(device_t self, void *aux) | | 797 | beagle_device_register(device_t self, void *aux) |
790 | { | | 798 | { |
791 | prop_dictionary_t dict = device_properties(self); | | 799 | prop_dictionary_t dict = device_properties(self); |
792 | | | 800 | |
793 | if (device_is_a(self, "armperiph") | | 801 | if (device_is_a(self, "armperiph") |
794 | && device_is_a(device_parent(self), "mainbus")) { | | 802 | && device_is_a(device_parent(self), "mainbus")) { |
795 | /* | | 803 | /* |
796 | * XXX KLUDGE ALERT XXX | | 804 | * XXX KLUDGE ALERT XXX |
797 | * The iot mainbus supplies is completely wrong since it scales | | 805 | * The iot mainbus supplies is completely wrong since it scales |
798 | * addresses by 2. The simpliest remedy is to replace with our | | 806 | * addresses by 2. The simpliest remedy is to replace with our |
799 | * bus space used for the armcore regisers (which armperiph uses). | | 807 | * bus space used for the armcore regisers (which armperiph uses). |
800 | */ | | 808 | */ |
801 | struct mainbus_attach_args * const mb = aux; | | 809 | struct mainbus_attach_args * const mb = aux; |
802 | mb->mb_iot = &omap_bs_tag; | | 810 | mb->mb_iot = &omap_bs_tag; |
803 | return; | | 811 | return; |
804 | } | | 812 | } |
805 | | | 813 | |
806 | /* | | 814 | /* |
807 | * We need to tell the A9 Global/Watchdog Timer | | 815 | * We need to tell the A9 Global/Watchdog Timer |
808 | * what frequency it runs at. | | 816 | * what frequency it runs at. |
809 | */ | | 817 | */ |
810 | if (device_is_a(self, "a9tmr") || device_is_a(self, "a9wdt")) { | | 818 | if (device_is_a(self, "a9tmr") || device_is_a(self, "a9wdt")) { |
811 | /* | | 819 | /* |
812 | * This clock always runs at (arm_clk div 2) and only goes | | 820 | * This clock always runs at (arm_clk div 2) and only goes |
813 | * to timers that are part of the A9 MP core subsystem. | | 821 | * to timers that are part of the A9 MP core subsystem. |
814 | */ | | 822 | */ |
815 | prop_dictionary_set_uint32(dict, "frequency", | | 823 | prop_dictionary_set_uint32(dict, "frequency", |
816 | curcpu()->ci_data.cpu_cc_freq / 2); | | 824 | curcpu()->ci_data.cpu_cc_freq / 2); |
817 | return; | | 825 | return; |
818 | } | | 826 | } |
819 | | | 827 | |
820 | if (device_is_a(self, "ehci")) { | | 828 | if (device_is_a(self, "ehci")) { |
821 | #if defined(OMAP_3530) | | 829 | #if defined(OMAP_3530) |
822 | /* XXX Beagleboard specific port configuration */ | | 830 | /* XXX Beagleboard specific port configuration */ |
823 | prop_dictionary_set_cstring(dict, "port0-mode", "none"); | | 831 | prop_dictionary_set_cstring(dict, "port0-mode", "none"); |
824 | prop_dictionary_set_cstring(dict, "port1-mode", "phy"); | | 832 | prop_dictionary_set_cstring(dict, "port1-mode", "phy"); |
825 | prop_dictionary_set_cstring(dict, "port2-mode", "none"); | | 833 | prop_dictionary_set_cstring(dict, "port2-mode", "none"); |
826 | prop_dictionary_set_bool(dict, "phy-reset", true); | | 834 | prop_dictionary_set_bool(dict, "phy-reset", true); |
827 | prop_dictionary_set_int16(dict, "port0-gpio", -1); | | 835 | prop_dictionary_set_int16(dict, "port0-gpio", -1); |
828 | prop_dictionary_set_int16(dict, "port1-gpio", 147); | | 836 | prop_dictionary_set_int16(dict, "port1-gpio", 147); |
829 | prop_dictionary_set_int16(dict, "port2-gpio", -1); | | 837 | prop_dictionary_set_int16(dict, "port2-gpio", -1); |
830 | prop_dictionary_set_uint16(dict, "dpll5-m", 443); | | 838 | prop_dictionary_set_uint16(dict, "dpll5-m", 443); |
831 | prop_dictionary_set_uint16(dict, "dpll5-n", 11); | | 839 | prop_dictionary_set_uint16(dict, "dpll5-n", 11); |
832 | prop_dictionary_set_uint16(dict, "dpll5-m2", 4); | | 840 | prop_dictionary_set_uint16(dict, "dpll5-m2", 4); |
833 | #endif | | 841 | #endif |
834 | return; | | 842 | return; |
835 | } | | 843 | } |
836 | | | 844 | |
837 | if (device_is_a(self, "sdhc")) { | | 845 | if (device_is_a(self, "sdhc")) { |
838 | #if defined(OMAP_3430) || defined(OMAP_3530) | | 846 | #if defined(OMAP_3430) || defined(OMAP_3530) |
839 | prop_dictionary_set_uint32(dict, "clkmask", 0); | | 847 | prop_dictionary_set_uint32(dict, "clkmask", 0); |
840 | prop_dictionary_set_bool(dict, "8bit", true); | | 848 | prop_dictionary_set_bool(dict, "8bit", true); |
841 | #endif | | 849 | #endif |
842 | return; | | 850 | return; |
843 | } | | 851 | } |
844 | | | 852 | |
845 | if (device_is_a(self, "omapfb")) { | | 853 | if (device_is_a(self, "omapfb")) { |
846 | if (beagle_read_edid(beagle_edid, sizeof(beagle_edid))) { | | 854 | if (beagle_read_edid(beagle_edid, sizeof(beagle_edid))) { |
847 | prop_dictionary_set(dict, "EDID", | | 855 | prop_dictionary_set(dict, "EDID", |
848 | prop_data_create_data(beagle_edid, | | 856 | prop_data_create_data(beagle_edid, |
849 | sizeof(beagle_edid))); | | 857 | sizeof(beagle_edid))); |
850 | } | | 858 | } |
851 | if (use_fb_console) | | 859 | if (use_fb_console) |
852 | prop_dictionary_set_bool(dict, "is_console", true); | | 860 | prop_dictionary_set_bool(dict, "is_console", true); |
853 | return; | | 861 | return; |
854 | } | | 862 | } |
855 | if (device_is_a(self, "com")) { | | 863 | if (device_is_a(self, "com")) { |
856 | if (use_fb_console) | | 864 | if (use_fb_console) |
857 | prop_dictionary_set_bool(dict, "is_console", false); | | 865 | prop_dictionary_set_bool(dict, "is_console", false); |
858 | } | | 866 | } |
859 | } | | 867 | } |