| @@ -1,333 +1,336 @@ | | | @@ -1,333 +1,336 @@ |
1 | /* $NetBSD: a9tmr.c,v 1.4 2012/11/29 17:36:56 matt Exp $ */ | | 1 | /* $NetBSD: a9tmr.c,v 1.5 2013/06/12 00:59:50 matt Exp $ */ |
2 | | | 2 | |
3 | /*- | | 3 | /*- |
4 | * Copyright (c) 2012 The NetBSD Foundation, Inc. | | 4 | * Copyright (c) 2012 The NetBSD Foundation, Inc. |
5 | * All rights reserved. | | 5 | * All rights reserved. |
6 | * | | 6 | * |
7 | * This code is derived from software contributed to The NetBSD Foundation | | 7 | * This code is derived from software contributed to The NetBSD Foundation |
8 | * by Matt Thomas | | 8 | * by Matt Thomas |
9 | * | | 9 | * |
10 | * Redistribution and use in source and binary forms, with or without | | 10 | * Redistribution and use in source and binary forms, with or without |
11 | * modification, are permitted provided that the following conditions | | 11 | * modification, are permitted provided that the following conditions |
12 | * are met: | | 12 | * are met: |
13 | * 1. Redistributions of source code must retain the above copyright | | 13 | * 1. Redistributions of source code must retain the above copyright |
14 | * notice, this list of conditions and the following disclaimer. | | 14 | * notice, this list of conditions and the following disclaimer. |
15 | * 2. Redistributions in binary form must reproduce the above copyright | | 15 | * 2. Redistributions in binary form must reproduce the above copyright |
16 | * notice, this list of conditions and the following disclaimer in the | | 16 | * notice, this list of conditions and the following disclaimer in the |
17 | * documentation and/or other materials provided with the distribution. | | 17 | * documentation and/or other materials provided with the distribution. |
18 | * | | 18 | * |
19 | * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS | | 19 | * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS |
20 | * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED | | 20 | * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED |
21 | * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR | | 21 | * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR |
22 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS | | 22 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS |
23 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR | | 23 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
24 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF | | 24 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
25 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS | | 25 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
26 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN | | 26 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
27 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) | | 27 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
28 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE | | 28 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
29 | * POSSIBILITY OF SUCH DAMAGE. | | 29 | * POSSIBILITY OF SUCH DAMAGE. |
30 | */ | | 30 | */ |
31 | | | 31 | |
32 | #include <sys/cdefs.h> | | 32 | #include <sys/cdefs.h> |
33 | __KERNEL_RCSID(0, "$NetBSD: a9tmr.c,v 1.4 2012/11/29 17:36:56 matt Exp $"); | | 33 | __KERNEL_RCSID(0, "$NetBSD: a9tmr.c,v 1.5 2013/06/12 00:59:50 matt Exp $"); |
34 | | | 34 | |
35 | #include <sys/param.h> | | 35 | #include <sys/param.h> |
36 | #include <sys/bus.h> | | 36 | #include <sys/bus.h> |
37 | #include <sys/device.h> | | 37 | #include <sys/device.h> |
38 | #include <sys/intr.h> | | 38 | #include <sys/intr.h> |
39 | #include <sys/kernel.h> | | 39 | #include <sys/kernel.h> |
40 | #include <sys/proc.h> | | 40 | #include <sys/proc.h> |
41 | #include <sys/systm.h> | | 41 | #include <sys/systm.h> |
42 | #include <sys/timetc.h> | | 42 | #include <sys/timetc.h> |
43 | | | 43 | |
44 | #include <prop/proplib.h> | | 44 | #include <prop/proplib.h> |
45 | | | 45 | |
46 | #include <arm/cortex/a9tmr_reg.h> | | 46 | #include <arm/cortex/a9tmr_reg.h> |
47 | #include <arm/cortex/a9tmr_var.h> | | 47 | #include <arm/cortex/a9tmr_var.h> |
48 | | | 48 | |
49 | #include <arm/cortex/mpcore_var.h> | | 49 | #include <arm/cortex/mpcore_var.h> |
50 | | | 50 | |
51 | static int a9tmr_match(device_t, cfdata_t, void *); | | 51 | static int a9tmr_match(device_t, cfdata_t, void *); |
52 | static void a9tmr_attach(device_t, device_t, void *); | | 52 | static void a9tmr_attach(device_t, device_t, void *); |
53 | | | 53 | |
54 | static int clockhandler(void *); | | 54 | static int clockhandler(void *); |
55 | | | 55 | |
56 | static u_int a9tmr_get_timecount(struct timecounter *); | | 56 | static u_int a9tmr_get_timecount(struct timecounter *); |
57 | | | 57 | |
58 | static struct a9tmr_softc a9tmr_sc; | | 58 | static struct a9tmr_softc a9tmr_sc; |
59 | | | 59 | |
60 | static struct timecounter a9tmr_timecounter = { | | 60 | static struct timecounter a9tmr_timecounter = { |
61 | .tc_get_timecount = a9tmr_get_timecount, | | 61 | .tc_get_timecount = a9tmr_get_timecount, |
62 | .tc_poll_pps = 0, | | 62 | .tc_poll_pps = 0, |
63 | .tc_counter_mask = ~0u, | | 63 | .tc_counter_mask = ~0u, |
64 | .tc_frequency = 0, /* set by cpu_initclocks() */ | | 64 | .tc_frequency = 0, /* set by cpu_initclocks() */ |
65 | .tc_name = NULL, /* set by attach */ | | 65 | .tc_name = NULL, /* set by attach */ |
66 | .tc_quality = 500, | | 66 | .tc_quality = 500, |
67 | .tc_priv = &a9tmr_sc, | | 67 | .tc_priv = &a9tmr_sc, |
68 | .tc_next = NULL, | | 68 | .tc_next = NULL, |
69 | }; | | 69 | }; |
70 | | | 70 | |
71 | CFATTACH_DECL_NEW(a9tmr, 0, a9tmr_match, a9tmr_attach, NULL, NULL); | | 71 | CFATTACH_DECL_NEW(a9tmr, 0, a9tmr_match, a9tmr_attach, NULL, NULL); |
72 | | | 72 | |
73 | static inline uint32_t | | 73 | static inline uint32_t |
74 | a9tmr_global_read(struct a9tmr_softc *sc, bus_size_t o) | | 74 | a9tmr_global_read(struct a9tmr_softc *sc, bus_size_t o) |
75 | { | | 75 | { |
76 | return bus_space_read_4(sc->sc_memt, sc->sc_global_memh, o); | | 76 | return bus_space_read_4(sc->sc_memt, sc->sc_global_memh, o); |
77 | } | | 77 | } |
78 | | | 78 | |
79 | static inline void | | 79 | static inline void |
80 | a9tmr_global_write(struct a9tmr_softc *sc, bus_size_t o, uint32_t v) | | 80 | a9tmr_global_write(struct a9tmr_softc *sc, bus_size_t o, uint32_t v) |
81 | { | | 81 | { |
82 | bus_space_write_4(sc->sc_memt, sc->sc_global_memh, o, v); | | 82 | bus_space_write_4(sc->sc_memt, sc->sc_global_memh, o, v); |
83 | } | | 83 | } |
84 | | | 84 | |
85 | | | 85 | |
86 | /* ARGSUSED */ | | 86 | /* ARGSUSED */ |
87 | static int | | 87 | static int |
88 | a9tmr_match(device_t parent, cfdata_t cf, void *aux) | | 88 | a9tmr_match(device_t parent, cfdata_t cf, void *aux) |
89 | { | | 89 | { |
90 | struct mpcore_attach_args * const mpcaa = aux; | | 90 | struct mpcore_attach_args * const mpcaa = aux; |
91 | | | 91 | |
92 | if (a9tmr_sc.sc_dev != NULL) | | 92 | if (a9tmr_sc.sc_dev != NULL) |
93 | return 0; | | 93 | return 0; |
94 | | | 94 | |
| | | 95 | if ((armreg_pfr1_read() & ARM_PFR1_GTIMER_MASK) != 0) |
| | | 96 | return 0; |
| | | 97 | |
95 | if (!CPU_ID_CORTEX_A9_P(curcpu()->ci_arm_cpuid)) | | 98 | if (!CPU_ID_CORTEX_A9_P(curcpu()->ci_arm_cpuid)) |
96 | return 0; | | 99 | return 0; |
97 | | | 100 | |
98 | if (strcmp(mpcaa->mpcaa_name, cf->cf_name) != 0) | | 101 | if (strcmp(mpcaa->mpcaa_name, cf->cf_name) != 0) |
99 | return 0; | | 102 | return 0; |
100 | | | 103 | |
101 | /* | | 104 | /* |
102 | * This isn't present on UP A9s (since CBAR isn't present). | | 105 | * This isn't present on UP A9s (since CBAR isn't present). |
103 | */ | | 106 | */ |
104 | uint32_t mpidr = armreg_mpidr_read(); | | 107 | uint32_t mpidr = armreg_mpidr_read(); |
105 | if (mpidr == 0 || (mpidr & MPIDR_U)) | | 108 | if (mpidr == 0 || (mpidr & MPIDR_U)) |
106 | return 0; | | 109 | return 0; |
107 | | | 110 | |
108 | return 1; | | 111 | return 1; |
109 | } | | 112 | } |
110 | | | 113 | |
111 | static void | | 114 | static void |
112 | a9tmr_attach(device_t parent, device_t self, void *aux) | | 115 | a9tmr_attach(device_t parent, device_t self, void *aux) |
113 | { | | 116 | { |
114 | struct a9tmr_softc *sc = &a9tmr_sc; | | 117 | struct a9tmr_softc *sc = &a9tmr_sc; |
115 | struct mpcore_attach_args * const mpcaa = aux; | | 118 | struct mpcore_attach_args * const mpcaa = aux; |
116 | prop_dictionary_t dict = device_properties(self); | | 119 | prop_dictionary_t dict = device_properties(self); |
117 | char freqbuf[sizeof("XXX SHz")]; | | 120 | char freqbuf[sizeof("XXX SHz")]; |
118 | | | 121 | |
119 | /* | | 122 | /* |
120 | * This runs at the ARM PERIPHCLOCK which should be 1/2 of the CPU clock. | | 123 | * This runs at the ARM PERIPHCLOCK which should be 1/2 of the CPU clock. |
121 | * The MD code should have setup our frequency for us. | | 124 | * The MD code should have setup our frequency for us. |
122 | */ | | 125 | */ |
123 | prop_number_t pn = prop_dictionary_get(dict, "frequency"); | | 126 | prop_number_t pn = prop_dictionary_get(dict, "frequency"); |
124 | KASSERT(pn != NULL); | | 127 | KASSERT(pn != NULL); |
125 | sc->sc_freq = prop_number_unsigned_integer_value(pn); | | 128 | sc->sc_freq = prop_number_unsigned_integer_value(pn); |
126 | | | 129 | |
127 | humanize_number(freqbuf, sizeof(freqbuf), sc->sc_freq, "Hz", 1000); | | 130 | humanize_number(freqbuf, sizeof(freqbuf), sc->sc_freq, "Hz", 1000); |
128 | | | 131 | |
129 | aprint_naive("\n"); | | 132 | aprint_naive("\n"); |
130 | aprint_normal(": A9 Global 64-bit Timer (%s)\n", freqbuf); | | 133 | aprint_normal(": A9 Global 64-bit Timer (%s)\n", freqbuf); |
131 | | | 134 | |
132 | self->dv_private = sc; | | 135 | self->dv_private = sc; |
133 | sc->sc_dev = self; | | 136 | sc->sc_dev = self; |
134 | sc->sc_memt = mpcaa->mpcaa_memt; | | 137 | sc->sc_memt = mpcaa->mpcaa_memt; |
135 | sc->sc_memh = mpcaa->mpcaa_memh; | | 138 | sc->sc_memh = mpcaa->mpcaa_memh; |
136 | | | 139 | |
137 | evcnt_attach_dynamic(&sc->sc_ev_missing_ticks, EVCNT_TYPE_MISC, NULL, | | 140 | evcnt_attach_dynamic(&sc->sc_ev_missing_ticks, EVCNT_TYPE_MISC, NULL, |
138 | device_xname(self), "missing interrupts"); | | 141 | device_xname(self), "missing interrupts"); |
139 | | | 142 | |
140 | bus_space_subregion(sc->sc_memt, sc->sc_memh, | | 143 | bus_space_subregion(sc->sc_memt, sc->sc_memh, |
141 | TMR_GLOBAL_BASE, TMR_GLOBAL_BASE, &sc->sc_global_memh); | | 144 | TMR_GLOBAL_BASE, TMR_GLOBAL_BASE, &sc->sc_global_memh); |
142 | bus_space_subregion(sc->sc_memt, sc->sc_memh, | | 145 | bus_space_subregion(sc->sc_memt, sc->sc_memh, |
143 | TMR_PRIVATE_BASE, TMR_PRIVATE_SIZE, &sc->sc_private_memh); | | 146 | TMR_PRIVATE_BASE, TMR_PRIVATE_SIZE, &sc->sc_private_memh); |
144 | bus_space_subregion(sc->sc_memt, sc->sc_memh, | | 147 | bus_space_subregion(sc->sc_memt, sc->sc_memh, |
145 | TMR_WDOG_BASE, TMR_WDOG_SIZE, &sc->sc_wdog_memh); | | 148 | TMR_WDOG_BASE, TMR_WDOG_SIZE, &sc->sc_wdog_memh); |
146 | | | 149 | |
147 | sc->sc_global_ih = intr_establish(IRQ_A9TMR_PPI_GTIMER, IPL_CLOCK, | | 150 | sc->sc_global_ih = intr_establish(IRQ_A9TMR_PPI_GTIMER, IPL_CLOCK, |
148 | IST_EDGE, clockhandler, NULL); | | 151 | IST_EDGE, clockhandler, NULL); |
149 | if (sc->sc_global_ih == NULL) | | 152 | if (sc->sc_global_ih == NULL) |
150 | panic("%s: unable to register timer interrupt", __func__); | | 153 | panic("%s: unable to register timer interrupt", __func__); |
151 | aprint_normal_dev(sc->sc_dev, "interrupting on irq %d\n", | | 154 | aprint_normal_dev(sc->sc_dev, "interrupting on irq %d\n", |
152 | IRQ_A9TMR_PPI_GTIMER); | | 155 | IRQ_A9TMR_PPI_GTIMER); |
153 | } | | 156 | } |
154 | | | 157 | |
155 | static inline uint64_t | | 158 | static inline uint64_t |
156 | a9tmr_gettime(struct a9tmr_softc *sc) | | 159 | a9tmr_gettime(struct a9tmr_softc *sc) |
157 | { | | 160 | { |
158 | uint32_t lo, hi; | | 161 | uint32_t lo, hi; |
159 | | | 162 | |
160 | do { | | 163 | do { |
161 | hi = a9tmr_global_read(sc, TMR_GBL_CTR_U); | | 164 | hi = a9tmr_global_read(sc, TMR_GBL_CTR_U); |
162 | lo = a9tmr_global_read(sc, TMR_GBL_CTR_L); | | 165 | lo = a9tmr_global_read(sc, TMR_GBL_CTR_L); |
163 | } while (hi != a9tmr_global_read(sc, TMR_GBL_CTR_U)); | | 166 | } while (hi != a9tmr_global_read(sc, TMR_GBL_CTR_U)); |
164 | | | 167 | |
165 | return ((uint64_t)hi << 32) | lo; | | 168 | return ((uint64_t)hi << 32) | lo; |
166 | } | | 169 | } |
167 | | | 170 | |
168 | void | | 171 | void |
169 | a9tmr_init_cpu_clock(struct cpu_info *ci) | | 172 | a9tmr_init_cpu_clock(struct cpu_info *ci) |
170 | { | | 173 | { |
171 | struct a9tmr_softc * const sc = &a9tmr_sc; | | 174 | struct a9tmr_softc * const sc = &a9tmr_sc; |
172 | uint64_t now = a9tmr_gettime(sc); | | 175 | uint64_t now = a9tmr_gettime(sc); |
173 | | | 176 | |
174 | KASSERT(ci == curcpu()); | | 177 | KASSERT(ci == curcpu()); |
175 | | | 178 | |
176 | ci->ci_lastintr = now; | | 179 | ci->ci_lastintr = now; |
177 | | | 180 | |
178 | a9tmr_global_write(sc, TMR_GBL_AUTOINC, sc->sc_autoinc); | | 181 | a9tmr_global_write(sc, TMR_GBL_AUTOINC, sc->sc_autoinc); |
179 | | | 182 | |
180 | /* | | 183 | /* |
181 | * To update the compare register we have to disable comparisions first. | | 184 | * To update the compare register we have to disable comparisions first. |
182 | */ | | 185 | */ |
183 | uint32_t ctl = a9tmr_global_read(sc, TMR_GBL_CTL); | | 186 | uint32_t ctl = a9tmr_global_read(sc, TMR_GBL_CTL); |
184 | if (ctl & TMR_GBL_CTL_CMP_ENABLE) { | | 187 | if (ctl & TMR_GBL_CTL_CMP_ENABLE) { |
185 | a9tmr_global_write(sc, TMR_GBL_CTL, ctl & ~TMR_GBL_CTL_CMP_ENABLE); | | 188 | a9tmr_global_write(sc, TMR_GBL_CTL, ctl & ~TMR_GBL_CTL_CMP_ENABLE); |
186 | } | | 189 | } |
187 | | | 190 | |
188 | /* | | 191 | /* |
189 | * Schedule the next interrupt. | | 192 | * Schedule the next interrupt. |
190 | */ | | 193 | */ |
191 | now += sc->sc_autoinc; | | 194 | now += sc->sc_autoinc; |
192 | a9tmr_global_write(sc, TMR_GBL_CMP_L, (uint32_t) now); | | 195 | a9tmr_global_write(sc, TMR_GBL_CMP_L, (uint32_t) now); |
193 | a9tmr_global_write(sc, TMR_GBL_CMP_H, (uint32_t) (now >> 32)); | | 196 | a9tmr_global_write(sc, TMR_GBL_CMP_H, (uint32_t) (now >> 32)); |
194 | | | 197 | |
195 | /* | | 198 | /* |
196 | * Re-enable the comparator and now enable interrupts. | | 199 | * Re-enable the comparator and now enable interrupts. |
197 | */ | | 200 | */ |
198 | a9tmr_global_write(sc, TMR_GBL_INT, 1); /* clear interrupt pending */ | | 201 | a9tmr_global_write(sc, TMR_GBL_INT, 1); /* clear interrupt pending */ |
199 | ctl |= TMR_GBL_CTL_CMP_ENABLE | TMR_GBL_CTL_INT_ENABLE | TMR_GBL_CTL_AUTO_INC | TMR_CTL_ENABLE; | | 202 | ctl |= TMR_GBL_CTL_CMP_ENABLE | TMR_GBL_CTL_INT_ENABLE | TMR_GBL_CTL_AUTO_INC | TMR_CTL_ENABLE; |
200 | a9tmr_global_write(sc, TMR_GBL_CTL, ctl); | | 203 | a9tmr_global_write(sc, TMR_GBL_CTL, ctl); |
201 | #if 0 | | 204 | #if 0 |
202 | printf("%s: %s: ctl %#x autoinc %u cmp %#x%08x now %#"PRIx64"\n", | | 205 | printf("%s: %s: ctl %#x autoinc %u cmp %#x%08x now %#"PRIx64"\n", |
203 | __func__, ci->ci_data.cpu_name, | | 206 | __func__, ci->ci_data.cpu_name, |
204 | a9tmr_global_read(sc, TMR_GBL_CTL), | | 207 | a9tmr_global_read(sc, TMR_GBL_CTL), |
205 | a9tmr_global_read(sc, TMR_GBL_AUTOINC), | | 208 | a9tmr_global_read(sc, TMR_GBL_AUTOINC), |
206 | a9tmr_global_read(sc, TMR_GBL_CMP_H), | | 209 | a9tmr_global_read(sc, TMR_GBL_CMP_H), |
207 | a9tmr_global_read(sc, TMR_GBL_CMP_L), | | 210 | a9tmr_global_read(sc, TMR_GBL_CMP_L), |
208 | a9tmr_gettime(sc)); | | 211 | a9tmr_gettime(sc)); |
209 | | | 212 | |
210 | int s = splsched(); | | 213 | int s = splsched(); |
211 | uint64_t when = now; | | 214 | uint64_t when = now; |
212 | u_int n = 0; | | 215 | u_int n = 0; |
213 | while ((now = a9tmr_gettime(sc)) < when) { | | 216 | while ((now = a9tmr_gettime(sc)) < when) { |
214 | /* spin */ | | 217 | /* spin */ |
215 | n++; | | 218 | n++; |
216 | KASSERTMSG(n <= sc->sc_autoinc, | | 219 | KASSERTMSG(n <= sc->sc_autoinc, |
217 | "spun %u times but only %"PRIu64" has passed", | | 220 | "spun %u times but only %"PRIu64" has passed", |
218 | n, when - now); | | 221 | n, when - now); |
219 | } | | 222 | } |
220 | printf("%s: %s: status %#x cmp %#x%08x now %#"PRIx64"\n", | | 223 | printf("%s: %s: status %#x cmp %#x%08x now %#"PRIx64"\n", |
221 | __func__, ci->ci_data.cpu_name, | | 224 | __func__, ci->ci_data.cpu_name, |
222 | a9tmr_global_read(sc, TMR_GBL_INT), | | 225 | a9tmr_global_read(sc, TMR_GBL_INT), |
223 | a9tmr_global_read(sc, TMR_GBL_CMP_H), | | 226 | a9tmr_global_read(sc, TMR_GBL_CMP_H), |
224 | a9tmr_global_read(sc, TMR_GBL_CMP_L), | | 227 | a9tmr_global_read(sc, TMR_GBL_CMP_L), |
225 | a9tmr_gettime(sc)); | | 228 | a9tmr_gettime(sc)); |
226 | splx(s); | | 229 | splx(s); |
227 | #elif 0 | | 230 | #elif 0 |
228 | delay(1000000 / hz + 1000); | | 231 | delay(1000000 / hz + 1000); |
229 | #endif | | 232 | #endif |
230 | } | | 233 | } |
231 | | | 234 | |
232 | void | | 235 | void |
233 | cpu_initclocks(void) | | 236 | cpu_initclocks(void) |
234 | { | | 237 | { |
235 | struct a9tmr_softc * const sc = &a9tmr_sc; | | 238 | struct a9tmr_softc * const sc = &a9tmr_sc; |
236 | | | 239 | |
237 | KASSERT(sc->sc_dev != NULL); | | 240 | KASSERT(sc->sc_dev != NULL); |
238 | KASSERT(sc->sc_freq != 0); | | 241 | KASSERT(sc->sc_freq != 0); |
239 | | | 242 | |
240 | sc->sc_autoinc = sc->sc_freq / hz; | | 243 | sc->sc_autoinc = sc->sc_freq / hz; |
241 | | | 244 | |
242 | a9tmr_init_cpu_clock(curcpu()); | | 245 | a9tmr_init_cpu_clock(curcpu()); |
243 | | | 246 | |
244 | a9tmr_timecounter.tc_name = device_xname(sc->sc_dev); | | 247 | a9tmr_timecounter.tc_name = device_xname(sc->sc_dev); |
245 | a9tmr_timecounter.tc_frequency = sc->sc_freq; | | 248 | a9tmr_timecounter.tc_frequency = sc->sc_freq; |
246 | | | 249 | |
247 | tc_init(&a9tmr_timecounter); | | 250 | tc_init(&a9tmr_timecounter); |
248 | } | | 251 | } |
249 | | | 252 | |
250 | void | | 253 | void |
251 | a9tmr_delay(unsigned int n) | | 254 | a9tmr_delay(unsigned int n) |
252 | { | | 255 | { |
253 | struct a9tmr_softc * const sc = &a9tmr_sc; | | 256 | struct a9tmr_softc * const sc = &a9tmr_sc; |
254 | | | 257 | |
255 | KASSERT(sc != NULL); | | 258 | KASSERT(sc != NULL); |
256 | | | 259 | |
257 | uint32_t freq = sc->sc_freq ? sc->sc_freq : curcpu()->ci_data.cpu_cc_freq / 2; | | 260 | uint32_t freq = sc->sc_freq ? sc->sc_freq : curcpu()->ci_data.cpu_cc_freq / 2; |
258 | KASSERT(freq != 0); | | 261 | KASSERT(freq != 0); |
259 | | | 262 | |
260 | /* | | 263 | /* |
261 | * not quite divide by 1000000 but close enough | | 264 | * not quite divide by 1000000 but close enough |
262 | * (higher by 1.3% which means we wait 1.3% longer). | | 265 | * (higher by 1.3% which means we wait 1.3% longer). |
263 | */ | | 266 | */ |
264 | const uint64_t incr_per_us = (freq >> 20) + (freq >> 24); | | 267 | const uint64_t incr_per_us = (freq >> 20) + (freq >> 24); |
265 | | | 268 | |
266 | const uint64_t delta = n * incr_per_us; | | 269 | const uint64_t delta = n * incr_per_us; |
267 | const uint64_t base = a9tmr_gettime(sc); | | 270 | const uint64_t base = a9tmr_gettime(sc); |
268 | const uint64_t finish = base + delta; | | 271 | const uint64_t finish = base + delta; |
269 | | | 272 | |
270 | while (a9tmr_gettime(sc) < finish) { | | 273 | while (a9tmr_gettime(sc) < finish) { |
271 | /* spin */ | | 274 | /* spin */ |
272 | } | | 275 | } |
273 | } | | 276 | } |
274 | | | 277 | |
275 | /* | | 278 | /* |
276 | * clockhandler: | | 279 | * clockhandler: |
277 | * | | 280 | * |
278 | * Handle the hardclock interrupt. | | 281 | * Handle the hardclock interrupt. |
279 | */ | | 282 | */ |
280 | static int | | 283 | static int |
281 | clockhandler(void *arg) | | 284 | clockhandler(void *arg) |
282 | { | | 285 | { |
283 | struct clockframe * const cf = arg; | | 286 | struct clockframe * const cf = arg; |
284 | struct a9tmr_softc * const sc = &a9tmr_sc; | | 287 | struct a9tmr_softc * const sc = &a9tmr_sc; |
285 | struct cpu_info * const ci = curcpu(); | | 288 | struct cpu_info * const ci = curcpu(); |
286 | | | 289 | |
287 | const uint64_t now = a9tmr_gettime(sc); | | 290 | const uint64_t now = a9tmr_gettime(sc); |
288 | uint64_t delta = now - ci->ci_lastintr; | | 291 | uint64_t delta = now - ci->ci_lastintr; |
289 | | | 292 | |
290 | a9tmr_global_write(sc, TMR_GBL_INT, 1); // Ack the interrupt | | 293 | a9tmr_global_write(sc, TMR_GBL_INT, 1); // Ack the interrupt |
291 | | | 294 | |
292 | #if 0 | | 295 | #if 0 |
293 | printf("%s(%p): %s: now %#"PRIx64" delta %"PRIu64"\n", | | 296 | printf("%s(%p): %s: now %#"PRIx64" delta %"PRIu64"\n", |
294 | __func__, cf, ci->ci_data.cpu_name, now, delta); | | 297 | __func__, cf, ci->ci_data.cpu_name, now, delta); |
295 | #endif | | 298 | #endif |
296 | KASSERTMSG(delta > sc->sc_autoinc / 100, | | 299 | KASSERTMSG(delta > sc->sc_autoinc / 100, |
297 | "%s: interrupting too quickly (delta=%"PRIu64")", | | 300 | "%s: interrupting too quickly (delta=%"PRIu64")", |
298 | ci->ci_data.cpu_name, delta); | | 301 | ci->ci_data.cpu_name, delta); |
299 | | | 302 | |
300 | ci->ci_lastintr = now; | | 303 | ci->ci_lastintr = now; |
301 | | | 304 | |
302 | hardclock(cf); | | 305 | hardclock(cf); |
303 | | | 306 | |
304 | #if 0 | | 307 | #if 0 |
305 | /* | | 308 | /* |
306 | * Try to make up up to a seconds amount of missed clock interrupts | | 309 | * Try to make up up to a seconds amount of missed clock interrupts |
307 | */ | | 310 | */ |
308 | u_int ticks = hz; | | 311 | u_int ticks = hz; |
309 | for (delta -= sc->sc_autoinc; | | 312 | for (delta -= sc->sc_autoinc; |
310 | ticks > 0 && delta >= sc->sc_autoinc; | | 313 | ticks > 0 && delta >= sc->sc_autoinc; |
311 | delta -= sc->sc_autoinc, ticks--) { | | 314 | delta -= sc->sc_autoinc, ticks--) { |
312 | hardclock(cf); | | 315 | hardclock(cf); |
313 | } | | 316 | } |
314 | #else | | 317 | #else |
315 | if (delta > sc->sc_autoinc) | | 318 | if (delta > sc->sc_autoinc) |
316 | sc->sc_ev_missing_ticks.ev_count += delta / sc->sc_autoinc; | | 319 | sc->sc_ev_missing_ticks.ev_count += delta / sc->sc_autoinc; |
317 | #endif | | 320 | #endif |
318 | | | 321 | |
319 | return 1; | | 322 | return 1; |
320 | } | | 323 | } |
321 | | | 324 | |
322 | void | | 325 | void |
323 | setstatclockrate(int newhz) | | 326 | setstatclockrate(int newhz) |
324 | { | | 327 | { |
325 | } | | 328 | } |
326 | | | 329 | |
327 | static u_int | | 330 | static u_int |
328 | a9tmr_get_timecount(struct timecounter *tc) | | 331 | a9tmr_get_timecount(struct timecounter *tc) |
329 | { | | 332 | { |
330 | struct a9tmr_softc * const sc = tc->tc_priv; | | 333 | struct a9tmr_softc * const sc = tc->tc_priv; |
331 | | | 334 | |
332 | return (u_int) (a9tmr_gettime(sc)); | | 335 | return (u_int) (a9tmr_gettime(sc)); |
333 | } | | 336 | } |