 @@ -1,14 +1,14 @@
-/*	$NetBSD: atphy.c,v 1.14 2013/06/09 08:42:16 msaitoh Exp $ */
+/*	$NetBSD: atphy.c,v 1.15 2013/06/16 06:29:08 msaitoh Exp $ */
 /*	$OpenBSD: atphy.c,v 1.1 2008/09/25 20:47:16 brad Exp $	*/
 /*-
  * Copyright (c) 2008, Pyun YongHyeon <yongari@FreeBSD.org>
  * All rights reserved.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice unmodified, this list of conditions, and the following
  *    disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
 @@ -23,27 +23,27 @@
  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
  */
 /*
  * Driver for the Attansic F1 10/100/1000 PHY.
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: atphy.c,v 1.14 2013/06/09 08:42:16 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: atphy.c,v 1.15 2013/06/16 06:29:08 msaitoh Exp $");
 #include <sys/param.h>
 #include <sys/systm.h>
 #include <sys/kernel.h>
 #include <sys/device.h>
 #include <sys/socket.h>
 #include <net/if.h>
 #include <net/if_media.h>
 #include <dev/mii/mii.h>
 #include <dev/mii/miivar.h>
 #include <dev/mii/miidevs.h>
 @@ -223,27 +223,27 @@ atphy_service(struct mii_softc *sc, stru
 			 * Attansic/Atheros PHY hardwares.
 			 */
 			PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_ISO);
 			goto done;
 		default:
 			return EINVAL;
+		}
 		anar = mii_anar(ife->ifm_media);
 		if (((ife->ifm_media & IFM_GMASK) & IFM_FDX) != 0) {
 			bmcr |= BMCR_FDX;
 			/* Enable pause. */
 			if (sc->mii_flags & MIIF_DOPAUSE)
-				anar |= ANAR_X_PAUSE_TOWARDS;
+				anar |= ANAR_PAUSE_TOWARDS;
+		}
 		if ((sc->mii_extcapabilities & (EXTSR_1000TFDX |
 		    EXTSR_1000THDX)) != 0)
 			PHY_WRITE(sc, MII_100T2CR, 0);
 		PHY_WRITE(sc, MII_ANAR, anar);
 		/*
 		 * Start autonegotiation.
 		 */
 		PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_AUTOEN | BMCR_STARTNEG);
 done:
 		break;

 @@ -1,14 +1,14 @@
-/*	$NetBSD: brgphy.c,v 1.65 2013/06/14 06:21:51 msaitoh Exp $	*/
+/*	$NetBSD: brgphy.c,v 1.66 2013/06/16 06:29:08 msaitoh Exp $	*/
 /*-
  * Copyright (c) 1998, 1999, 2000, 2001 The NetBSD Foundation, Inc.
  * All rights reserved.
+ *
  * This code is derived from software contributed to The NetBSD Foundation
  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
  * NASA Ames Research Center.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
 @@ -52,27 +52,27 @@
  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 /*
  * driver for the Broadcom BCM5400 and BCM5700 Gig-E PHYs.
+ *
  * Programming information for this PHY was gleaned from FreeBSD
  * (they were apparently able to get a datasheet from Broadcom).
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: brgphy.c,v 1.65 2013/06/14 06:21:51 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: brgphy.c,v 1.66 2013/06/16 06:29:08 msaitoh Exp $");
 #include <sys/param.h>
 #include <sys/systm.h>
 #include <sys/kernel.h>
 #include <sys/device.h>
 #include <sys/socket.h>
 #include <sys/errno.h>
 #include <prop/proplib.h>
 #include <net/if.h>
 #include <net/if_media.h>
 #include <dev/mii/mii.h>
 @@ -590,27 +590,27 @@ brgphy_mii_phy_auto(struct mii_softc *sc
 	    && (sc->mii_mpd_model == MII_MODEL_BROADCOM_BCM5701))
 		ktcr |= GTCR_MAN_MS | GTCR_ADV_MS;
 	PHY_WRITE(sc, MII_100T2CR, ktcr);
 	ktcr = PHY_READ(sc, MII_100T2CR);
 	DELAY(1000);
 	if (sc->mii_flags & MIIF_HAVEFIBER) {
 		anar = ANAR_X_FD | ANAR_X_HD;
 		if (sc->mii_flags & MIIF_DOPAUSE)
 			anar |= BRGPHY_SERDES_ANAR_BOTH_PAUSE;
 	} else {
 		anar = BMSR_MEDIA_TO_ANAR(sc->mii_capabilities) | ANAR_CSMA;
 		if (sc->mii_flags & MIIF_DOPAUSE)
-			anar |= ANAR_FC | ANAR_X_PAUSE_ASYM;
+			anar |= ANAR_FC | ANAR_PAUSE_ASYM;
+	}
 	PHY_WRITE(sc, MII_ANAR, anar);
 	DELAY(1000);
 	/* Start autonegotiation */
 	PHY_WRITE(sc, MII_BMCR,
 	    BMCR_AUTOEN | BMCR_STARTNEG);
 	PHY_WRITE(sc, BRGPHY_MII_IMR, 0xFF00);
 	return (EJUSTRETURN);
+}
 void

 @@ -1,14 +1,14 @@
-/*	$NetBSD: mii.h,v 1.16 2013/04/15 08:09:48 msaitoh Exp $	*/
+/*	$NetBSD: mii.h,v 1.17 2013/06/16 06:29:08 msaitoh Exp $	*/
 /*
  * Copyright (c) 1997 Manuel Bouyer.  All rights reserved.
+ *
  * Modification to match BSD/OS 3.0 MII interface by Jason R. Thorpe,
  * Numerical Aerospace Simulation Facility, NASA Ames Research Center.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
 @@ -97,61 +97,72 @@
 #define	MII_PHYIDR1	0x02	/* ID register 1 (ro) */
 #define	MII_PHYIDR2	0x03	/* ID register 2 (ro) */
 #define	IDR2_OUILSB	0xfc00	/* OUI LSB */
 #define	IDR2_MODEL	0x03f0	/* vendor model */
 #define	IDR2_REV	0x000f	/* vendor revision */
 #define	MII_ANAR	0x04	/* Autonegotiation advertisement (rw) */
 		/* section 28.2.4.1 and 37.2.6.1 */
 #define ANAR_NP		0x8000	/* Next page (ro) */
 #define	ANAR_ACK	0x4000	/* link partner abilities acknowledged (ro) */
 #define ANAR_RF		0x2000	/* remote fault (ro) */
 		/* Annex 28B.2 */
 #define	ANAR_FC		0x0400	/* local device supports PAUSE */
 #define ANAR_T4		0x0200	/* local device supports 100bT4 */
 #define ANAR_TX_FD	0x0100	/* local device supports 100bTx FD */
 #define ANAR_TX		0x0080	/* local device supports 100bTx */
 #define ANAR_10_FD	0x0040	/* local device supports 10bT FD */
 #define ANAR_10		0x0020	/* local device supports 10bT */
 #define	ANAR_CSMA	0x0001	/* protocol selector CSMA/CD */
 #define	ANAR_PAUSE_NONE		(0 << 10)
 #define	ANAR_PAUSE_SYM		(1 << 10)
 #define	ANAR_PAUSE_ASYM		(2 << 10)
 #define	ANAR_PAUSE_TOWARDS	(3 << 10)
 		/* Annex 28D */
 #define	ANAR_X_FD	0x0020	/* local device supports 1000BASE-X FD */
 #define	ANAR_X_HD	0x0040	/* local device supports 1000BASE-X HD */
-#define	ANAR_X_PAUSE_NONE	(0 << 10)
+#define	ANAR_X_PAUSE_NONE	(0 << 7)
-#define	ANAR_X_PAUSE_SYM	(1 << 10)
+#define	ANAR_X_PAUSE_SYM	(1 << 7)
-#define	ANAR_X_PAUSE_ASYM	(2 << 10)
+#define	ANAR_X_PAUSE_ASYM	(2 << 7)
-#define	ANAR_X_PAUSE_TOWARDS	(3 << 10)
+#define	ANAR_X_PAUSE_TOWARDS	(3 << 7)
 #define	MII_ANLPAR	0x05	/* Autonegotiation lnk partner abilities (rw) */
 		/* section 28.2.4.1 and 37.2.6.1 */
 #define ANLPAR_NP	0x8000	/* Next page (ro) */
 #define	ANLPAR_ACK	0x4000	/* link partner accepted ACK (ro) */
 #define ANLPAR_RF	0x2000	/* remote fault (ro) */
 #define	ANLPAR_FC	0x0400	/* link partner supports PAUSE */
 #define ANLPAR_T4	0x0200	/* link partner supports 100bT4 */
 #define ANLPAR_TX_FD	0x0100	/* link partner supports 100bTx FD */
 #define ANLPAR_TX	0x0080	/* link partner supports 100bTx */
 #define ANLPAR_10_FD	0x0040	/* link partner supports 10bT FD */
 #define ANLPAR_10	0x0020	/* link partner supports 10bT */
 #define	ANLPAR_CSMA	0x0001	/* protocol selector CSMA/CD */
 #define	ANLPAR_PAUSE_MASK	(3 << 10)
 #define	ANLPAR_PAUSE_NONE	(0 << 10)
 #define	ANLPAR_PAUSE_SYM	(1 << 10)
 #define	ANLPAR_PAUSE_ASYM	(2 << 10)
 #define	ANLPAR_PAUSE_TOWARDS	(3 << 10)
 #define	ANLPAR_X_FD	0x0020	/* local device supports 1000BASE-X FD */
 #define	ANLPAR_X_HD	0x0040	/* local device supports 1000BASE-X HD */
-#define	ANLPAR_X_PAUSE_MASK	(3 << 10)
+#define	ANLPAR_X_PAUSE_MASK	(3 << 7)
-#define	ANLPAR_X_PAUSE_NONE	(0 << 10)
+#define	ANLPAR_X_PAUSE_NONE	(0 << 7)
-#define	ANLPAR_X_PAUSE_SYM	(1 << 10)
+#define	ANLPAR_X_PAUSE_SYM	(1 << 7)
-#define	ANLPAR_X_PAUSE_ASYM	(2 << 10)
+#define	ANLPAR_X_PAUSE_ASYM	(2 << 7)
-#define	ANLPAR_X_PAUSE_TOWARDS	(3 << 10)
+#define	ANLPAR_X_PAUSE_TOWARDS	(3 << 7)
 #define	MII_ANER	0x06	/* Autonegotiation expansion (ro) */
 		/* section 28.2.4.1 and 37.2.6.1 */
 #define ANER_MLF	0x0010	/* multiple link detection fault */
 #define ANER_LPNP	0x0008	/* link parter next page-able */
 #define ANER_NP		0x0004	/* next page-able */
 #define ANER_PAGE_RX	0x0002	/* Page received */
 #define ANER_LPAN	0x0001	/* link parter autoneg-able */
 #define	MII_ANNP	0x07	/* Autonegotiation next page */
 		/* section 28.2.4.1 and 37.2.6.1 */
 #define	MII_ANLPRNP	0x08	/* Autonegotiation link partner rx next page */

 @@ -1,14 +1,14 @@
-/*	$NetBSD: mii_physubr.c,v 1.78 2013/06/09 09:56:17 msaitoh Exp $	*/
+/*	$NetBSD: mii_physubr.c,v 1.79 2013/06/16 06:29:08 msaitoh Exp $	*/
 /*-
  * Copyright (c) 1998, 1999, 2000, 2001 The NetBSD Foundation, Inc.
  * All rights reserved.
+ *
  * This code is derived from software contributed to The NetBSD Foundation
  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
  * NASA Ames Research Center.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
 @@ -25,27 +25,27 @@
  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  */
 /*
  * Subroutines common to all PHYs.
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: mii_physubr.c,v 1.78 2013/06/09 09:56:17 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: mii_physubr.c,v 1.79 2013/06/16 06:29:08 msaitoh Exp $");
 #include <sys/param.h>
 #include <sys/device.h>
 #include <sys/systm.h>
 #include <sys/kernel.h>
 #include <sys/socket.h>
 #include <sys/errno.h>
 #include <sys/module.h>
 #include <sys/proc.h>
 #include <net/if.h>
 #include <net/if_media.h>
 #include <net/route.h>
 @@ -167,28 +167,28 @@ mii_phy_setmedia(struct mii_softc *sc)
 		default:
 			panic("mii_phy_setmedia: MASTER on wrong media");
+		}
+	}
 	if (mii->mii_media.ifm_media & IFM_FLOW) {
 		if (sc->mii_flags & MIIF_IS_1000X)
 			anar |= ANAR_X_PAUSE_SYM | ANAR_X_PAUSE_ASYM;
 		else {
 			anar |= ANAR_FC;
 			/* XXX Only 1000BASE-T has PAUSE_ASYM? */
 			if ((sc->mii_flags & MIIF_HAVE_GTCR) &&
 			    (sc->mii_extcapabilities &
-			     (EXTSR_1000THDX|EXTSR_1000TFDX)))
+			     (EXTSR_1000THDX | EXTSR_1000TFDX)))
-				anar |= ANAR_X_PAUSE_ASYM;
+				anar |= ANAR_PAUSE_ASYM;
+		}
+	}
 	if (ife->ifm_media & IFM_LOOP)
 		bmcr |= BMCR_LOOP;
 	PHY_WRITE(sc, MII_ANAR, anar);
 	if (sc->mii_flags & MIIF_HAVE_GTCR)
 		PHY_WRITE(sc, MII_100T2CR, gtcr);
 	if (IFM_SUBTYPE(ife->ifm_media) == IFM_1000_T) {
 		mii_phy_auto(sc, 0);
 	} else {
 		PHY_WRITE(sc, MII_BMCR, bmcr);
 @@ -222,28 +222,28 @@ mii_phy_auto(struct mii_softc *sc, int w
+			}
 			PHY_WRITE(sc, MII_ANAR, anar);
 		} else {
 			uint16_t anar;
 			anar = BMSR_MEDIA_TO_ANAR(sc->mii_capabilities) |
 			    ANAR_CSMA;
 			if (sc->mii_flags & MIIF_DOPAUSE) {
 				anar |= ANAR_FC;
 				/* XXX Only 1000BASE-T has PAUSE_ASYM? */
 				if ((sc->mii_flags & MIIF_HAVE_GTCR) &&
 				    (sc->mii_extcapabilities &
-				     (EXTSR_1000THDX|EXTSR_1000TFDX)))
+				     (EXTSR_1000THDX | EXTSR_1000TFDX)))
-					anar |= ANAR_X_PAUSE_ASYM;
+					anar |= ANAR_PAUSE_ASYM;
+			}
 			/*
 			 *for 1000-base-T, autonegotiation mus be enabled, but
 			 *if we're not set to auto, only advertise
 			 *1000-base-T with the link partner.
 			 */
 			if (IFM_SUBTYPE(ife->ifm_media) == IFM_1000_T) {
 				anar &= ~(ANAR_T4|ANAR_TX_FD|ANAR_TX|ANAR_10_FD|ANAR_10);
+			}
 			PHY_WRITE(sc, MII_ANAR, anar);
 			if (sc->mii_flags & MIIF_HAVE_GTCR) {
 @@ -637,50 +637,55 @@ mii_phy_match(const struct mii_attach_ar
  * Return the flow control status flag from MII_ANAR & MII_ANLPAR.
  */
 u_int
 mii_phy_flowstatus(struct mii_softc *sc)
+{
 	u_int anar, anlpar;
 	if ((sc->mii_flags & MIIF_DOPAUSE) == 0)
 		return (0);
 	anar = PHY_READ(sc, MII_ANAR);
 	anlpar = PHY_READ(sc, MII_ANLPAR);
-	if ((anar & ANAR_X_PAUSE_SYM) & (anlpar & ANLPAR_X_PAUSE_SYM))
+	/* For 1000baseX, the bits are in a different location. */
 	if (sc->mii_flags & MIIF_IS_1000X) {
 		anar <<= 3;
 		anlpar <<= 3;
+	}
 	if ((anar & ANAR_PAUSE_SYM) & (anlpar & ANLPAR_PAUSE_SYM))
 		return (IFM_FLOW|IFM_ETH_TXPAUSE|IFM_ETH_RXPAUSE);
-	if ((anar & ANAR_X_PAUSE_SYM) == 0) {
+	if ((anar & ANAR_PAUSE_SYM) == 0) {
-		if ((anar & ANAR_X_PAUSE_ASYM) &&
+		if ((anar & ANAR_PAUSE_ASYM) &&
-		    ((anlpar &
+		    ((anlpar & ANLPAR_PAUSE_TOWARDS) == ANLPAR_PAUSE_TOWARDS))
 		      ANLPAR_X_PAUSE_TOWARDS) == ANLPAR_X_PAUSE_TOWARDS))
 			return (IFM_FLOW|IFM_ETH_TXPAUSE);
 		else
 			return (0);
+	}
-	if ((anar & ANAR_X_PAUSE_ASYM) == 0) {
+	if ((anar & ANAR_PAUSE_ASYM) == 0) {
-		if (anlpar & ANLPAR_X_PAUSE_SYM)
+		if (anlpar & ANLPAR_PAUSE_SYM)
 			return (IFM_FLOW|IFM_ETH_TXPAUSE|IFM_ETH_RXPAUSE);
 		else
 			return (0);
+	}
-	switch ((anlpar & ANLPAR_X_PAUSE_TOWARDS)) {
+	switch ((anlpar & ANLPAR_PAUSE_TOWARDS)) {
-	case ANLPAR_X_PAUSE_NONE:
+	case ANLPAR_PAUSE_NONE:
 		return (0);
-	case ANLPAR_X_PAUSE_ASYM:
+	case ANLPAR_PAUSE_ASYM:
 		return (IFM_FLOW|IFM_ETH_RXPAUSE);
 	default:
 		return (IFM_FLOW|IFM_ETH_RXPAUSE|IFM_ETH_TXPAUSE);
+	}
 	/* NOTREACHED */
+}
 bool
 mii_phy_resume(device_t dv, const pmf_qual_t *qual)
+{
 	struct mii_softc *sc = device_private(dv);

 @@ -1,14 +1,14 @@
-/*	$NetBSD: rgephy.c,v 1.32 2013/06/09 09:31:32 msaitoh Exp $	*/
+/*	$NetBSD: rgephy.c,v 1.33 2013/06/16 06:29:08 msaitoh Exp $	*/
 /*
  * Copyright (c) 2003
  *	Bill Paul <wpaul@windriver.com>.  All rights reserved.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
 @@ -23,27 +23,27 @@
  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  * ARE DISCLAIMED.  IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
  * THE POSSIBILITY OF SUCH DAMAGE.
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: rgephy.c,v 1.32 2013/06/09 09:31:32 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: rgephy.c,v 1.33 2013/06/16 06:29:08 msaitoh Exp $");
 /*
  * Driver for the RealTek 8169S/8110S internal 10/100/1000 PHY.
  */
 #include <sys/param.h>
 #include <sys/systm.h>
 #include <sys/kernel.h>
 #include <sys/device.h>
 #include <sys/socket.h>
 @@ -430,27 +430,27 @@ rgephy_status(struct mii_softc *sc)
 static int
 rgephy_mii_phy_auto(struct mii_softc *mii)
+{
 	int anar;
 	mii->mii_ticks = 0;
 	rgephy_loop(mii);
 	rgephy_reset(mii);
 	anar = BMSR_MEDIA_TO_ANAR(mii->mii_capabilities) | ANAR_CSMA;
 	if (mii->mii_flags & MIIF_DOPAUSE)
-		anar |= ANAR_FC | ANAR_X_PAUSE_ASYM;
+		anar |= ANAR_FC | ANAR_PAUSE_ASYM;
 	PHY_WRITE(mii, MII_ANAR, anar);
 	DELAY(1000);
 	PHY_WRITE(mii, MII_100T2CR, GTCR_ADV_1000THDX | GTCR_ADV_1000TFDX);
 	DELAY(1000);
 	PHY_WRITE(mii, MII_BMCR, BMCR_AUTOEN | BMCR_STARTNEG);
 	DELAY(100);
 	return EJUSTRETURN;
+}
 static void
 rgephy_loop(struct mii_softc *sc)