Tue Jun 18 15:37:16 2013 UTC ()
Add PL310 L2CC init for OMAP4.
Use OMAP_[345]XXX
Add OMAP4 hooks in beagle_device_register


(matt)
diff -r1.46 -r1.47 src/sys/arch/evbarm/beagle/beagle_machdep.c

cvs diff -r1.46 -r1.47 src/sys/arch/evbarm/beagle/Attic/beagle_machdep.c (expand / switch to unified diff)

--- src/sys/arch/evbarm/beagle/Attic/beagle_machdep.c 2013/06/17 04:37:39 1.46
+++ src/sys/arch/evbarm/beagle/Attic/beagle_machdep.c 2013/06/18 15:37:16 1.47
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: beagle_machdep.c,v 1.46 2013/06/17 04:37:39 matt Exp $ */ 1/* $NetBSD: beagle_machdep.c,v 1.47 2013/06/18 15:37:16 matt Exp $ */
2 2
3/* 3/*
4 * Machine dependent functions for kernel setup for TI OSK5912 board. 4 * Machine dependent functions for kernel setup for TI OSK5912 board.
5 * Based on lubbock_machdep.c which in turn was based on iq80310_machhdep.c 5 * Based on lubbock_machdep.c which in turn was based on iq80310_machhdep.c
6 * 6 *
7 * Copyright (c) 2002, 2003, 2005 Genetec Corporation. All rights reserved. 7 * Copyright (c) 2002, 2003, 2005 Genetec Corporation. All rights reserved.
8 * Written by Hiroyuki Bessho for Genetec Corporation. 8 * Written by Hiroyuki Bessho for Genetec Corporation.
9 * 9 *
10 * Redistribution and use in source and binary forms, with or without 10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions 11 * modification, are permitted provided that the following conditions
12 * are met: 12 * are met:
13 * 1. Redistributions of source code must retain the above copyright 13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer. 14 * notice, this list of conditions and the following disclaimer.
@@ -115,50 +115,51 @@ @@ -115,50 +115,51 @@
115 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 115 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
116 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 116 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
117 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTERS BE LIABLE FOR ANY DIRECT, 117 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTERS BE LIABLE FOR ANY DIRECT,
118 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 118 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
119 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 119 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
120 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 120 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
121 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 121 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
122 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 122 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
123 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 123 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
124 * SUCH DAMAGE. 124 * SUCH DAMAGE.
125 */ 125 */
126 126
127#include <sys/cdefs.h> 127#include <sys/cdefs.h>
128__KERNEL_RCSID(0, "$NetBSD: beagle_machdep.c,v 1.46 2013/06/17 04:37:39 matt Exp $"); 128__KERNEL_RCSID(0, "$NetBSD: beagle_machdep.c,v 1.47 2013/06/18 15:37:16 matt Exp $");
129 129
130#include "opt_machdep.h" 130#include "opt_machdep.h"
131#include "opt_ddb.h" 131#include "opt_ddb.h"
132#include "opt_kgdb.h" 132#include "opt_kgdb.h"
133#include "opt_ipkdb.h" 133#include "opt_ipkdb.h"
134#include "opt_md.h" 134#include "opt_md.h"
135#include "opt_com.h" 135#include "opt_com.h"
136#include "opt_omap.h" 136#include "opt_omap.h"
137#include "prcm.h" 137#include "prcm.h"
138#include "com.h" 138#include "com.h"
139 139
140#include <sys/param.h> 140#include <sys/param.h>
141#include <sys/systm.h> 141#include <sys/systm.h>
142#include <sys/bus.h> 142#include <sys/bus.h>
143#include <sys/cpu.h> 143#include <sys/cpu.h>
144#include <sys/device.h> 144#include <sys/device.h>
145#include <sys/exec.h> 145#include <sys/exec.h>
146#include <sys/kernel.h> 146#include <sys/kernel.h>
147#include <sys/ksyms.h> 147#include <sys/ksyms.h>
148#include <sys/msgbuf.h> 148#include <sys/msgbuf.h>
149#include <sys/proc.h> 149#include <sys/proc.h>
150#include <sys/reboot.h> 150#include <sys/reboot.h>
151#include <sys/termios.h> 151#include <sys/termios.h>
 152#include <sys/gpio.h>
152 153
153#include <uvm/uvm_extern.h> 154#include <uvm/uvm_extern.h>
154 155
155#include <sys/conf.h> 156#include <sys/conf.h>
156#include <dev/cons.h> 157#include <dev/cons.h>
157#include <dev/md.h> 158#include <dev/md.h>
158 159
159#include <machine/db_machdep.h> 160#include <machine/db_machdep.h>
160#include <ddb/db_sym.h> 161#include <ddb/db_sym.h>
161#include <ddb/db_extern.h> 162#include <ddb/db_extern.h>
162#ifdef KGDB 163#ifdef KGDB
163#include <sys/kgdb.h> 164#include <sys/kgdb.h>
164#endif 165#endif
@@ -172,26 +173,31 @@ __KERNEL_RCSID(0, "$NetBSD: beagle_machd @@ -172,26 +173,31 @@ __KERNEL_RCSID(0, "$NetBSD: beagle_machd
172 173
173#include <dev/ic/ns16550reg.h> 174#include <dev/ic/ns16550reg.h>
174#include <dev/ic/comreg.h> 175#include <dev/ic/comreg.h>
175 176
176#include <arm/omap/omap_com.h> 177#include <arm/omap/omap_com.h>
177#include <arm/omap/omap_var.h> 178#include <arm/omap/omap_var.h>
178#include <arm/omap/omap_wdtvar.h> 179#include <arm/omap/omap_wdtvar.h>
179#include <arm/omap/omap2_prcm.h> 180#include <arm/omap/omap2_prcm.h>
180#include <arm/omap/omap2_gpio.h> 181#include <arm/omap/omap2_gpio.h>
181#ifdef TI_AM335X 182#ifdef TI_AM335X
182# include <arm/omap/am335x_prcm.h> 183# include <arm/omap/am335x_prcm.h>
183#endif 184#endif
184 185
 186#ifdef CPU_CORTEXA9
 187#include <arm/cortex/pl310_reg.h>
 188#include <arm/cortex/pl310_var.h>
 189#endif
 190
185#include <evbarm/include/autoconf.h> 191#include <evbarm/include/autoconf.h>
186#include <evbarm/beagle/beagle.h> 192#include <evbarm/beagle/beagle.h>
187 193
188#include <dev/i2c/i2cvar.h> 194#include <dev/i2c/i2cvar.h>
189#include <dev/i2c/ddcreg.h> 195#include <dev/i2c/ddcreg.h>
190 196
191#include "prcm.h" 197#include "prcm.h"
192#include "omapwdt32k.h" 198#include "omapwdt32k.h"
193#include "ukbd.h" 199#include "ukbd.h"
194#include <dev/usb/ukbdvar.h> 200#include <dev/usb/ukbdvar.h>
195 201
196BootConfig bootconfig; /* Boot config storage */ 202BootConfig bootconfig; /* Boot config storage */
197static char bootargs[MAX_BOOT_STRING]; 203static char bootargs[MAX_BOOT_STRING];
@@ -219,41 +225,41 @@ int use_fb_console = true; @@ -219,41 +225,41 @@ int use_fb_console = true;
219 */ 225 */
220#define KERNEL_BASE_PHYS ((paddr_t)KERNEL_BASE_phys) 226#define KERNEL_BASE_PHYS ((paddr_t)KERNEL_BASE_phys)
221 227
222/* Prototypes */ 228/* Prototypes */
223 229
224void consinit(void); 230void consinit(void);
225#ifdef KGDB 231#ifdef KGDB
226static void kgdb_port_init(void); 232static void kgdb_port_init(void);
227#endif 233#endif
228 234
229static void init_clocks(void); 235static void init_clocks(void);
230static void beagle_device_register(device_t, void *); 236static void beagle_device_register(device_t, void *);
231static void beagle_reset(void); 237static void beagle_reset(void);
232#if defined(OMAP_3430) || defined(OMAP_3530) || defined(TI_DM37XX) 238#if defined(OMAP_3XXX) || defined(TI_DM37XX)
233static void omap3_cpu_clk(void); 239static void omap3_cpu_clk(void);
234#endif 240#endif
235#if defined(OMAP_4430) || defined(OMAP_5430) 241#if defined(OMAP_4XXX) || defined(OMAP_5XXX)
236static void omap4_cpu_clk(void); 242static void omap4_cpu_clk(void);
237#endif 243#endif
238#if defined(TI_AM335X) 244#if defined(TI_AM335X)
239static void am335x_cpu_clk(void); 245static void am335x_cpu_clk(void);
240#endif 246#endif
241#if defined(OMAP_4430) || defined(OMAP_5430) || defined(TI_AM335X) 247#if defined(OMAP_4XXX) || defined(OMAP_5XXX) || defined(TI_AM335X)
242static psize_t emif_memprobe(void); 248static psize_t emif_memprobe(void);
243#endif 249#endif
244 250
245#if defined(OMAP_3430) || defined(OMAP_3530) 251#if defined(OMAP_3XXX)
246static psize_t omap3530_memprobe(void); 252static psize_t omap3_memprobe(void);
247#endif 253#endif
248 254
249bs_protos(bs_notimpl); 255bs_protos(bs_notimpl);
250 256
251#if NCOM > 0 257#if NCOM > 0
252#include <dev/ic/comreg.h> 258#include <dev/ic/comreg.h>
253#include <dev/ic/comvar.h> 259#include <dev/ic/comvar.h>
254#endif 260#endif
255 261
256/* 262/*
257 * Static device mappings. These peripheral registers are mapped at 263 * Static device mappings. These peripheral registers are mapped at
258 * fixed virtual addresses very early in initarm() so that we can use 264 * fixed virtual addresses very early in initarm() so that we can use
259 * them while booting the kernel, and stay at the same address 265 * them while booting the kernel, and stay at the same address
@@ -434,109 +440,105 @@ initarm(void *arg) @@ -434,109 +440,105 @@ initarm(void *arg)
434 psize_t ram_size = 0; 440 psize_t ram_size = 0;
435 char *ptr; 441 char *ptr;
436 442
437#if 1 443#if 1
438 beagle_putchar('d'); 444 beagle_putchar('d');
439#endif 445#endif
440 446
441 /* 447 /*
442 * When we enter here, we are using a temporary first level 448 * When we enter here, we are using a temporary first level
443 * translation table with section entries in it to cover the OBIO 449 * translation table with section entries in it to cover the OBIO
444 * peripherals and SDRAM. The temporary first level translation table 450 * peripherals and SDRAM. The temporary first level translation table
445 * is at the end of SDRAM. 451 * is at the end of SDRAM.
446 */ 452 */
447#if defined(OMAP_3430) || defined(OMAP_3530) || defined(TI_DM37XX) 453#if defined(OMAP_3XXX) || defined(TI_DM37XX)
448 omap3_cpu_clk(); // find our CPU speed. 454 omap3_cpu_clk(); // find our CPU speed.
449#endif 455#endif
450#if defined(OMAP_4430) || defined(OMAP_5430) 456#if defined(OMAP_4XXX) || defined(OMAP_5XXX)
451 omap4_cpu_clk(); // find our CPU speed. 457 omap4_cpu_clk(); // find our CPU speed.
452#endif 458#endif
453#if defined(TI_AM335X) 459#if defined(TI_AM335X)
454 am335x_cpu_clk(); // find our CPU speed. 460 am335x_cpu_clk(); // find our CPU speed.
455#endif 461#endif
456 /* Heads up ... Setup the CPU / MMU / TLB functions. */ 462 /* Heads up ... Setup the CPU / MMU / TLB functions. */
457 if (set_cpufuncs()) 463 if (set_cpufuncs())
458 panic("cpu not recognized!"); 464 panic("cpu not recognized!");
459 465
460 init_clocks(); 466 init_clocks();
461 467
462 /* The console is going to try to map things. Give pmap a devmap. */ 468 /* The console is going to try to map things. Give pmap a devmap. */
463 pmap_devmap_register(devmap); 469 pmap_devmap_register(devmap);
464 consinit(); 470 consinit();
 471#if defined(OMAP_4XXX)
 472 /*
 473 * Probe the PL310 L2CC
 474 */
 475 const bus_space_handle_t pl310_bh = OMAP4_L2CC_BASE +
 476 OMAP_L4_PERIPHERAL_VBASE - OMAP_L4_PERIPHERAL_BASE;
 477 arml2cc_init(&omap_bs_tag, pl310_bh, 0);
 478#endif
465#if 1 479#if 1
466 beagle_putchar('h'); 480 beagle_putchar('h');
467#endif 481#endif
468 printf("uboot arg = %#x, %#x, %#x, %#x\n", 482 printf("uboot arg = %#x, %#x, %#x, %#x\n",
469 uboot_args[0], uboot_args[1], uboot_args[2], uboot_args[3]); 483 uboot_args[0], uboot_args[1], uboot_args[2], uboot_args[3]);
470 484
471#ifdef KGDB 485#ifdef KGDB
472 kgdb_port_init(); 486 kgdb_port_init();
473#endif 487#endif
474 488
475 cpu_reset_address = beagle_reset; 489 cpu_reset_address = beagle_reset;
476 490
477#ifdef VERBOSE_INIT_ARM 491#ifdef VERBOSE_INIT_ARM
478 /* Talk to the user */ 492 /* Talk to the user */
479 printf("\nNetBSD/evbarm (beagle) booting ...\n"); 493 printf("\nNetBSD/evbarm (beagle) booting ...\n");
480#endif 494#endif
481 495
482#ifdef BOOT_ARGSt 496#ifdef BOOT_ARGS
483 char mi_bootargs[] = BOOT_ARGS; 497 char mi_bootargs[] = BOOT_ARGS;
484 parse_mi_bootargs(mi_bootargs); 498 parse_mi_bootargs(mi_bootargs);
485#endif 499#endif
486 500
487#ifdef VERBOSE_INIT_ARM 501#ifdef VERBOSE_INIT_ARM
488 printf("initarm: Configuring system ...\n"); 502 printf("initarm: Configuring system ...\n");
489#endif 503#endif
490 504
491 /* 505 /*
492 * Set up the variables that define the availability of physical 506 * Set up the variables that define the availability of physical
493 * memory. 507 * memory.
494 */ 508 */
495#if defined(OMAP_3430) || defined(OMAP_3530) 509#if defined(OMAP_3XXX)
496 ram_size = omap3530_memprobe(); 510 ram_size = omap3_memprobe();
497#endif 511#endif
498#if defined(OMAP_4430) || defined(OMAP_5430) || defined(TI_AM335X) 512#if defined(OMAP_4XXX) || defined(OMAP_5XXX) || defined(TI_AM335X)
499 ram_size = emif_memprobe(); 513 ram_size = emif_memprobe();
500#endif 514#endif
501 515
502 /* 516 /*
503 * If MEMSIZE specified less than what we really have, limit ourselves 517 * If MEMSIZE specified less than what we really have, limit ourselves
504 * to that. 518 * to that.
505 */ 519 */
506#ifdef MEMSIZE 520#ifdef MEMSIZE
507 if (ram_size == 0 || ram_size > (unsigned)MEMSIZE * 1024 * 1024) 521 if (ram_size == 0 || ram_size > (unsigned)MEMSIZE * 1024 * 1024)
508 ram_size = (unsigned)MEMSIZE * 1024 * 1024; 522 ram_size = (unsigned)MEMSIZE * 1024 * 1024;
509#else 523#else
510 KASSERTMSG(ram_size > 0, "RAM size unknown and MEMSIZE undefined"); 524 KASSERTMSG(ram_size > 0, "RAM size unknown and MEMSIZE undefined");
511#endif 525#endif
512 526
513 /* Fake bootconfig structure for the benefit of pmap.c. */ 527 /* Fake bootconfig structure for the benefit of pmap.c. */
514 bootconfig.dramblocks = 1; 528 bootconfig.dramblocks = 1;
515 bootconfig.dram[0].address = KERNEL_BASE_PHYS & -0x400000; 529 bootconfig.dram[0].address = KERNEL_BASE_PHYS & -0x400000;
516 bootconfig.dram[0].pages = ram_size / PAGE_SIZE; 530 bootconfig.dram[0].pages = ram_size / PAGE_SIZE;
517 531
518#if 0 
519#if defined(OMAP_4430) || defined(OMAP_5430) || defined(TI_AM335X) 
520 KASSERT(cs1_p == false); 
521 if (cs1_p > 0) { 
522 bootconfig.dramblocks = 2; 
523 bootconfig.dram[1].address = 0xC0000000; 
524 bootconfig.dram[0].pages /= 2; 
525 bootconfig.dram[1].pages = bootconfig.dram[0].pages; 
526 } 
527#endif 
528#endif 
529 
530#ifdef __HAVE_MM_MD_DIRECT_MAPPED_PHYS 532#ifdef __HAVE_MM_MD_DIRECT_MAPPED_PHYS
531 const bool mapallmem_p = true; 533 const bool mapallmem_p = true;
532 KASSERT(ram_size <= KERNEL_VM_BASE - KERNEL_BASE); 534 KASSERT(ram_size <= KERNEL_VM_BASE - KERNEL_BASE);
533#else 535#else
534 const bool mapallmem_p = false; 536 const bool mapallmem_p = false;
535#endif 537#endif
536 KASSERT((armreg_pfr1_read() & ARM_PFR1_SEC_MASK) != 0); 538 KASSERT((armreg_pfr1_read() & ARM_PFR1_SEC_MASK) != 0);
537 539
538 arm32_bootmem_init(bootconfig.dram[0].address, ram_size, 540 arm32_bootmem_init(bootconfig.dram[0].address, ram_size,
539 KERNEL_BASE_PHYS); 541 KERNEL_BASE_PHYS);
540 arm32_kernel_vm_init(KERNEL_VM_BASE, ARM_VECTORS_LOW, 0, devmap, 542 arm32_kernel_vm_init(KERNEL_VM_BASE, ARM_VECTORS_LOW, 0, devmap,
541 mapallmem_p); 543 mapallmem_p);
542 544
@@ -622,27 +624,27 @@ consinit(void) @@ -622,27 +624,27 @@ consinit(void)
622#endif 624#endif
623 625
624#if NUKBD > 0 626#if NUKBD > 0
625 ukbd_cnattach(); /* allow USB keyboard to become console */ 627 ukbd_cnattach(); /* allow USB keyboard to become console */
626#endif 628#endif
627 629
628 beagle_putchar('f'); 630 beagle_putchar('f');
629 beagle_putchar('g'); 631 beagle_putchar('g');
630} 632}
631 633
632void 634void
633beagle_reset(void) 635beagle_reset(void)
634{ 636{
635#if defined(OMAP_4430) 637#if defined(OMAP_4XXX) || defined(OMAP_5XXX)
636 *(volatile uint32_t *)(OMAP_L4_CORE_VBASE + (OMAP_L4_WAKEUP_BASE - OMAP_L4_CORE_BASE) + OMAP4_PRM_RSTCTRL) = OMAP4_PRM_RSTCTRL_WARM; 638 *(volatile uint32_t *)(OMAP_L4_CORE_VBASE + (OMAP_L4_WAKEUP_BASE - OMAP_L4_CORE_BASE) + OMAP4_PRM_RSTCTRL) = OMAP4_PRM_RSTCTRL_WARM;
637#elif defined(TI_AM335X) 639#elif defined(TI_AM335X)
638 *(volatile uint32_t *)(OMAP_L4_CORE_VBASE + (OMAP2_CM_BASE - OMAP_L4_CORE_BASE) + AM335X_PRCM_PRM_DEVICE + PRM_RSTCTRL) = RST_GLOBAL_WARM_SW; 640 *(volatile uint32_t *)(OMAP_L4_CORE_VBASE + (OMAP2_CM_BASE - OMAP_L4_CORE_BASE) + AM335X_PRCM_PRM_DEVICE + PRM_RSTCTRL) = RST_GLOBAL_WARM_SW;
639#else 641#else
640#if NPRCM > 0 642#if NPRCM > 0
641 prcm_cold_reset(); 643 prcm_cold_reset();
642#endif 644#endif
643#if NOMAPWDT32K > 0 645#if NOMAPWDT32K > 0
644 omapwdt32k_reboot(); 646 omapwdt32k_reboot();
645#endif 647#endif
646#endif 648#endif
647} 649}
648 650
@@ -673,74 +675,74 @@ static kgdb_port_init(void) @@ -673,74 +675,74 @@ static kgdb_port_init(void)
673 675
674 bus_space_handle_t bh; 676 bus_space_handle_t bh;
675 if (bus_space_map(&omap_a4x_bs_tag, comkgdbaddr, OMAP_COM_SIZE, 0, &bh)) 677 if (bus_space_map(&omap_a4x_bs_tag, comkgdbaddr, OMAP_COM_SIZE, 0, &bh))
676 panic("kgdb port can not be mapped."); 678 panic("kgdb port can not be mapped.");
677 679
678 if (com_kgdb_attach(&omap_a4x_bs_tag, comkgdbaddr, comkgdbspeed, 680 if (com_kgdb_attach(&omap_a4x_bs_tag, comkgdbaddr, comkgdbspeed,
679 OMAP_COM_FREQ, COM_TYPE_NORMAL, comkgdbmode)) 681 OMAP_COM_FREQ, COM_TYPE_NORMAL, comkgdbmode))
680 panic("KGDB uart can not be initialized."); 682 panic("KGDB uart can not be initialized.");
681 683
682 bus_space_unmap(&omap_a4x_bs_tag, bh, OMAP_COM_SIZE); 684 bus_space_unmap(&omap_a4x_bs_tag, bh, OMAP_COM_SIZE);
683} 685}
684#endif 686#endif
685 687
686#if defined(OMAP_3430) || defined(OMAP_3530) || defined(TI_DM37XX) 688#if defined(OMAP_3XXX) || defined(TI_DM37XX)
687void 689void
688omap3_cpu_clk(void) 690omap3_cpu_clk(void)
689{ 691{
690 const vaddr_t prm_base = OMAP2_PRM_BASE - OMAP_L4_CORE_BASE + OMAP_L4_CORE_VBASE; 692 const vaddr_t prm_base = OMAP2_PRM_BASE - OMAP_L4_CORE_BASE + OMAP_L4_CORE_VBASE;
691 const uint32_t prm_clksel = *(volatile uint32_t *)(prm_base + PLL_MOD + OMAP3_PRM_CLKSEL); 693 const uint32_t prm_clksel = *(volatile uint32_t *)(prm_base + PLL_MOD + OMAP3_PRM_CLKSEL);
692 static const uint32_t prm_clksel_freqs[] = OMAP3_PRM_CLKSEL_FREQS; 694 static const uint32_t prm_clksel_freqs[] = OMAP3_PRM_CLKSEL_FREQS;
693 const uint32_t sys_clk = prm_clksel_freqs[__SHIFTOUT(prm_clksel, OMAP3_PRM_CLKSEL_CLKIN)]; 695 const uint32_t sys_clk = prm_clksel_freqs[__SHIFTOUT(prm_clksel, OMAP3_PRM_CLKSEL_CLKIN)];
694 const vaddr_t cm_base = OMAP2_CM_BASE - OMAP_L4_CORE_BASE + OMAP_L4_CORE_VBASE; 696 const vaddr_t cm_base = OMAP2_CM_BASE - OMAP_L4_CORE_BASE + OMAP_L4_CORE_VBASE;
695 const uint32_t dpll1 = *(volatile uint32_t *)(cm_base + OMAP3_CM_CLKSEL1_PLL_MPU); 697 const uint32_t dpll1 = *(volatile uint32_t *)(cm_base + OMAP3_CM_CLKSEL1_PLL_MPU);
696 const uint32_t dpll2 = *(volatile uint32_t *)(cm_base + OMAP3_CM_CLKSEL2_PLL_MPU); 698 const uint32_t dpll2 = *(volatile uint32_t *)(cm_base + OMAP3_CM_CLKSEL2_PLL_MPU);
697 const uint32_t m = __SHIFTOUT(dpll1, OMAP3_CM_CLKSEL1_PLL_MPU_DPLL_MULT); 699 const uint32_t m = __SHIFTOUT(dpll1, OMAP3_CM_CLKSEL1_PLL_MPU_DPLL_MULT);
698 const uint32_t n = __SHIFTOUT(dpll1, OMAP3_CM_CLKSEL1_PLL_MPU_DPLL_DIV); 700 const uint32_t n = __SHIFTOUT(dpll1, OMAP3_CM_CLKSEL1_PLL_MPU_DPLL_DIV);
699 const uint32_t m2 = __SHIFTOUT(dpll2, OMAP3_CM_CLKSEL2_PLL_MPU_DPLL_CLKOUT_DIV); 701 const uint32_t m2 = __SHIFTOUT(dpll2, OMAP3_CM_CLKSEL2_PLL_MPU_DPLL_CLKOUT_DIV);
700 702
701 /* 703 /*
702 * MPU_CLK supplies ARM_FCLK which is twice the CPU frequency. 704 * MPU_CLK supplies ARM_FCLK which is twice the CPU frequency.
703 */ 705 */
704 curcpu()->ci_data.cpu_cc_freq = ((sys_clk * m) / ((n + 1) * m2 * 2)) * OMAP3_PRM_CLKSEL_MULT; 706 curcpu()->ci_data.cpu_cc_freq = ((sys_clk * m) / ((n + 1) * m2 * 2)) * OMAP3_PRM_CLKSEL_MULT;
705 omap_sys_clk = sys_clk * OMAP3_PRM_CLKSEL_MULT; 707 omap_sys_clk = sys_clk * OMAP3_PRM_CLKSEL_MULT;
706} 708}
707#endif /* OMAP_3430 || OMAP_3530 || TI_DM37XX */ 709#endif /* OMAP_3XXX || TI_DM37XX */
708 710
709#if defined(OMAP_4430) || defined(OMAP_5430) 711#if defined(OMAP_4XXX) || defined(OMAP_5XXX)
710void 712void
711omap4_cpu_clk(void) 713omap4_cpu_clk(void)
712{ 714{
713 const vaddr_t prm_base = OMAP2_PRM_BASE - OMAP_L4_CORE_BASE + OMAP_L4_CORE_VBASE; 715 const vaddr_t prm_base = OMAP2_PRM_BASE - OMAP_L4_CORE_BASE + OMAP_L4_CORE_VBASE;
714 const vaddr_t cm_base = OMAP2_CM_BASE - OMAP_L4_CORE_BASE + OMAP_L4_CORE_VBASE; 716 const vaddr_t cm_base = OMAP2_CM_BASE - OMAP_L4_CORE_BASE + OMAP_L4_CORE_VBASE;
715 static const uint32_t cm_clksel_freqs[] = OMAP4_CM_CLKSEL_FREQS; 717 static const uint32_t cm_clksel_freqs[] = OMAP4_CM_CLKSEL_FREQS;
716 const uint32_t prm_clksel = *(volatile uint32_t *)(prm_base + OMAP4_CM_SYS_CLKSEL); 718 const uint32_t prm_clksel = *(volatile uint32_t *)(prm_base + OMAP4_CM_SYS_CLKSEL);
717 const uint32_t sys_clk = cm_clksel_freqs[__SHIFTOUT(prm_clksel, OMAP4_CM_SYS_CLKSEL_CLKIN)]; 719 const uint32_t sys_clk = cm_clksel_freqs[__SHIFTOUT(prm_clksel, OMAP4_CM_SYS_CLKSEL_CLKIN)];
718 const uint32_t dpll1 = *(volatile uint32_t *)(cm_base + OMAP4_CM_CLKSEL_DPLL_MPU); 720 const uint32_t dpll1 = *(volatile uint32_t *)(cm_base + OMAP4_CM_CLKSEL_DPLL_MPU);
719 const uint32_t dpll2 = *(volatile uint32_t *)(cm_base + OMAP4_CM_DIV_M2_DPLL_MPU); 721 const uint32_t dpll2 = *(volatile uint32_t *)(cm_base + OMAP4_CM_DIV_M2_DPLL_MPU);
720 const uint32_t m = __SHIFTOUT(dpll1, OMAP4_CM_CLKSEL_DPLL_MPU_DPLL_MULT); 722 const uint32_t m = __SHIFTOUT(dpll1, OMAP4_CM_CLKSEL_DPLL_MPU_DPLL_MULT);
721 const uint32_t n = __SHIFTOUT(dpll1, OMAP4_CM_CLKSEL_DPLL_MPU_DPLL_DIV); 723 const uint32_t n = __SHIFTOUT(dpll1, OMAP4_CM_CLKSEL_DPLL_MPU_DPLL_DIV);
722 const uint32_t m2 = __SHIFTOUT(dpll2, OMAP4_CM_DIV_M2_DPLL_MPU_DPLL_CLKOUT_DIV); 724 const uint32_t m2 = __SHIFTOUT(dpll2, OMAP4_CM_DIV_M2_DPLL_MPU_DPLL_CLKOUT_DIV);
723 725
724 /* 726 /*
725 * MPU_CLK supplies ARM_FCLK which is twice the CPU frequency. 727 * MPU_CLK supplies ARM_FCLK which is twice the CPU frequency.
726 */ 728 */
727 curcpu()->ci_data.cpu_cc_freq = ((sys_clk * 2 * m) / ((n + 1) * m2)) * OMAP4_CM_CLKSEL_MULT / 2; 729 curcpu()->ci_data.cpu_cc_freq = ((sys_clk * 2 * m) / ((n + 1) * m2)) * OMAP4_CM_CLKSEL_MULT / 2;
728 omap_sys_clk = sys_clk * OMAP4_CM_CLKSEL_MULT; 730 omap_sys_clk = sys_clk * OMAP4_CM_CLKSEL_MULT;
729 printf("%s: %"PRIu64": sys_clk=%u m=%u n=%u (%u) m2=%u mult=%u\n", 731 printf("%s: %"PRIu64": sys_clk=%u m=%u n=%u (%u) m2=%u mult=%u\n",
730 __func__, curcpu()->ci_data.cpu_cc_freq, 732 __func__, curcpu()->ci_data.cpu_cc_freq,
731 sys_clk, m, n, n+1, m2, OMAP4_CM_CLKSEL_MULT); 733 sys_clk, m, n, n+1, m2, OMAP4_CM_CLKSEL_MULT);
732} 734}
733#endif /* OMAP_4430 || OMAP_5430 */ 735#endif /* OMAP_4XXX || OMAP_5XXX */
734 736
735#if defined(TI_AM335X) 737#if defined(TI_AM335X)
736void 738void
737am335x_cpu_clk(void) 739am335x_cpu_clk(void)
738{ 740{
739 static const uint32_t sys_clks[4] = { 741 static const uint32_t sys_clks[4] = {
740 [0] = 19200000, [1] = 24000000, [2] = 25000000, [3] = 26000000 742 [0] = 19200000, [1] = 24000000, [2] = 25000000, [3] = 26000000
741 }; 743 };
742 const vaddr_t cm_base = OMAP2_CM_BASE - OMAP_L4_CORE_BASE + OMAP_L4_CORE_VBASE; 744 const vaddr_t cm_base = OMAP2_CM_BASE - OMAP_L4_CORE_BASE + OMAP_L4_CORE_VBASE;
743 const vaddr_t cm_wkup_base = cm_base + AM335X_PRCM_CM_WKUP; 745 const vaddr_t cm_wkup_base = cm_base + AM335X_PRCM_CM_WKUP;
744 const vaddr_t ctlmod_base = TI_AM335X_CTLMOD_BASE - OMAP_L4_CORE_BASE + OMAP_L4_CORE_VBASE; 746 const vaddr_t ctlmod_base = TI_AM335X_CTLMOD_BASE - OMAP_L4_CORE_BASE + OMAP_L4_CORE_VBASE;
745 const uint32_t control_status = *(const volatile uint32_t *)(ctlmod_base + CTLMOD_CONTROL_STATUS); 747 const uint32_t control_status = *(const volatile uint32_t *)(ctlmod_base + CTLMOD_CONTROL_STATUS);
746 const uint32_t sys_clk = sys_clks[__SHIFTOUT(control_status, CTLMOD_CONTROL_STATUS_SYSBOOT1)]; 748 const uint32_t sys_clk = sys_clks[__SHIFTOUT(control_status, CTLMOD_CONTROL_STATUS_SYSBOOT1)];
@@ -748,27 +750,27 @@ am335x_cpu_clk(void) @@ -748,27 +750,27 @@ am335x_cpu_clk(void)
748 const uint32_t div_m2_dpll_mpu = *(volatile uint32_t *)(cm_wkup_base + TI_AM335X_CM_DIV_M2_DPLL_MPU); 750 const uint32_t div_m2_dpll_mpu = *(volatile uint32_t *)(cm_wkup_base + TI_AM335X_CM_DIV_M2_DPLL_MPU);
749 const uint32_t m = __SHIFTOUT(clksel_dpll_mpu, TI_AM335X_CM_CLKSEL_DPLL_MPU_DPLL_MULT); 751 const uint32_t m = __SHIFTOUT(clksel_dpll_mpu, TI_AM335X_CM_CLKSEL_DPLL_MPU_DPLL_MULT);
750 const uint32_t n = __SHIFTOUT(clksel_dpll_mpu, TI_AM335X_CM_CLKSEL_DPLL_MPU_DPLL_DIV); 752 const uint32_t n = __SHIFTOUT(clksel_dpll_mpu, TI_AM335X_CM_CLKSEL_DPLL_MPU_DPLL_DIV);
751 const uint32_t m2 = __SHIFTOUT(div_m2_dpll_mpu, TI_AM335X_CM_DIV_M2_DPLL_MPU_DPLL_CLKOUT_DIV); 753 const uint32_t m2 = __SHIFTOUT(div_m2_dpll_mpu, TI_AM335X_CM_DIV_M2_DPLL_MPU_DPLL_CLKOUT_DIV);
752 /* XXX This ignores CM_CLKSEL_DPLL_MPU[DPLL_REGM4XEN]. */ 754 /* XXX This ignores CM_CLKSEL_DPLL_MPU[DPLL_REGM4XEN]. */
753 curcpu()->ci_data.cpu_cc_freq = ((m * (sys_clk / (n + 1))) / m2); 755 curcpu()->ci_data.cpu_cc_freq = ((m * (sys_clk / (n + 1))) / m2);
754 printf("%s: %"PRIu64": sys_clk=%u m=%u n=%u (%u) m2=%u\n", 756 printf("%s: %"PRIu64": sys_clk=%u m=%u n=%u (%u) m2=%u\n",
755 __func__, curcpu()->ci_data.cpu_cc_freq, 757 __func__, curcpu()->ci_data.cpu_cc_freq,
756 sys_clk, m, n, n+1, m2); 758 sys_clk, m, n, n+1, m2);
757 omap_sys_clk = sys_clk; 759 omap_sys_clk = sys_clk;
758} 760}
759#endif /* TI_AM335X */ 761#endif /* TI_AM335X */
760 762
761#if defined(OMAP_4430) || defined(OMAP_5430) || defined(TI_AM335X) 763#if defined(OMAP_4XXX) || defined(OMAP_5XXX) || defined(TI_AM335X)
762static inline uint32_t 764static inline uint32_t
763emif_read_sdram_config(vaddr_t emif_base) 765emif_read_sdram_config(vaddr_t emif_base)
764{ 766{
765 return *(const volatile uint32_t *)(emif_base + EMIF_SDRAM_CONFIG); 767 return *(const volatile uint32_t *)(emif_base + EMIF_SDRAM_CONFIG);
766} 768}
767 769
768static psize_t  770static psize_t
769emif_memprobe(void) 771emif_memprobe(void)
770{ 772{
771 uint32_t sdram_config = emif_read_sdram_config(OMAP_EMIF1_VBASE); 773 uint32_t sdram_config = emif_read_sdram_config(OMAP_EMIF1_VBASE);
772 psize_t memsize = 1L; 774 psize_t memsize = 1L;
773#if defined(TI_AM335X) 775#if defined(TI_AM335X)
774 /* 776 /*
@@ -795,31 +797,31 @@ emif_memprobe(void) @@ -795,31 +797,31 @@ emif_memprobe(void)
795 const u_int width = 2 - __SHIFTOUT(sdram_config, SDRAM_CONFIG_WIDTH); 797 const u_int width = 2 - __SHIFTOUT(sdram_config, SDRAM_CONFIG_WIDTH);
796#ifdef TI_AM335X 798#ifdef TI_AM335X
797 KASSERT(ebank == 0); // No chip selects on Sitara 799 KASSERT(ebank == 0); // No chip selects on Sitara
798#endif 800#endif
799 memsize <<= (ebank + ibank + rsize + pagesize + width); 801 memsize <<= (ebank + ibank + rsize + pagesize + width);
800#ifdef VERBOSE_INIT_ARM 802#ifdef VERBOSE_INIT_ARM
801 printf("sdram_config = %#x, memsize = %uMB\n", sdram_config, 803 printf("sdram_config = %#x, memsize = %uMB\n", sdram_config,
802 (u_int)(memsize >> 20)); 804 (u_int)(memsize >> 20));
803#endif 805#endif
804 return memsize; 806 return memsize;
805} 807}
806#endif 808#endif
807 809
808#if defined(OMAP_3430) || defined(OMAP_3530) 810#if defined(OMAP_3XXX)
809#define SDRC_MCFG(p) (0x80 + (0x30 * (p))) 811#define SDRC_MCFG(p) (0x80 + (0x30 * (p)))
810#define SDRC_MCFG_MEMSIZE(m) ((((m) & __BITS(8,17)) >> 8) * 2) 812#define SDRC_MCFG_MEMSIZE(m) ((((m) & __BITS(8,17)) >> 8) * 2)
811static psize_t  813static psize_t
812omap3530_memprobe(void) 814omap3_memprobe(void)
813{ 815{
814 const vaddr_t gpmc_base = OMAP_SDRC_VBASE; 816 const vaddr_t gpmc_base = OMAP_SDRC_VBASE;
815 const uint32_t mcfg0 = *(volatile uint32_t *)(gpmc_base + SDRC_MCFG(0)); 817 const uint32_t mcfg0 = *(volatile uint32_t *)(gpmc_base + SDRC_MCFG(0));
816 const uint32_t mcfg1 = *(volatile uint32_t *)(gpmc_base + SDRC_MCFG(1)); 818 const uint32_t mcfg1 = *(volatile uint32_t *)(gpmc_base + SDRC_MCFG(1));
817 819
818 printf("mcfg0 = %#x, size %lld\n", mcfg0, SDRC_MCFG_MEMSIZE(mcfg0)); 820 printf("mcfg0 = %#x, size %lld\n", mcfg0, SDRC_MCFG_MEMSIZE(mcfg0));
819 printf("mcfg1 = %#x, size %lld\n", mcfg1, SDRC_MCFG_MEMSIZE(mcfg1)); 821 printf("mcfg1 = %#x, size %lld\n", mcfg1, SDRC_MCFG_MEMSIZE(mcfg1));
820 822
821 return (SDRC_MCFG_MEMSIZE(mcfg0) + SDRC_MCFG_MEMSIZE(mcfg1)) * 1024 * 1024; 823 return (SDRC_MCFG_MEMSIZE(mcfg0) + SDRC_MCFG_MEMSIZE(mcfg1)) * 1024 * 1024;
822} 824}
823#endif 825#endif
824 826
825/* 827/*
@@ -883,37 +885,60 @@ beagle_device_register(device_t self, vo @@ -883,37 +885,60 @@ beagle_device_register(device_t self, vo
883 if (device_is_a(self, "a9tmr") || device_is_a(self, "a9wdt")) { 885 if (device_is_a(self, "a9tmr") || device_is_a(self, "a9wdt")) {
884 /* 886 /*
885 * This clock always runs at (arm_clk div 2) and only goes 887 * This clock always runs at (arm_clk div 2) and only goes
886 * to timers that are part of the A9 MP core subsystem. 888 * to timers that are part of the A9 MP core subsystem.
887 */ 889 */
888 prop_dictionary_set_uint32(dict, "frequency", 890 prop_dictionary_set_uint32(dict, "frequency",
889 curcpu()->ci_data.cpu_cc_freq / 2); 891 curcpu()->ci_data.cpu_cc_freq / 2);
890 return; 892 return;
891 }  893 }
892 894
893 if (device_is_a(self, "ehci")) { 895 if (device_is_a(self, "ehci")) {
894#if defined(OMAP_3530) 896#if defined(OMAP_3530)
895 /* XXX Beagleboard specific port configuration */ 897 /* XXX Beagleboard specific port configuration */
 898 prop_dictionary_set_uint16(dict, "nports", 3);
896 prop_dictionary_set_cstring(dict, "port0-mode", "none"); 899 prop_dictionary_set_cstring(dict, "port0-mode", "none");
897 prop_dictionary_set_cstring(dict, "port1-mode", "phy"); 900 prop_dictionary_set_cstring(dict, "port1-mode", "phy");
898 prop_dictionary_set_cstring(dict, "port2-mode", "none"); 901 prop_dictionary_set_cstring(dict, "port2-mode", "none");
899 prop_dictionary_set_bool(dict, "phy-reset", true); 902 prop_dictionary_set_bool(dict, "phy-reset", true);
900 prop_dictionary_set_int16(dict, "port0-gpio", -1); 903 prop_dictionary_set_int16(dict, "port0-gpio", -1);
901 prop_dictionary_set_int16(dict, "port1-gpio", 147); 904 prop_dictionary_set_int16(dict, "port1-gpio", 147);
 905 prop_dictionary_set_bool(dict, "port1-gpioval", true);
902 prop_dictionary_set_int16(dict, "port2-gpio", -1); 906 prop_dictionary_set_int16(dict, "port2-gpio", -1);
903 prop_dictionary_set_uint16(dict, "dpll5-m", 443); 907 prop_dictionary_set_uint16(dict, "dpll5-m", 443);
904 prop_dictionary_set_uint16(dict, "dpll5-n", 11); 908 prop_dictionary_set_uint16(dict, "dpll5-n", 11);
905 prop_dictionary_set_uint16(dict, "dpll5-m2", 4); 909 prop_dictionary_set_uint16(dict, "dpll5-m2", 4);
906#endif 910#endif
 911#if defined(OMAP_4430)
 912 prop_dictionary_set_uint16(dict, "nports", 2);
 913#if 0
 914 prop_dictionary_set_bool(dict, "phy-reset", true);
 915#else
 916 prop_dictionary_set_bool(dict, "phy-reset", false);
 917#endif
 918 prop_dictionary_set_cstring(dict, "port0-mode", "none");
 919 prop_dictionary_set_int16(dict, "port0-gpio", -1);
 920#if 0
 921 prop_dictionary_set_cstring(dict, "port1-mode", "phy");
 922#else
 923 prop_dictionary_set_cstring(dict, "port1-mode", "none");
 924#endif
 925 prop_dictionary_set_int16(dict, "port1-gpio", 62);
 926 prop_dictionary_set_bool(dict, "port1-gpioval", true);
 927#if 0
 928 omap2_gpio_ctl(1, GPIO_PIN_OUTPUT);
 929 omap2_gpio_write(1, 1); // Enable Hub
 930#endif
 931#endif
907 return; 932 return;
908 } 933 }
909 934
910 if (device_is_a(self, "sdhc")) { 935 if (device_is_a(self, "sdhc")) {
911#if defined(OMAP_3430) || defined(OMAP_3530) 936#if defined(OMAP_3430) || defined(OMAP_3530)
912 prop_dictionary_set_uint32(dict, "clkmask", 0); 937 prop_dictionary_set_uint32(dict, "clkmask", 0);
913 prop_dictionary_set_bool(dict, "8bit", true); 938 prop_dictionary_set_bool(dict, "8bit", true);
914#endif 939#endif
915 return; 940 return;
916 } 941 }
917 942
918 if (device_is_a(self, "omapfb")) { 943 if (device_is_a(self, "omapfb")) {
919 if (beagle_read_edid(beagle_edid, sizeof(beagle_edid))) { 944 if (beagle_read_edid(beagle_edid, sizeof(beagle_edid))) {