| @@ -1,957 +1,960 @@ | | | @@ -1,957 +1,960 @@ |
1 | /* $NetBSD: beagle_machdep.c,v 1.47 2013/06/18 15:37:16 matt Exp $ */ | | 1 | /* $NetBSD: beagle_machdep.c,v 1.48 2013/06/18 23:40:38 matt Exp $ */ |
2 | | | 2 | |
3 | /* | | 3 | /* |
4 | * Machine dependent functions for kernel setup for TI OSK5912 board. | | 4 | * Machine dependent functions for kernel setup for TI OSK5912 board. |
5 | * Based on lubbock_machdep.c which in turn was based on iq80310_machhdep.c | | 5 | * Based on lubbock_machdep.c which in turn was based on iq80310_machhdep.c |
6 | * | | 6 | * |
7 | * Copyright (c) 2002, 2003, 2005 Genetec Corporation. All rights reserved. | | 7 | * Copyright (c) 2002, 2003, 2005 Genetec Corporation. All rights reserved. |
8 | * Written by Hiroyuki Bessho for Genetec Corporation. | | 8 | * Written by Hiroyuki Bessho for Genetec Corporation. |
9 | * | | 9 | * |
10 | * Redistribution and use in source and binary forms, with or without | | 10 | * Redistribution and use in source and binary forms, with or without |
11 | * modification, are permitted provided that the following conditions | | 11 | * modification, are permitted provided that the following conditions |
12 | * are met: | | 12 | * are met: |
13 | * 1. Redistributions of source code must retain the above copyright | | 13 | * 1. Redistributions of source code must retain the above copyright |
14 | * notice, this list of conditions and the following disclaimer. | | 14 | * notice, this list of conditions and the following disclaimer. |
15 | * 2. Redistributions in binary form must reproduce the above copyright | | 15 | * 2. Redistributions in binary form must reproduce the above copyright |
16 | * notice, this list of conditions and the following disclaimer in the | | 16 | * notice, this list of conditions and the following disclaimer in the |
17 | * documentation and/or other materials provided with the distribution. | | 17 | * documentation and/or other materials provided with the distribution. |
18 | * 3. The name of Genetec Corporation may not be used to endorse or | | 18 | * 3. The name of Genetec Corporation may not be used to endorse or |
19 | * promote products derived from this software without specific prior | | 19 | * promote products derived from this software without specific prior |
20 | * written permission. | | 20 | * written permission. |
21 | * | | 21 | * |
22 | * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND | | 22 | * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND |
23 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED | | 23 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED |
24 | * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR | | 24 | * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR |
25 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION | | 25 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION |
26 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR | | 26 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
27 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF | | 27 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
28 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS | | 28 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
29 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN | | 29 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
30 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) | | 30 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
31 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE | | 31 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
32 | * POSSIBILITY OF SUCH DAMAGE. | | 32 | * POSSIBILITY OF SUCH DAMAGE. |
33 | * | | 33 | * |
34 | * Copyright (c) 2001 Wasabi Systems, Inc. | | 34 | * Copyright (c) 2001 Wasabi Systems, Inc. |
35 | * All rights reserved. | | 35 | * All rights reserved. |
36 | * | | 36 | * |
37 | * Written by Jason R. Thorpe for Wasabi Systems, Inc. | | 37 | * Written by Jason R. Thorpe for Wasabi Systems, Inc. |
38 | * | | 38 | * |
39 | * Redistribution and use in source and binary forms, with or without | | 39 | * Redistribution and use in source and binary forms, with or without |
40 | * modification, are permitted provided that the following conditions | | 40 | * modification, are permitted provided that the following conditions |
41 | * are met: | | 41 | * are met: |
42 | * 1. Redistributions of source code must retain the above copyright | | 42 | * 1. Redistributions of source code must retain the above copyright |
43 | * notice, this list of conditions and the following disclaimer. | | 43 | * notice, this list of conditions and the following disclaimer. |
44 | * 2. Redistributions in binary form must reproduce the above copyright | | 44 | * 2. Redistributions in binary form must reproduce the above copyright |
45 | * notice, this list of conditions and the following disclaimer in the | | 45 | * notice, this list of conditions and the following disclaimer in the |
46 | * documentation and/or other materials provided with the distribution. | | 46 | * documentation and/or other materials provided with the distribution. |
47 | * 3. All advertising materials mentioning features or use of this software | | 47 | * 3. All advertising materials mentioning features or use of this software |
48 | * must display the following acknowledgement: | | 48 | * must display the following acknowledgement: |
49 | * This product includes software developed for the NetBSD Project by | | 49 | * This product includes software developed for the NetBSD Project by |
50 | * Wasabi Systems, Inc. | | 50 | * Wasabi Systems, Inc. |
51 | * 4. The name of Wasabi Systems, Inc. may not be used to endorse | | 51 | * 4. The name of Wasabi Systems, Inc. may not be used to endorse |
52 | * or promote products derived from this software without specific prior | | 52 | * or promote products derived from this software without specific prior |
53 | * written permission. | | 53 | * written permission. |
54 | * | | 54 | * |
55 | * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND | | 55 | * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND |
56 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED | | 56 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED |
57 | * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR | | 57 | * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR |
58 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC | | 58 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC |
59 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR | | 59 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
60 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF | | 60 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
61 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS | | 61 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
62 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN | | 62 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
63 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) | | 63 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
64 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE | | 64 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
65 | * POSSIBILITY OF SUCH DAMAGE. | | 65 | * POSSIBILITY OF SUCH DAMAGE. |
66 | * | | 66 | * |
67 | * Copyright (c) 1997,1998 Mark Brinicombe. | | 67 | * Copyright (c) 1997,1998 Mark Brinicombe. |
68 | * Copyright (c) 1997,1998 Causality Limited. | | 68 | * Copyright (c) 1997,1998 Causality Limited. |
69 | * All rights reserved. | | 69 | * All rights reserved. |
70 | * | | 70 | * |
71 | * Redistribution and use in source and binary forms, with or without | | 71 | * Redistribution and use in source and binary forms, with or without |
72 | * modification, are permitted provided that the following conditions | | 72 | * modification, are permitted provided that the following conditions |
73 | * are met: | | 73 | * are met: |
74 | * 1. Redistributions of source code must retain the above copyright | | 74 | * 1. Redistributions of source code must retain the above copyright |
75 | * notice, this list of conditions and the following disclaimer. | | 75 | * notice, this list of conditions and the following disclaimer. |
76 | * 2. Redistributions in binary form must reproduce the above copyright | | 76 | * 2. Redistributions in binary form must reproduce the above copyright |
77 | * notice, this list of conditions and the following disclaimer in the | | 77 | * notice, this list of conditions and the following disclaimer in the |
78 | * documentation and/or other materials provided with the distribution. | | 78 | * documentation and/or other materials provided with the distribution. |
79 | * 3. All advertising materials mentioning features or use of this software | | 79 | * 3. All advertising materials mentioning features or use of this software |
80 | * must display the following acknowledgement: | | 80 | * must display the following acknowledgement: |
81 | * This product includes software developed by Mark Brinicombe | | 81 | * This product includes software developed by Mark Brinicombe |
82 | * for the NetBSD Project. | | 82 | * for the NetBSD Project. |
83 | * 4. The name of the company nor the name of the author may be used to | | 83 | * 4. The name of the company nor the name of the author may be used to |
84 | * endorse or promote products derived from this software without specific | | 84 | * endorse or promote products derived from this software without specific |
85 | * prior written permission. | | 85 | * prior written permission. |
86 | * | | 86 | * |
87 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED | | 87 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED |
88 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF | | 88 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
89 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. | | 89 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
90 | * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, | | 90 | * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, |
91 | * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES | | 91 | * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
92 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR | | 92 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
93 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) | | 93 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
94 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT | | 94 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
95 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY | | 95 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
96 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF | | 96 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
97 | * SUCH DAMAGE. | | 97 | * SUCH DAMAGE. |
98 | * | | 98 | * |
99 | * Copyright (c) 2007 Microsoft | | 99 | * Copyright (c) 2007 Microsoft |
100 | * All rights reserved. | | 100 | * All rights reserved. |
101 | * | | 101 | * |
102 | * Redistribution and use in source and binary forms, with or without | | 102 | * Redistribution and use in source and binary forms, with or without |
103 | * modification, are permitted provided that the following conditions | | 103 | * modification, are permitted provided that the following conditions |
104 | * are met: | | 104 | * are met: |
105 | * 1. Redistributions of source code must retain the above copyright | | 105 | * 1. Redistributions of source code must retain the above copyright |
106 | * notice, this list of conditions and the following disclaimer. | | 106 | * notice, this list of conditions and the following disclaimer. |
107 | * 2. Redistributions in binary form must reproduce the above copyright | | 107 | * 2. Redistributions in binary form must reproduce the above copyright |
108 | * notice, this list of conditions and the following disclaimer in the | | 108 | * notice, this list of conditions and the following disclaimer in the |
109 | * documentation and/or other materials provided with the distribution. | | 109 | * documentation and/or other materials provided with the distribution. |
110 | * 3. All advertising materials mentioning features or use of this software | | 110 | * 3. All advertising materials mentioning features or use of this software |
111 | * must display the following acknowledgement: | | 111 | * must display the following acknowledgement: |
112 | * This product includes software developed by Microsoft | | 112 | * This product includes software developed by Microsoft |
113 | * | | 113 | * |
114 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED | | 114 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED |
115 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF | | 115 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
116 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. | | 116 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
117 | * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTERS BE LIABLE FOR ANY DIRECT, | | 117 | * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTERS BE LIABLE FOR ANY DIRECT, |
118 | * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES | | 118 | * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
119 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR | | 119 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
120 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) | | 120 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
121 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT | | 121 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
122 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY | | 122 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
123 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF | | 123 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
124 | * SUCH DAMAGE. | | 124 | * SUCH DAMAGE. |
125 | */ | | 125 | */ |
126 | | | 126 | |
127 | #include <sys/cdefs.h> | | 127 | #include <sys/cdefs.h> |
128 | __KERNEL_RCSID(0, "$NetBSD: beagle_machdep.c,v 1.47 2013/06/18 15:37:16 matt Exp $"); | | 128 | __KERNEL_RCSID(0, "$NetBSD: beagle_machdep.c,v 1.48 2013/06/18 23:40:38 matt Exp $"); |
129 | | | 129 | |
130 | #include "opt_machdep.h" | | 130 | #include "opt_machdep.h" |
131 | #include "opt_ddb.h" | | 131 | #include "opt_ddb.h" |
132 | #include "opt_kgdb.h" | | 132 | #include "opt_kgdb.h" |
133 | #include "opt_ipkdb.h" | | 133 | #include "opt_ipkdb.h" |
134 | #include "opt_md.h" | | 134 | #include "opt_md.h" |
135 | #include "opt_com.h" | | 135 | #include "opt_com.h" |
136 | #include "opt_omap.h" | | 136 | #include "opt_omap.h" |
137 | #include "prcm.h" | | 137 | #include "prcm.h" |
138 | #include "com.h" | | 138 | #include "com.h" |
139 | | | 139 | |
140 | #include <sys/param.h> | | 140 | #include <sys/param.h> |
141 | #include <sys/systm.h> | | 141 | #include <sys/systm.h> |
142 | #include <sys/bus.h> | | 142 | #include <sys/bus.h> |
143 | #include <sys/cpu.h> | | 143 | #include <sys/cpu.h> |
144 | #include <sys/device.h> | | 144 | #include <sys/device.h> |
145 | #include <sys/exec.h> | | 145 | #include <sys/exec.h> |
146 | #include <sys/kernel.h> | | 146 | #include <sys/kernel.h> |
147 | #include <sys/ksyms.h> | | 147 | #include <sys/ksyms.h> |
148 | #include <sys/msgbuf.h> | | 148 | #include <sys/msgbuf.h> |
149 | #include <sys/proc.h> | | 149 | #include <sys/proc.h> |
150 | #include <sys/reboot.h> | | 150 | #include <sys/reboot.h> |
151 | #include <sys/termios.h> | | 151 | #include <sys/termios.h> |
152 | #include <sys/gpio.h> | | 152 | #include <sys/gpio.h> |
153 | | | 153 | |
154 | #include <uvm/uvm_extern.h> | | 154 | #include <uvm/uvm_extern.h> |
155 | | | 155 | |
156 | #include <sys/conf.h> | | 156 | #include <sys/conf.h> |
157 | #include <dev/cons.h> | | 157 | #include <dev/cons.h> |
158 | #include <dev/md.h> | | 158 | #include <dev/md.h> |
159 | | | 159 | |
160 | #include <machine/db_machdep.h> | | 160 | #include <machine/db_machdep.h> |
161 | #include <ddb/db_sym.h> | | 161 | #include <ddb/db_sym.h> |
162 | #include <ddb/db_extern.h> | | 162 | #include <ddb/db_extern.h> |
163 | #ifdef KGDB | | 163 | #ifdef KGDB |
164 | #include <sys/kgdb.h> | | 164 | #include <sys/kgdb.h> |
165 | #endif | | 165 | #endif |
166 | | | 166 | |
167 | #include <machine/bootconfig.h> | | 167 | #include <machine/bootconfig.h> |
168 | #include <arm/armreg.h> | | 168 | #include <arm/armreg.h> |
169 | #include <arm/undefined.h> | | 169 | #include <arm/undefined.h> |
170 | | | 170 | |
171 | #include <arm/arm32/machdep.h> | | 171 | #include <arm/arm32/machdep.h> |
172 | #include <arm/mainbus/mainbus.h> | | 172 | #include <arm/mainbus/mainbus.h> |
173 | | | 173 | |
174 | #include <dev/ic/ns16550reg.h> | | 174 | #include <dev/ic/ns16550reg.h> |
175 | #include <dev/ic/comreg.h> | | 175 | #include <dev/ic/comreg.h> |
176 | | | 176 | |
177 | #include <arm/omap/omap_com.h> | | 177 | #include <arm/omap/omap_com.h> |
178 | #include <arm/omap/omap_var.h> | | 178 | #include <arm/omap/omap_var.h> |
179 | #include <arm/omap/omap_wdtvar.h> | | 179 | #include <arm/omap/omap_wdtvar.h> |
180 | #include <arm/omap/omap2_prcm.h> | | 180 | #include <arm/omap/omap2_prcm.h> |
181 | #include <arm/omap/omap2_gpio.h> | | 181 | #include <arm/omap/omap2_gpio.h> |
182 | #ifdef TI_AM335X | | 182 | #ifdef TI_AM335X |
183 | # include <arm/omap/am335x_prcm.h> | | 183 | # include <arm/omap/am335x_prcm.h> |
184 | #endif | | 184 | #endif |
185 | | | 185 | |
186 | #ifdef CPU_CORTEXA9 | | 186 | #ifdef CPU_CORTEXA9 |
187 | #include <arm/cortex/pl310_reg.h> | | 187 | #include <arm/cortex/pl310_reg.h> |
188 | #include <arm/cortex/pl310_var.h> | | 188 | #include <arm/cortex/pl310_var.h> |
189 | #endif | | 189 | #endif |
190 | | | 190 | |
191 | #include <evbarm/include/autoconf.h> | | 191 | #include <evbarm/include/autoconf.h> |
192 | #include <evbarm/beagle/beagle.h> | | 192 | #include <evbarm/beagle/beagle.h> |
193 | | | 193 | |
194 | #include <dev/i2c/i2cvar.h> | | 194 | #include <dev/i2c/i2cvar.h> |
195 | #include <dev/i2c/ddcreg.h> | | 195 | #include <dev/i2c/ddcreg.h> |
196 | | | 196 | |
197 | #include "prcm.h" | | 197 | #include "prcm.h" |
198 | #include "omapwdt32k.h" | | 198 | #include "omapwdt32k.h" |
199 | #include "ukbd.h" | | 199 | #include "ukbd.h" |
200 | #include <dev/usb/ukbdvar.h> | | 200 | #include <dev/usb/ukbdvar.h> |
201 | | | 201 | |
202 | BootConfig bootconfig; /* Boot config storage */ | | 202 | BootConfig bootconfig; /* Boot config storage */ |
203 | static char bootargs[MAX_BOOT_STRING]; | | 203 | static char bootargs[MAX_BOOT_STRING]; |
204 | char *boot_args = NULL; | | 204 | char *boot_args = NULL; |
205 | char *boot_file = NULL; | | 205 | char *boot_file = NULL; |
206 | | | 206 | |
207 | static uint8_t beagle_edid[128]; /* EDID storage */ | | 207 | static uint8_t beagle_edid[128]; /* EDID storage */ |
208 | | | 208 | |
209 | u_int uboot_args[4] = { 0 }; /* filled in by beagle_start.S (not in bss) */ | | 209 | u_int uboot_args[4] = { 0 }; /* filled in by beagle_start.S (not in bss) */ |
210 | | | 210 | |
211 | /* Same things, but for the free (unused by the kernel) memory. */ | | 211 | /* Same things, but for the free (unused by the kernel) memory. */ |
212 | | | 212 | |
213 | extern char KERNEL_BASE_phys[]; | | 213 | extern char KERNEL_BASE_phys[]; |
214 | extern char _end[]; | | 214 | extern char _end[]; |
215 | | | 215 | |
216 | #if NCOM > 0 | | 216 | #if NCOM > 0 |
217 | int use_fb_console = false; | | 217 | int use_fb_console = false; |
218 | #else | | 218 | #else |
219 | int use_fb_console = true; | | 219 | int use_fb_console = true; |
220 | #endif | | 220 | #endif |
221 | | | 221 | |
222 | /* | | 222 | /* |
223 | * Macros to translate between physical and virtual for a subset of the | | 223 | * Macros to translate between physical and virtual for a subset of the |
224 | * kernel address space. *Not* for general use. | | 224 | * kernel address space. *Not* for general use. |
225 | */ | | 225 | */ |
226 | #define KERNEL_BASE_PHYS ((paddr_t)KERNEL_BASE_phys) | | 226 | #define KERNEL_BASE_PHYS ((paddr_t)KERNEL_BASE_phys) |
227 | | | 227 | |
228 | /* Prototypes */ | | 228 | /* Prototypes */ |
229 | | | 229 | |
230 | void consinit(void); | | 230 | void consinit(void); |
231 | #ifdef KGDB | | 231 | #ifdef KGDB |
232 | static void kgdb_port_init(void); | | 232 | static void kgdb_port_init(void); |
233 | #endif | | 233 | #endif |
234 | | | 234 | |
235 | static void init_clocks(void); | | 235 | static void init_clocks(void); |
236 | static void beagle_device_register(device_t, void *); | | 236 | static void beagle_device_register(device_t, void *); |
237 | static void beagle_reset(void); | | 237 | static void beagle_reset(void); |
238 | #if defined(OMAP_3XXX) || defined(TI_DM37XX) | | 238 | #if defined(OMAP_3XXX) || defined(TI_DM37XX) |
239 | static void omap3_cpu_clk(void); | | 239 | static void omap3_cpu_clk(void); |
240 | #endif | | 240 | #endif |
241 | #if defined(OMAP_4XXX) || defined(OMAP_5XXX) | | 241 | #if defined(OMAP_4XXX) || defined(OMAP_5XXX) |
242 | static void omap4_cpu_clk(void); | | 242 | static void omap4_cpu_clk(void); |
243 | #endif | | 243 | #endif |
244 | #if defined(TI_AM335X) | | 244 | #if defined(TI_AM335X) |
245 | static void am335x_cpu_clk(void); | | 245 | static void am335x_cpu_clk(void); |
246 | #endif | | 246 | #endif |
247 | #if defined(OMAP_4XXX) || defined(OMAP_5XXX) || defined(TI_AM335X) | | 247 | #if defined(OMAP_4XXX) || defined(OMAP_5XXX) || defined(TI_AM335X) |
248 | static psize_t emif_memprobe(void); | | 248 | static psize_t emif_memprobe(void); |
249 | #endif | | 249 | #endif |
250 | | | 250 | |
251 | #if defined(OMAP_3XXX) | | 251 | #if defined(OMAP_3XXX) |
252 | static psize_t omap3_memprobe(void); | | 252 | static psize_t omap3_memprobe(void); |
253 | #endif | | 253 | #endif |
254 | | | 254 | |
255 | bs_protos(bs_notimpl); | | 255 | bs_protos(bs_notimpl); |
256 | | | 256 | |
257 | #if NCOM > 0 | | 257 | #if NCOM > 0 |
258 | #include <dev/ic/comreg.h> | | 258 | #include <dev/ic/comreg.h> |
259 | #include <dev/ic/comvar.h> | | 259 | #include <dev/ic/comvar.h> |
260 | #endif | | 260 | #endif |
261 | | | 261 | |
262 | /* | | 262 | /* |
263 | * Static device mappings. These peripheral registers are mapped at | | 263 | * Static device mappings. These peripheral registers are mapped at |
264 | * fixed virtual addresses very early in initarm() so that we can use | | 264 | * fixed virtual addresses very early in initarm() so that we can use |
265 | * them while booting the kernel, and stay at the same address | | 265 | * them while booting the kernel, and stay at the same address |
266 | * throughout whole kernel's life time. | | 266 | * throughout whole kernel's life time. |
267 | * | | 267 | * |
268 | * We use this table twice; once with bootstrap page table, and once | | 268 | * We use this table twice; once with bootstrap page table, and once |
269 | * with kernel's page table which we build up in initarm(). | | 269 | * with kernel's page table which we build up in initarm(). |
270 | * | | 270 | * |
271 | * Since we map these registers into the bootstrap page table using | | 271 | * Since we map these registers into the bootstrap page table using |
272 | * pmap_devmap_bootstrap() which calls pmap_map_chunk(), we map | | 272 | * pmap_devmap_bootstrap() which calls pmap_map_chunk(), we map |
273 | * registers segment-aligned and segment-rounded in order to avoid | | 273 | * registers segment-aligned and segment-rounded in order to avoid |
274 | * using the 2nd page tables. | | 274 | * using the 2nd page tables. |
275 | */ | | 275 | */ |
276 | | | 276 | |
277 | #define _A(a) ((a) & ~L1_S_OFFSET) | | 277 | #define _A(a) ((a) & ~L1_S_OFFSET) |
278 | #define _S(s) (((s) + L1_S_SIZE - 1) & ~(L1_S_SIZE-1)) | | 278 | #define _S(s) (((s) + L1_S_SIZE - 1) & ~(L1_S_SIZE-1)) |
279 | | | 279 | |
280 | static const struct pmap_devmap devmap[] = { | | 280 | static const struct pmap_devmap devmap[] = { |
281 | { | | 281 | { |
282 | /* | | 282 | /* |
283 | * Map the first 1MB of L4 Core area | | 283 | * Map the first 1MB of L4 Core area |
284 | * this gets us the ICU, I2C, USB, GPT[10-11], MMC, McSPI | | 284 | * this gets us the ICU, I2C, USB, GPT[10-11], MMC, McSPI |
285 | * UART[12], clock manager, sDMA, ... | | 285 | * UART[12], clock manager, sDMA, ... |
286 | */ | | 286 | */ |
287 | .pd_va = _A(OMAP_L4_CORE_VBASE), | | 287 | .pd_va = _A(OMAP_L4_CORE_VBASE), |
288 | .pd_pa = _A(OMAP_L4_CORE_BASE), | | 288 | .pd_pa = _A(OMAP_L4_CORE_BASE), |
289 | .pd_size = _S(OMAP_L4_CORE_SIZE), | | 289 | .pd_size = _S(OMAP_L4_CORE_SIZE), |
290 | .pd_prot = VM_PROT_READ|VM_PROT_WRITE, | | 290 | .pd_prot = VM_PROT_READ|VM_PROT_WRITE, |
291 | .pd_cache = PTE_NOCACHE | | 291 | .pd_cache = PTE_NOCACHE |
292 | }, | | 292 | }, |
293 | { | | 293 | { |
294 | /* | | 294 | /* |
295 | * Map the all 1MB of the L4 Core area | | 295 | * Map the all 1MB of the L4 Core area |
296 | * this gets us the console UART3, GPT[2-9], WDT1, | | 296 | * this gets us the console UART3, GPT[2-9], WDT1, |
297 | * and GPIO[2-6]. | | 297 | * and GPIO[2-6]. |
298 | */ | | 298 | */ |
299 | .pd_va = _A(OMAP_L4_PERIPHERAL_VBASE), | | 299 | .pd_va = _A(OMAP_L4_PERIPHERAL_VBASE), |
300 | .pd_pa = _A(OMAP_L4_PERIPHERAL_BASE), | | 300 | .pd_pa = _A(OMAP_L4_PERIPHERAL_BASE), |
301 | .pd_size = _S(OMAP_L4_PERIPHERAL_SIZE), | | 301 | .pd_size = _S(OMAP_L4_PERIPHERAL_SIZE), |
302 | .pd_prot = VM_PROT_READ|VM_PROT_WRITE, | | 302 | .pd_prot = VM_PROT_READ|VM_PROT_WRITE, |
303 | .pd_cache = PTE_NOCACHE | | 303 | .pd_cache = PTE_NOCACHE |
304 | }, | | 304 | }, |
305 | #if defined(OMAP_L4_WAKEUP_BASE) && defined(OMAP_L4_WAKEUP_VBASE) | | 305 | #if defined(OMAP_L4_WAKEUP_BASE) && defined(OMAP_L4_WAKEUP_VBASE) |
306 | { | | 306 | { |
307 | /* | | 307 | /* |
308 | * Map all 256KB of the L4 Wakeup area | | 308 | * Map all 256KB of the L4 Wakeup area |
309 | * this gets us GPIO1, WDT2, GPT1, 32K and power/reset regs | | 309 | * this gets us GPIO1, WDT2, GPT1, 32K and power/reset regs |
310 | */ | | 310 | */ |
311 | .pd_va = _A(OMAP_L4_WAKEUP_VBASE), | | 311 | .pd_va = _A(OMAP_L4_WAKEUP_VBASE), |
312 | .pd_pa = _A(OMAP_L4_WAKEUP_BASE), | | 312 | .pd_pa = _A(OMAP_L4_WAKEUP_BASE), |
313 | .pd_size = _S(OMAP_L4_WAKEUP_SIZE), | | 313 | .pd_size = _S(OMAP_L4_WAKEUP_SIZE), |
314 | .pd_prot = VM_PROT_READ|VM_PROT_WRITE, | | 314 | .pd_prot = VM_PROT_READ|VM_PROT_WRITE, |
315 | .pd_cache = PTE_NOCACHE | | 315 | .pd_cache = PTE_NOCACHE |
316 | }, | | 316 | }, |
317 | #endif | | 317 | #endif |
318 | #ifdef OMAP_L4_FAST_BASE | | 318 | #ifdef OMAP_L4_FAST_BASE |
319 | { | | 319 | { |
320 | /* | | 320 | /* |
321 | * Map all of the L4 Fast area | | 321 | * Map all of the L4 Fast area |
322 | * this gets us GPIO1, WDT2, GPT1, 32K and power/reset regs | | 322 | * this gets us GPIO1, WDT2, GPT1, 32K and power/reset regs |
323 | */ | | 323 | */ |
324 | .pd_va = _A(OMAP_L4_FAST_VBASE), | | 324 | .pd_va = _A(OMAP_L4_FAST_VBASE), |
325 | .pd_pa = _A(OMAP_L4_FAST_BASE), | | 325 | .pd_pa = _A(OMAP_L4_FAST_BASE), |
326 | .pd_size = _S(OMAP_L4_FAST_SIZE), | | 326 | .pd_size = _S(OMAP_L4_FAST_SIZE), |
327 | .pd_prot = VM_PROT_READ|VM_PROT_WRITE, | | 327 | .pd_prot = VM_PROT_READ|VM_PROT_WRITE, |
328 | .pd_cache = PTE_NOCACHE | | 328 | .pd_cache = PTE_NOCACHE |
329 | }, | | 329 | }, |
330 | #endif | | 330 | #endif |
331 | #ifdef OMAP_EMIF1_BASE | | 331 | #ifdef OMAP_EMIF1_BASE |
332 | { | | 332 | { |
333 | /* | | 333 | /* |
334 | * Map all of the L4 EMIF1 area | | 334 | * Map all of the L4 EMIF1 area |
335 | */ | | 335 | */ |
336 | .pd_va = _A(OMAP_EMIF1_VBASE), | | 336 | .pd_va = _A(OMAP_EMIF1_VBASE), |
337 | .pd_pa = _A(OMAP_EMIF1_BASE), | | 337 | .pd_pa = _A(OMAP_EMIF1_BASE), |
338 | .pd_size = _S(OMAP_EMIF1_SIZE), | | 338 | .pd_size = _S(OMAP_EMIF1_SIZE), |
339 | .pd_prot = VM_PROT_READ|VM_PROT_WRITE, | | 339 | .pd_prot = VM_PROT_READ|VM_PROT_WRITE, |
340 | .pd_cache = PTE_NOCACHE | | 340 | .pd_cache = PTE_NOCACHE |
341 | }, | | 341 | }, |
342 | #endif | | 342 | #endif |
343 | #ifdef OMAP_EMIF2_BASE | | 343 | #ifdef OMAP_EMIF2_BASE |
344 | { | | 344 | { |
345 | /* | | 345 | /* |
346 | * Map all of the L4 EMIF2 area | | 346 | * Map all of the L4 EMIF2 area |
347 | */ | | 347 | */ |
348 | .pd_va = _A(OMAP_EMIF2_VBASE), | | 348 | .pd_va = _A(OMAP_EMIF2_VBASE), |
349 | .pd_pa = _A(OMAP_EMIF2_BASE), | | 349 | .pd_pa = _A(OMAP_EMIF2_BASE), |
350 | .pd_size = _S(OMAP_EMIF2_SIZE), | | 350 | .pd_size = _S(OMAP_EMIF2_SIZE), |
351 | .pd_prot = VM_PROT_READ|VM_PROT_WRITE, | | 351 | .pd_prot = VM_PROT_READ|VM_PROT_WRITE, |
352 | .pd_cache = PTE_NOCACHE | | 352 | .pd_cache = PTE_NOCACHE |
353 | }, | | 353 | }, |
354 | #endif | | 354 | #endif |
355 | #ifdef OMAP_L4_ABE_BASE | | 355 | #ifdef OMAP_L4_ABE_BASE |
356 | { | | 356 | { |
357 | /* | | 357 | /* |
358 | * Map all of the L4 Fast area | | 358 | * Map all of the L4 Fast area |
359 | * this gets us GPIO1, WDT2, GPT1, 32K and power/reset regs | | 359 | * this gets us GPIO1, WDT2, GPT1, 32K and power/reset regs |
360 | */ | | 360 | */ |
361 | .pd_va = _A(OMAP_L4_ABE_VBASE), | | 361 | .pd_va = _A(OMAP_L4_ABE_VBASE), |
362 | .pd_pa = _A(OMAP_L4_ABE_BASE), | | 362 | .pd_pa = _A(OMAP_L4_ABE_BASE), |
363 | .pd_size = _S(OMAP_L4_ABE_SIZE), | | 363 | .pd_size = _S(OMAP_L4_ABE_SIZE), |
364 | .pd_prot = VM_PROT_READ|VM_PROT_WRITE, | | 364 | .pd_prot = VM_PROT_READ|VM_PROT_WRITE, |
365 | .pd_cache = PTE_NOCACHE | | 365 | .pd_cache = PTE_NOCACHE |
366 | }, | | 366 | }, |
367 | #endif | | 367 | #endif |
368 | #ifdef OMAP_SDRC_BASE | | 368 | #ifdef OMAP_SDRC_BASE |
369 | { | | 369 | { |
370 | /* | | 370 | /* |
371 | * Map SDRAM Controller (SDRC) registers | | 371 | * Map SDRAM Controller (SDRC) registers |
372 | */ | | 372 | */ |
373 | .pd_va = _A(OMAP_SDRC_VBASE), | | 373 | .pd_va = _A(OMAP_SDRC_VBASE), |
374 | .pd_pa = _A(OMAP_SDRC_BASE), | | 374 | .pd_pa = _A(OMAP_SDRC_BASE), |
375 | .pd_size = _S(OMAP_SDRC_SIZE), | | 375 | .pd_size = _S(OMAP_SDRC_SIZE), |
376 | .pd_prot = VM_PROT_READ|VM_PROT_WRITE, | | 376 | .pd_prot = VM_PROT_READ|VM_PROT_WRITE, |
377 | .pd_cache = PTE_NOCACHE, | | 377 | .pd_cache = PTE_NOCACHE, |
378 | }, | | 378 | }, |
379 | #endif | | 379 | #endif |
380 | {0} | | 380 | {0} |
381 | }; | | 381 | }; |
382 | | | 382 | |
383 | #undef _A | | 383 | #undef _A |
384 | #undef _S | | 384 | #undef _S |
385 | | | 385 | |
386 | #ifdef DDB | | 386 | #ifdef DDB |
387 | static void | | 387 | static void |
388 | beagle_db_trap(int where) | | 388 | beagle_db_trap(int where) |
389 | { | | 389 | { |
390 | #if NOMAPWDT32K > 0 | | 390 | #if NOMAPWDT32K > 0 |
391 | static int oldwatchdogstate; | | 391 | static int oldwatchdogstate; |
392 | | | 392 | |
393 | if (where) { | | 393 | if (where) { |
394 | oldwatchdogstate = omapwdt32k_enable(0); | | 394 | oldwatchdogstate = omapwdt32k_enable(0); |
395 | } else { | | 395 | } else { |
396 | omapwdt32k_enable(oldwatchdogstate); | | 396 | omapwdt32k_enable(oldwatchdogstate); |
397 | } | | 397 | } |
398 | #endif | | 398 | #endif |
399 | } | | 399 | } |
400 | #endif | | 400 | #endif |
401 | | | 401 | |
402 | void beagle_putchar(char c); | | 402 | void beagle_putchar(char c); |
403 | void | | 403 | void |
404 | beagle_putchar(char c) | | 404 | beagle_putchar(char c) |
405 | { | | 405 | { |
406 | #if NCOM > 0 | | 406 | #if NCOM > 0 |
407 | volatile uint32_t *com0addr = (volatile uint32_t *)CONSADDR_VA; | | 407 | volatile uint32_t *com0addr = (volatile uint32_t *)CONSADDR_VA; |
408 | int timo = 150000; | | 408 | int timo = 150000; |
409 | | | 409 | |
410 | while ((com0addr[com_lsr] & LSR_TXRDY) == 0) { | | 410 | while ((com0addr[com_lsr] & LSR_TXRDY) == 0) { |
411 | if (--timo == 0) | | 411 | if (--timo == 0) |
412 | break; | | 412 | break; |
413 | } | | 413 | } |
414 | | | 414 | |
415 | com0addr[com_data] = c; | | 415 | com0addr[com_data] = c; |
416 | | | 416 | |
417 | while ((com0addr[com_lsr] & LSR_TXRDY) == 0) { | | 417 | while ((com0addr[com_lsr] & LSR_TXRDY) == 0) { |
418 | if (--timo == 0) | | 418 | if (--timo == 0) |
419 | break; | | 419 | break; |
420 | } | | 420 | } |
421 | #endif | | 421 | #endif |
422 | } | | 422 | } |
423 | | | 423 | |
424 | /* | | 424 | /* |
425 | * u_int initarm(...) | | 425 | * u_int initarm(...) |
426 | * | | 426 | * |
427 | * Initial entry point on startup. This gets called before main() is | | 427 | * Initial entry point on startup. This gets called before main() is |
428 | * entered. | | 428 | * entered. |
429 | * It should be responsible for setting up everything that must be | | 429 | * It should be responsible for setting up everything that must be |
430 | * in place when main is called. | | 430 | * in place when main is called. |
431 | * This includes | | 431 | * This includes |
432 | * Taking a copy of the boot configuration structure. | | 432 | * Taking a copy of the boot configuration structure. |
433 | * Initialising the physical console so characters can be printed. | | 433 | * Initialising the physical console so characters can be printed. |
434 | * Setting up page tables for the kernel | | 434 | * Setting up page tables for the kernel |
435 | * Relocating the kernel to the bottom of physical memory | | 435 | * Relocating the kernel to the bottom of physical memory |
436 | */ | | 436 | */ |
437 | u_int | | 437 | u_int |
438 | initarm(void *arg) | | 438 | initarm(void *arg) |
439 | { | | 439 | { |
440 | psize_t ram_size = 0; | | 440 | psize_t ram_size = 0; |
441 | char *ptr; | | 441 | char *ptr; |
442 | | | 442 | |
443 | #if 1 | | 443 | #if 1 |
444 | beagle_putchar('d'); | | 444 | beagle_putchar('d'); |
445 | #endif | | 445 | #endif |
446 | | | 446 | |
447 | /* | | 447 | /* |
448 | * When we enter here, we are using a temporary first level | | 448 | * When we enter here, we are using a temporary first level |
449 | * translation table with section entries in it to cover the OBIO | | 449 | * translation table with section entries in it to cover the OBIO |
450 | * peripherals and SDRAM. The temporary first level translation table | | 450 | * peripherals and SDRAM. The temporary first level translation table |
451 | * is at the end of SDRAM. | | 451 | * is at the end of SDRAM. |
452 | */ | | 452 | */ |
453 | #if defined(OMAP_3XXX) || defined(TI_DM37XX) | | 453 | #if defined(OMAP_3XXX) || defined(TI_DM37XX) |
454 | omap3_cpu_clk(); // find our CPU speed. | | 454 | omap3_cpu_clk(); // find our CPU speed. |
455 | #endif | | 455 | #endif |
456 | #if defined(OMAP_4XXX) || defined(OMAP_5XXX) | | 456 | #if defined(OMAP_4XXX) || defined(OMAP_5XXX) |
457 | omap4_cpu_clk(); // find our CPU speed. | | 457 | omap4_cpu_clk(); // find our CPU speed. |
458 | #endif | | 458 | #endif |
459 | #if defined(TI_AM335X) | | 459 | #if defined(TI_AM335X) |
460 | am335x_cpu_clk(); // find our CPU speed. | | 460 | am335x_cpu_clk(); // find our CPU speed. |
461 | #endif | | 461 | #endif |
462 | /* Heads up ... Setup the CPU / MMU / TLB functions. */ | | 462 | /* Heads up ... Setup the CPU / MMU / TLB functions. */ |
463 | if (set_cpufuncs()) | | 463 | if (set_cpufuncs()) |
464 | panic("cpu not recognized!"); | | 464 | panic("cpu not recognized!"); |
465 | | | 465 | |
466 | init_clocks(); | | 466 | init_clocks(); |
467 | | | 467 | |
468 | /* The console is going to try to map things. Give pmap a devmap. */ | | 468 | /* The console is going to try to map things. Give pmap a devmap. */ |
469 | pmap_devmap_register(devmap); | | 469 | pmap_devmap_register(devmap); |
470 | consinit(); | | 470 | consinit(); |
471 | #if defined(OMAP_4XXX) | | 471 | #if defined(OMAP_4XXX) |
472 | /* | | 472 | /* |
473 | * Probe the PL310 L2CC | | 473 | * Probe the PL310 L2CC |
474 | */ | | 474 | */ |
475 | const bus_space_handle_t pl310_bh = OMAP4_L2CC_BASE + | | 475 | const bus_space_handle_t pl310_bh = OMAP4_L2CC_BASE + |
476 | OMAP_L4_PERIPHERAL_VBASE - OMAP_L4_PERIPHERAL_BASE; | | 476 | OMAP_L4_PERIPHERAL_VBASE - OMAP_L4_PERIPHERAL_BASE; |
477 | arml2cc_init(&omap_bs_tag, pl310_bh, 0); | | 477 | arml2cc_init(&omap_bs_tag, pl310_bh, 0); |
478 | #endif | | 478 | #endif |
479 | #if 1 | | 479 | #if 1 |
480 | beagle_putchar('h'); | | 480 | beagle_putchar('h'); |
481 | #endif | | 481 | #endif |
482 | printf("uboot arg = %#x, %#x, %#x, %#x\n", | | 482 | printf("uboot arg = %#x, %#x, %#x, %#x\n", |
483 | uboot_args[0], uboot_args[1], uboot_args[2], uboot_args[3]); | | 483 | uboot_args[0], uboot_args[1], uboot_args[2], uboot_args[3]); |
484 | | | 484 | |
485 | #ifdef KGDB | | 485 | #ifdef KGDB |
486 | kgdb_port_init(); | | 486 | kgdb_port_init(); |
487 | #endif | | 487 | #endif |
488 | | | 488 | |
489 | cpu_reset_address = beagle_reset; | | 489 | cpu_reset_address = beagle_reset; |
490 | | | 490 | |
491 | #ifdef VERBOSE_INIT_ARM | | 491 | #ifdef VERBOSE_INIT_ARM |
492 | /* Talk to the user */ | | 492 | /* Talk to the user */ |
493 | printf("\nNetBSD/evbarm (beagle) booting ...\n"); | | 493 | printf("\nNetBSD/evbarm (beagle) booting ...\n"); |
494 | #endif | | 494 | #endif |
495 | | | 495 | |
496 | #ifdef BOOT_ARGS | | 496 | #ifdef BOOT_ARGS |
497 | char mi_bootargs[] = BOOT_ARGS; | | 497 | char mi_bootargs[] = BOOT_ARGS; |
498 | parse_mi_bootargs(mi_bootargs); | | 498 | parse_mi_bootargs(mi_bootargs); |
499 | #endif | | 499 | #endif |
500 | | | 500 | |
501 | #ifdef VERBOSE_INIT_ARM | | 501 | #ifdef VERBOSE_INIT_ARM |
502 | printf("initarm: Configuring system ...\n"); | | 502 | printf("initarm: Configuring system ...\n"); |
503 | #endif | | 503 | #endif |
504 | | | 504 | |
505 | /* | | 505 | /* |
506 | * Set up the variables that define the availability of physical | | 506 | * Set up the variables that define the availability of physical |
507 | * memory. | | 507 | * memory. |
508 | */ | | 508 | */ |
509 | #if defined(OMAP_3XXX) | | 509 | #if defined(OMAP_3XXX) |
510 | ram_size = omap3_memprobe(); | | 510 | ram_size = omap3_memprobe(); |
511 | #endif | | 511 | #endif |
512 | #if defined(OMAP_4XXX) || defined(OMAP_5XXX) || defined(TI_AM335X) | | 512 | #if defined(OMAP_4XXX) || defined(OMAP_5XXX) || defined(TI_AM335X) |
513 | ram_size = emif_memprobe(); | | 513 | ram_size = emif_memprobe(); |
514 | #endif | | 514 | #endif |
515 | | | 515 | |
516 | /* | | 516 | /* |
517 | * If MEMSIZE specified less than what we really have, limit ourselves | | 517 | * If MEMSIZE specified less than what we really have, limit ourselves |
518 | * to that. | | 518 | * to that. |
519 | */ | | 519 | */ |
520 | #ifdef MEMSIZE | | 520 | #ifdef MEMSIZE |
521 | if (ram_size == 0 || ram_size > (unsigned)MEMSIZE * 1024 * 1024) | | 521 | if (ram_size == 0 || ram_size > (unsigned)MEMSIZE * 1024 * 1024) |
522 | ram_size = (unsigned)MEMSIZE * 1024 * 1024; | | 522 | ram_size = (unsigned)MEMSIZE * 1024 * 1024; |
523 | #else | | 523 | #else |
524 | KASSERTMSG(ram_size > 0, "RAM size unknown and MEMSIZE undefined"); | | 524 | KASSERTMSG(ram_size > 0, "RAM size unknown and MEMSIZE undefined"); |
525 | #endif | | 525 | #endif |
526 | | | 526 | |
527 | /* Fake bootconfig structure for the benefit of pmap.c. */ | | 527 | /* Fake bootconfig structure for the benefit of pmap.c. */ |
528 | bootconfig.dramblocks = 1; | | 528 | bootconfig.dramblocks = 1; |
529 | bootconfig.dram[0].address = KERNEL_BASE_PHYS & -0x400000; | | 529 | bootconfig.dram[0].address = KERNEL_BASE_PHYS & -0x400000; |
530 | bootconfig.dram[0].pages = ram_size / PAGE_SIZE; | | 530 | bootconfig.dram[0].pages = ram_size / PAGE_SIZE; |
531 | | | 531 | |
532 | #ifdef __HAVE_MM_MD_DIRECT_MAPPED_PHYS | | 532 | #ifdef __HAVE_MM_MD_DIRECT_MAPPED_PHYS |
533 | const bool mapallmem_p = true; | | 533 | const bool mapallmem_p = true; |
534 | KASSERT(ram_size <= KERNEL_VM_BASE - KERNEL_BASE); | | 534 | KASSERT(ram_size <= KERNEL_VM_BASE - KERNEL_BASE); |
535 | #else | | 535 | #else |
536 | const bool mapallmem_p = false; | | 536 | const bool mapallmem_p = false; |
537 | #endif | | 537 | #endif |
538 | KASSERT((armreg_pfr1_read() & ARM_PFR1_SEC_MASK) != 0); | | 538 | KASSERT((armreg_pfr1_read() & ARM_PFR1_SEC_MASK) != 0); |
539 | | | 539 | |
540 | arm32_bootmem_init(bootconfig.dram[0].address, ram_size, | | 540 | arm32_bootmem_init(bootconfig.dram[0].address, ram_size, |
541 | KERNEL_BASE_PHYS); | | 541 | KERNEL_BASE_PHYS); |
542 | arm32_kernel_vm_init(KERNEL_VM_BASE, ARM_VECTORS_LOW, 0, devmap, | | 542 | arm32_kernel_vm_init(KERNEL_VM_BASE, ARM_VECTORS_LOW, 0, devmap, |
543 | mapallmem_p); | | 543 | mapallmem_p); |
544 | | | 544 | |
545 | /* "bootargs" env variable is passed as 4th argument to kernel */ | | 545 | /* "bootargs" env variable is passed as 4th argument to kernel */ |
546 | if ((uboot_args[3] & 0xf0000000) == 0x80000000) { | | 546 | if ((uboot_args[3] & 0xf0000000) == 0x80000000) { |
547 | strlcpy(bootargs, (char *)uboot_args[3], sizeof(bootargs)); | | 547 | strlcpy(bootargs, (char *)uboot_args[3], sizeof(bootargs)); |
548 | } | | 548 | } |
549 | boot_args = bootargs; | | 549 | boot_args = bootargs; |
550 | parse_mi_bootargs(boot_args); | | 550 | parse_mi_bootargs(boot_args); |
551 | | | 551 | |
552 | /* we've a specific device_register routine */ | | 552 | /* we've a specific device_register routine */ |
553 | evbarm_device_register = beagle_device_register; | | 553 | evbarm_device_register = beagle_device_register; |
554 | | | 554 | |
555 | db_trap_callback = beagle_db_trap; | | 555 | db_trap_callback = beagle_db_trap; |
556 | | | 556 | |
557 | if (get_bootconf_option(boot_args, "console", | | 557 | if (get_bootconf_option(boot_args, "console", |
558 | BOOTOPT_TYPE_STRING, &ptr) && strncmp(ptr, "fb", 2) == 0) { | | 558 | BOOTOPT_TYPE_STRING, &ptr) && strncmp(ptr, "fb", 2) == 0) { |
559 | use_fb_console = true; | | 559 | use_fb_console = true; |
560 | } | | 560 | } |
561 | | | 561 | |
562 | return initarm_common(KERNEL_VM_BASE, KERNEL_VM_SIZE, NULL, 0); | | 562 | return initarm_common(KERNEL_VM_BASE, KERNEL_VM_SIZE, NULL, 0); |
563 | | | 563 | |
564 | } | | 564 | } |
565 | | | 565 | |
566 | static void | | 566 | static void |
567 | init_clocks(void) | | 567 | init_clocks(void) |
568 | { | | 568 | { |
569 | #ifdef NOTYET | | 569 | #ifdef NOTYET |
570 | static volatile uint32_t * const clksel_reg = (volatile uint32_t *) (OMAP3530_L4_WAKEUP_VBASE + OMAP2_CM_BASE + OMAP2_CM_CLKSEL_MPU - OMAP3530_L4_WAKEUP_BASE); | | 570 | static volatile uint32_t * const clksel_reg = (volatile uint32_t *) (OMAP3530_L4_WAKEUP_VBASE + OMAP2_CM_BASE + OMAP2_CM_CLKSEL_MPU - OMAP3530_L4_WAKEUP_BASE); |
571 | uint32_t v; | | 571 | uint32_t v; |
572 | beagle_putchar('E'); | | 572 | beagle_putchar('E'); |
573 | v = *clksel_reg; | | 573 | v = *clksel_reg; |
574 | beagle_putchar('F'); | | 574 | beagle_putchar('F'); |
575 | if (v != OMAP3530_CM_CLKSEL_MPU_FULLSPEED) { | | 575 | if (v != OMAP3530_CM_CLKSEL_MPU_FULLSPEED) { |
576 | printf("Changed CPU speed from half (%d) ", v); | | 576 | printf("Changed CPU speed from half (%d) ", v); |
577 | *clksel_reg = OMAP3530_CM_CLKSEL_MPU_FULLSPEED; | | 577 | *clksel_reg = OMAP3530_CM_CLKSEL_MPU_FULLSPEED; |
578 | printf("to full speed.\n"); | | 578 | printf("to full speed.\n"); |
579 | } | | 579 | } |
580 | beagle_putchar('G'); | | 580 | beagle_putchar('G'); |
581 | #endif | | 581 | #endif |
582 | } | | 582 | } |
583 | | | 583 | |
584 | #if NCOM > 0 | | 584 | #if NCOM > 0 |
585 | #ifndef CONSADDR | | 585 | #ifndef CONSADDR |
586 | #error Specify the address of the console UART with the CONSADDR option. | | 586 | #error Specify the address of the console UART with the CONSADDR option. |
587 | #endif | | 587 | #endif |
588 | #ifndef CONSPEED | | 588 | #ifndef CONSPEED |
589 | #define CONSPEED 115200 | | 589 | #define CONSPEED 115200 |
590 | #endif | | 590 | #endif |
591 | #ifndef CONMODE | | 591 | #ifndef CONMODE |
592 | #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ | | 592 | #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ |
593 | #endif | | 593 | #endif |
594 | | | 594 | |
595 | static const bus_addr_t consaddr = CONSADDR; | | 595 | static const bus_addr_t consaddr = CONSADDR; |
596 | static const int conspeed = CONSPEED; | | 596 | static const int conspeed = CONSPEED; |
597 | static const int conmode = CONMODE; | | 597 | static const int conmode = CONMODE; |
598 | #endif | | 598 | #endif |
599 | | | 599 | |
600 | void | | 600 | void |
601 | consinit(void) | | 601 | consinit(void) |
602 | { | | 602 | { |
603 | #if NCOM > 0 | | 603 | #if NCOM > 0 |
604 | bus_space_handle_t bh; | | 604 | bus_space_handle_t bh; |
605 | #endif | | 605 | #endif |
606 | static int consinit_called = 0; | | 606 | static int consinit_called = 0; |
607 | | | 607 | |
608 | if (consinit_called != 0) | | 608 | if (consinit_called != 0) |
609 | return; | | 609 | return; |
610 | | | 610 | |
611 | consinit_called = 1; | | 611 | consinit_called = 1; |
612 | | | 612 | |
613 | beagle_putchar('e'); | | 613 | beagle_putchar('e'); |
614 | | | 614 | |
615 | #if NCOM > 0 | | 615 | #if NCOM > 0 |
616 | if (bus_space_map(&omap_a4x_bs_tag, consaddr, OMAP_COM_SIZE, 0, &bh)) | | 616 | if (bus_space_map(&omap_a4x_bs_tag, consaddr, OMAP_COM_SIZE, 0, &bh)) |
617 | panic("Serial console can not be mapped."); | | 617 | panic("Serial console can not be mapped."); |
618 | | | 618 | |
619 | if (comcnattach(&omap_a4x_bs_tag, consaddr, conspeed, | | 619 | if (comcnattach(&omap_a4x_bs_tag, consaddr, conspeed, |
620 | OMAP_COM_FREQ, COM_TYPE_NORMAL, conmode)) | | 620 | OMAP_COM_FREQ, COM_TYPE_NORMAL, conmode)) |
621 | panic("Serial console can not be initialized."); | | 621 | panic("Serial console can not be initialized."); |
622 | | | 622 | |
623 | bus_space_unmap(&omap_a4x_bs_tag, bh, OMAP_COM_SIZE); | | 623 | bus_space_unmap(&omap_a4x_bs_tag, bh, OMAP_COM_SIZE); |
624 | #endif | | 624 | #endif |
625 | | | 625 | |
626 | #if NUKBD > 0 | | 626 | #if NUKBD > 0 |
627 | ukbd_cnattach(); /* allow USB keyboard to become console */ | | 627 | ukbd_cnattach(); /* allow USB keyboard to become console */ |
628 | #endif | | 628 | #endif |
629 | | | 629 | |
630 | beagle_putchar('f'); | | 630 | beagle_putchar('f'); |
631 | beagle_putchar('g'); | | 631 | beagle_putchar('g'); |
632 | } | | 632 | } |
633 | | | 633 | |
634 | void | | 634 | void |
635 | beagle_reset(void) | | 635 | beagle_reset(void) |
636 | { | | 636 | { |
637 | #if defined(OMAP_4XXX) || defined(OMAP_5XXX) | | 637 | #if defined(OMAP_4XXX) |
638 | *(volatile uint32_t *)(OMAP_L4_CORE_VBASE + (OMAP_L4_WAKEUP_BASE - OMAP_L4_CORE_BASE) + OMAP4_PRM_RSTCTRL) = OMAP4_PRM_RSTCTRL_WARM; | | 638 | *(volatile uint32_t *)(OMAP_L4_CORE_VBASE + (OMAP_L4_WAKEUP_BASE - OMAP_L4_CORE_BASE) + OMAP4_PRM_RSTCTRL) = OMAP4_PRM_RSTCTRL_WARM; |
| | | 639 | #elif defined(OMAP_5XXX) |
| | | 640 | *(volatile uint32_t *)(OMAP_L4_CORE_VBASE + (OMAP_L4_WAKEUP_BASE - OMAP_L4_CORE_BASE) + OMAP5_PRM_RSTCTRL) = OMAP4_PRM_RSTCTRL_COLD; |
| | | 641 | #elif defined(OMAP_5XXX) |
639 | #elif defined(TI_AM335X) | | 642 | #elif defined(TI_AM335X) |
640 | *(volatile uint32_t *)(OMAP_L4_CORE_VBASE + (OMAP2_CM_BASE - OMAP_L4_CORE_BASE) + AM335X_PRCM_PRM_DEVICE + PRM_RSTCTRL) = RST_GLOBAL_WARM_SW; | | 643 | *(volatile uint32_t *)(OMAP_L4_CORE_VBASE + (OMAP2_CM_BASE - OMAP_L4_CORE_BASE) + AM335X_PRCM_PRM_DEVICE + PRM_RSTCTRL) = RST_GLOBAL_WARM_SW; |
641 | #else | | 644 | #else |
642 | #if NPRCM > 0 | | 645 | #if NPRCM > 0 |
643 | prcm_cold_reset(); | | 646 | prcm_cold_reset(); |
644 | #endif | | 647 | #endif |
645 | #if NOMAPWDT32K > 0 | | 648 | #if NOMAPWDT32K > 0 |
646 | omapwdt32k_reboot(); | | 649 | omapwdt32k_reboot(); |
647 | #endif | | 650 | #endif |
648 | #endif | | 651 | #endif |
649 | } | | 652 | } |
650 | | | 653 | |
651 | #ifdef KGDB | | 654 | #ifdef KGDB |
652 | #ifndef KGDB_DEVADDR | | 655 | #ifndef KGDB_DEVADDR |
653 | #error Specify the address of the kgdb UART with the KGDB_DEVADDR option. | | 656 | #error Specify the address of the kgdb UART with the KGDB_DEVADDR option. |
654 | #endif | | 657 | #endif |
655 | #ifndef KGDB_DEVRATE | | 658 | #ifndef KGDB_DEVRATE |
656 | #define KGDB_DEVRATE 115200 | | 659 | #define KGDB_DEVRATE 115200 |
657 | #endif | | 660 | #endif |
658 | | | 661 | |
659 | #ifndef KGDB_DEVMODE | | 662 | #ifndef KGDB_DEVMODE |
660 | #define KGDB_DEVMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ | | 663 | #define KGDB_DEVMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ |
661 | #endif | | 664 | #endif |
662 | static const vaddr_t comkgdbaddr = KGDB_DEVADDR; | | 665 | static const vaddr_t comkgdbaddr = KGDB_DEVADDR; |
663 | static const int comkgdbspeed = KGDB_DEVRATE; | | 666 | static const int comkgdbspeed = KGDB_DEVRATE; |
664 | static const int comkgdbmode = KGDB_DEVMODE; | | 667 | static const int comkgdbmode = KGDB_DEVMODE; |
665 | | | 668 | |
666 | void | | 669 | void |
667 | static kgdb_port_init(void) | | 670 | static kgdb_port_init(void) |
668 | { | | 671 | { |
669 | static int kgdbsinit_called = 0; | | 672 | static int kgdbsinit_called = 0; |
670 | | | 673 | |
671 | if (kgdbsinit_called != 0) | | 674 | if (kgdbsinit_called != 0) |
672 | return; | | 675 | return; |
673 | | | 676 | |
674 | kgdbsinit_called = 1; | | 677 | kgdbsinit_called = 1; |
675 | | | 678 | |
676 | bus_space_handle_t bh; | | 679 | bus_space_handle_t bh; |
677 | if (bus_space_map(&omap_a4x_bs_tag, comkgdbaddr, OMAP_COM_SIZE, 0, &bh)) | | 680 | if (bus_space_map(&omap_a4x_bs_tag, comkgdbaddr, OMAP_COM_SIZE, 0, &bh)) |
678 | panic("kgdb port can not be mapped."); | | 681 | panic("kgdb port can not be mapped."); |
679 | | | 682 | |
680 | if (com_kgdb_attach(&omap_a4x_bs_tag, comkgdbaddr, comkgdbspeed, | | 683 | if (com_kgdb_attach(&omap_a4x_bs_tag, comkgdbaddr, comkgdbspeed, |
681 | OMAP_COM_FREQ, COM_TYPE_NORMAL, comkgdbmode)) | | 684 | OMAP_COM_FREQ, COM_TYPE_NORMAL, comkgdbmode)) |
682 | panic("KGDB uart can not be initialized."); | | 685 | panic("KGDB uart can not be initialized."); |
683 | | | 686 | |
684 | bus_space_unmap(&omap_a4x_bs_tag, bh, OMAP_COM_SIZE); | | 687 | bus_space_unmap(&omap_a4x_bs_tag, bh, OMAP_COM_SIZE); |
685 | } | | 688 | } |
686 | #endif | | 689 | #endif |
687 | | | 690 | |
688 | #if defined(OMAP_3XXX) || defined(TI_DM37XX) | | 691 | #if defined(OMAP_3XXX) || defined(TI_DM37XX) |
689 | void | | 692 | void |
690 | omap3_cpu_clk(void) | | 693 | omap3_cpu_clk(void) |
691 | { | | 694 | { |
692 | const vaddr_t prm_base = OMAP2_PRM_BASE - OMAP_L4_CORE_BASE + OMAP_L4_CORE_VBASE; | | 695 | const vaddr_t prm_base = OMAP2_PRM_BASE - OMAP_L4_CORE_BASE + OMAP_L4_CORE_VBASE; |
693 | const uint32_t prm_clksel = *(volatile uint32_t *)(prm_base + PLL_MOD + OMAP3_PRM_CLKSEL); | | 696 | const uint32_t prm_clksel = *(volatile uint32_t *)(prm_base + PLL_MOD + OMAP3_PRM_CLKSEL); |
694 | static const uint32_t prm_clksel_freqs[] = OMAP3_PRM_CLKSEL_FREQS; | | 697 | static const uint32_t prm_clksel_freqs[] = OMAP3_PRM_CLKSEL_FREQS; |
695 | const uint32_t sys_clk = prm_clksel_freqs[__SHIFTOUT(prm_clksel, OMAP3_PRM_CLKSEL_CLKIN)]; | | 698 | const uint32_t sys_clk = prm_clksel_freqs[__SHIFTOUT(prm_clksel, OMAP3_PRM_CLKSEL_CLKIN)]; |
696 | const vaddr_t cm_base = OMAP2_CM_BASE - OMAP_L4_CORE_BASE + OMAP_L4_CORE_VBASE; | | 699 | const vaddr_t cm_base = OMAP2_CM_BASE - OMAP_L4_CORE_BASE + OMAP_L4_CORE_VBASE; |
697 | const uint32_t dpll1 = *(volatile uint32_t *)(cm_base + OMAP3_CM_CLKSEL1_PLL_MPU); | | 700 | const uint32_t dpll1 = *(volatile uint32_t *)(cm_base + OMAP3_CM_CLKSEL1_PLL_MPU); |
698 | const uint32_t dpll2 = *(volatile uint32_t *)(cm_base + OMAP3_CM_CLKSEL2_PLL_MPU); | | 701 | const uint32_t dpll2 = *(volatile uint32_t *)(cm_base + OMAP3_CM_CLKSEL2_PLL_MPU); |
699 | const uint32_t m = __SHIFTOUT(dpll1, OMAP3_CM_CLKSEL1_PLL_MPU_DPLL_MULT); | | 702 | const uint32_t m = __SHIFTOUT(dpll1, OMAP3_CM_CLKSEL1_PLL_MPU_DPLL_MULT); |
700 | const uint32_t n = __SHIFTOUT(dpll1, OMAP3_CM_CLKSEL1_PLL_MPU_DPLL_DIV); | | 703 | const uint32_t n = __SHIFTOUT(dpll1, OMAP3_CM_CLKSEL1_PLL_MPU_DPLL_DIV); |
701 | const uint32_t m2 = __SHIFTOUT(dpll2, OMAP3_CM_CLKSEL2_PLL_MPU_DPLL_CLKOUT_DIV); | | 704 | const uint32_t m2 = __SHIFTOUT(dpll2, OMAP3_CM_CLKSEL2_PLL_MPU_DPLL_CLKOUT_DIV); |
702 | | | 705 | |
703 | /* | | 706 | /* |
704 | * MPU_CLK supplies ARM_FCLK which is twice the CPU frequency. | | 707 | * MPU_CLK supplies ARM_FCLK which is twice the CPU frequency. |
705 | */ | | 708 | */ |
706 | curcpu()->ci_data.cpu_cc_freq = ((sys_clk * m) / ((n + 1) * m2 * 2)) * OMAP3_PRM_CLKSEL_MULT; | | 709 | curcpu()->ci_data.cpu_cc_freq = ((sys_clk * m) / ((n + 1) * m2 * 2)) * OMAP3_PRM_CLKSEL_MULT; |
707 | omap_sys_clk = sys_clk * OMAP3_PRM_CLKSEL_MULT; | | 710 | omap_sys_clk = sys_clk * OMAP3_PRM_CLKSEL_MULT; |
708 | } | | 711 | } |
709 | #endif /* OMAP_3XXX || TI_DM37XX */ | | 712 | #endif /* OMAP_3XXX || TI_DM37XX */ |
710 | | | 713 | |
711 | #if defined(OMAP_4XXX) || defined(OMAP_5XXX) | | 714 | #if defined(OMAP_4XXX) || defined(OMAP_5XXX) |
712 | void | | 715 | void |
713 | omap4_cpu_clk(void) | | 716 | omap4_cpu_clk(void) |
714 | { | | 717 | { |
715 | const vaddr_t prm_base = OMAP2_PRM_BASE - OMAP_L4_CORE_BASE + OMAP_L4_CORE_VBASE; | | 718 | const vaddr_t prm_base = OMAP2_PRM_BASE - OMAP_L4_CORE_BASE + OMAP_L4_CORE_VBASE; |
716 | const vaddr_t cm_base = OMAP2_CM_BASE - OMAP_L4_CORE_BASE + OMAP_L4_CORE_VBASE; | | 719 | const vaddr_t cm_base = OMAP2_CM_BASE - OMAP_L4_CORE_BASE + OMAP_L4_CORE_VBASE; |
717 | static const uint32_t cm_clksel_freqs[] = OMAP4_CM_CLKSEL_FREQS; | | 720 | static const uint32_t cm_clksel_freqs[] = OMAP4_CM_CLKSEL_FREQS; |
718 | const uint32_t prm_clksel = *(volatile uint32_t *)(prm_base + OMAP4_CM_SYS_CLKSEL); | | 721 | const uint32_t prm_clksel = *(volatile uint32_t *)(prm_base + OMAP4_CM_SYS_CLKSEL); |
719 | const uint32_t sys_clk = cm_clksel_freqs[__SHIFTOUT(prm_clksel, OMAP4_CM_SYS_CLKSEL_CLKIN)]; | | 722 | const uint32_t sys_clk = cm_clksel_freqs[__SHIFTOUT(prm_clksel, OMAP4_CM_SYS_CLKSEL_CLKIN)]; |
720 | const uint32_t dpll1 = *(volatile uint32_t *)(cm_base + OMAP4_CM_CLKSEL_DPLL_MPU); | | 723 | const uint32_t dpll1 = *(volatile uint32_t *)(cm_base + OMAP4_CM_CLKSEL_DPLL_MPU); |
721 | const uint32_t dpll2 = *(volatile uint32_t *)(cm_base + OMAP4_CM_DIV_M2_DPLL_MPU); | | 724 | const uint32_t dpll2 = *(volatile uint32_t *)(cm_base + OMAP4_CM_DIV_M2_DPLL_MPU); |
722 | const uint32_t m = __SHIFTOUT(dpll1, OMAP4_CM_CLKSEL_DPLL_MPU_DPLL_MULT); | | 725 | const uint32_t m = __SHIFTOUT(dpll1, OMAP4_CM_CLKSEL_DPLL_MPU_DPLL_MULT); |
723 | const uint32_t n = __SHIFTOUT(dpll1, OMAP4_CM_CLKSEL_DPLL_MPU_DPLL_DIV); | | 726 | const uint32_t n = __SHIFTOUT(dpll1, OMAP4_CM_CLKSEL_DPLL_MPU_DPLL_DIV); |
724 | const uint32_t m2 = __SHIFTOUT(dpll2, OMAP4_CM_DIV_M2_DPLL_MPU_DPLL_CLKOUT_DIV); | | 727 | const uint32_t m2 = __SHIFTOUT(dpll2, OMAP4_CM_DIV_M2_DPLL_MPU_DPLL_CLKOUT_DIV); |
725 | | | 728 | |
726 | /* | | 729 | /* |
727 | * MPU_CLK supplies ARM_FCLK which is twice the CPU frequency. | | 730 | * MPU_CLK supplies ARM_FCLK which is twice the CPU frequency. |
728 | */ | | 731 | */ |
729 | curcpu()->ci_data.cpu_cc_freq = ((sys_clk * 2 * m) / ((n + 1) * m2)) * OMAP4_CM_CLKSEL_MULT / 2; | | 732 | curcpu()->ci_data.cpu_cc_freq = ((sys_clk * 2 * m) / ((n + 1) * m2)) * OMAP4_CM_CLKSEL_MULT / 2; |
730 | omap_sys_clk = sys_clk * OMAP4_CM_CLKSEL_MULT; | | 733 | omap_sys_clk = sys_clk * OMAP4_CM_CLKSEL_MULT; |
731 | printf("%s: %"PRIu64": sys_clk=%u m=%u n=%u (%u) m2=%u mult=%u\n", | | 734 | printf("%s: %"PRIu64": sys_clk=%u m=%u n=%u (%u) m2=%u mult=%u\n", |
732 | __func__, curcpu()->ci_data.cpu_cc_freq, | | 735 | __func__, curcpu()->ci_data.cpu_cc_freq, |
733 | sys_clk, m, n, n+1, m2, OMAP4_CM_CLKSEL_MULT); | | 736 | sys_clk, m, n, n+1, m2, OMAP4_CM_CLKSEL_MULT); |
734 | } | | 737 | } |
735 | #endif /* OMAP_4XXX || OMAP_5XXX */ | | 738 | #endif /* OMAP_4XXX || OMAP_5XXX */ |
736 | | | 739 | |
737 | #if defined(TI_AM335X) | | 740 | #if defined(TI_AM335X) |
738 | void | | 741 | void |
739 | am335x_cpu_clk(void) | | 742 | am335x_cpu_clk(void) |
740 | { | | 743 | { |
741 | static const uint32_t sys_clks[4] = { | | 744 | static const uint32_t sys_clks[4] = { |
742 | [0] = 19200000, [1] = 24000000, [2] = 25000000, [3] = 26000000 | | 745 | [0] = 19200000, [1] = 24000000, [2] = 25000000, [3] = 26000000 |
743 | }; | | 746 | }; |
744 | const vaddr_t cm_base = OMAP2_CM_BASE - OMAP_L4_CORE_BASE + OMAP_L4_CORE_VBASE; | | 747 | const vaddr_t cm_base = OMAP2_CM_BASE - OMAP_L4_CORE_BASE + OMAP_L4_CORE_VBASE; |
745 | const vaddr_t cm_wkup_base = cm_base + AM335X_PRCM_CM_WKUP; | | 748 | const vaddr_t cm_wkup_base = cm_base + AM335X_PRCM_CM_WKUP; |
746 | const vaddr_t ctlmod_base = TI_AM335X_CTLMOD_BASE - OMAP_L4_CORE_BASE + OMAP_L4_CORE_VBASE; | | 749 | const vaddr_t ctlmod_base = TI_AM335X_CTLMOD_BASE - OMAP_L4_CORE_BASE + OMAP_L4_CORE_VBASE; |
747 | const uint32_t control_status = *(const volatile uint32_t *)(ctlmod_base + CTLMOD_CONTROL_STATUS); | | 750 | const uint32_t control_status = *(const volatile uint32_t *)(ctlmod_base + CTLMOD_CONTROL_STATUS); |
748 | const uint32_t sys_clk = sys_clks[__SHIFTOUT(control_status, CTLMOD_CONTROL_STATUS_SYSBOOT1)]; | | 751 | const uint32_t sys_clk = sys_clks[__SHIFTOUT(control_status, CTLMOD_CONTROL_STATUS_SYSBOOT1)]; |
749 | const uint32_t clksel_dpll_mpu = *(volatile uint32_t *)(cm_wkup_base + TI_AM335X_CM_CLKSEL_DPLL_MPU); | | 752 | const uint32_t clksel_dpll_mpu = *(volatile uint32_t *)(cm_wkup_base + TI_AM335X_CM_CLKSEL_DPLL_MPU); |
750 | const uint32_t div_m2_dpll_mpu = *(volatile uint32_t *)(cm_wkup_base + TI_AM335X_CM_DIV_M2_DPLL_MPU); | | 753 | const uint32_t div_m2_dpll_mpu = *(volatile uint32_t *)(cm_wkup_base + TI_AM335X_CM_DIV_M2_DPLL_MPU); |
751 | const uint32_t m = __SHIFTOUT(clksel_dpll_mpu, TI_AM335X_CM_CLKSEL_DPLL_MPU_DPLL_MULT); | | 754 | const uint32_t m = __SHIFTOUT(clksel_dpll_mpu, TI_AM335X_CM_CLKSEL_DPLL_MPU_DPLL_MULT); |
752 | const uint32_t n = __SHIFTOUT(clksel_dpll_mpu, TI_AM335X_CM_CLKSEL_DPLL_MPU_DPLL_DIV); | | 755 | const uint32_t n = __SHIFTOUT(clksel_dpll_mpu, TI_AM335X_CM_CLKSEL_DPLL_MPU_DPLL_DIV); |
753 | const uint32_t m2 = __SHIFTOUT(div_m2_dpll_mpu, TI_AM335X_CM_DIV_M2_DPLL_MPU_DPLL_CLKOUT_DIV); | | 756 | const uint32_t m2 = __SHIFTOUT(div_m2_dpll_mpu, TI_AM335X_CM_DIV_M2_DPLL_MPU_DPLL_CLKOUT_DIV); |
754 | /* XXX This ignores CM_CLKSEL_DPLL_MPU[DPLL_REGM4XEN]. */ | | 757 | /* XXX This ignores CM_CLKSEL_DPLL_MPU[DPLL_REGM4XEN]. */ |
755 | curcpu()->ci_data.cpu_cc_freq = ((m * (sys_clk / (n + 1))) / m2); | | 758 | curcpu()->ci_data.cpu_cc_freq = ((m * (sys_clk / (n + 1))) / m2); |
756 | printf("%s: %"PRIu64": sys_clk=%u m=%u n=%u (%u) m2=%u\n", | | 759 | printf("%s: %"PRIu64": sys_clk=%u m=%u n=%u (%u) m2=%u\n", |
757 | __func__, curcpu()->ci_data.cpu_cc_freq, | | 760 | __func__, curcpu()->ci_data.cpu_cc_freq, |
758 | sys_clk, m, n, n+1, m2); | | 761 | sys_clk, m, n, n+1, m2); |
759 | omap_sys_clk = sys_clk; | | 762 | omap_sys_clk = sys_clk; |
760 | } | | 763 | } |
761 | #endif /* TI_AM335X */ | | 764 | #endif /* TI_AM335X */ |
762 | | | 765 | |
763 | #if defined(OMAP_4XXX) || defined(OMAP_5XXX) || defined(TI_AM335X) | | 766 | #if defined(OMAP_4XXX) || defined(OMAP_5XXX) || defined(TI_AM335X) |
764 | static inline uint32_t | | 767 | static inline uint32_t |
765 | emif_read_sdram_config(vaddr_t emif_base) | | 768 | emif_read_sdram_config(vaddr_t emif_base) |
766 | { | | 769 | { |
767 | return *(const volatile uint32_t *)(emif_base + EMIF_SDRAM_CONFIG); | | 770 | return *(const volatile uint32_t *)(emif_base + EMIF_SDRAM_CONFIG); |
768 | } | | 771 | } |
769 | | | 772 | |
770 | static psize_t | | 773 | static psize_t |
771 | emif_memprobe(void) | | 774 | emif_memprobe(void) |
772 | { | | 775 | { |
773 | uint32_t sdram_config = emif_read_sdram_config(OMAP_EMIF1_VBASE); | | 776 | uint32_t sdram_config = emif_read_sdram_config(OMAP_EMIF1_VBASE); |
774 | psize_t memsize = 1L; | | 777 | psize_t memsize = 1L; |
775 | #if defined(TI_AM335X) | | 778 | #if defined(TI_AM335X) |
776 | /* | | 779 | /* |
777 | * The original bbone's u-boot misprograms the EMIF so correct it | | 780 | * The original bbone's u-boot misprograms the EMIF so correct it |
778 | * if we detect if it has the wrong value. | | 781 | * if we detect if it has the wrong value. |
779 | */ | | 782 | */ |
780 | if (sdram_config == 0x41805332) | | 783 | if (sdram_config == 0x41805332) |
781 | sdram_config -= __SHIFTIN(1, SDRAM_CONFIG_RSIZE); | | 784 | sdram_config -= __SHIFTIN(1, SDRAM_CONFIG_RSIZE); |
782 | #endif | | 785 | #endif |
783 | #ifdef OMAP_EMIF2_VBASE | | 786 | #ifdef OMAP_EMIF2_VBASE |
784 | /* | | 787 | /* |
785 | * OMAP4 and OMAP5 have two EMIFs so if the 2nd one is configured | | 788 | * OMAP4 and OMAP5 have two EMIFs so if the 2nd one is configured |
786 | * like the first, we have twice the memory. | | 789 | * like the first, we have twice the memory. |
787 | */ | | 790 | */ |
788 | const uint32_t sdram_config2 = emif_read_sdram_config(OMAP_EMIF2_VBASE); | | 791 | const uint32_t sdram_config2 = emif_read_sdram_config(OMAP_EMIF2_VBASE); |
789 | if (sdram_config2 == sdram_config) | | 792 | if (sdram_config2 == sdram_config) |
790 | memsize <<= 1; | | 793 | memsize <<= 1; |
791 | #endif | | 794 | #endif |
792 | | | 795 | |
793 | const u_int ebank = __SHIFTOUT(sdram_config, SDRAM_CONFIG_EBANK); | | 796 | const u_int ebank = __SHIFTOUT(sdram_config, SDRAM_CONFIG_EBANK); |
794 | const u_int ibank = __SHIFTOUT(sdram_config, SDRAM_CONFIG_IBANK); | | 797 | const u_int ibank = __SHIFTOUT(sdram_config, SDRAM_CONFIG_IBANK); |
795 | const u_int rsize = 9 + __SHIFTOUT(sdram_config, SDRAM_CONFIG_RSIZE); | | 798 | const u_int rsize = 9 + __SHIFTOUT(sdram_config, SDRAM_CONFIG_RSIZE); |
796 | const u_int pagesize = 8 + __SHIFTOUT(sdram_config, SDRAM_CONFIG_PAGESIZE); | | 799 | const u_int pagesize = 8 + __SHIFTOUT(sdram_config, SDRAM_CONFIG_PAGESIZE); |
797 | const u_int width = 2 - __SHIFTOUT(sdram_config, SDRAM_CONFIG_WIDTH); | | 800 | const u_int width = 2 - __SHIFTOUT(sdram_config, SDRAM_CONFIG_WIDTH); |
798 | #ifdef TI_AM335X | | 801 | #ifdef TI_AM335X |
799 | KASSERT(ebank == 0); // No chip selects on Sitara | | 802 | KASSERT(ebank == 0); // No chip selects on Sitara |
800 | #endif | | 803 | #endif |
801 | memsize <<= (ebank + ibank + rsize + pagesize + width); | | 804 | memsize <<= (ebank + ibank + rsize + pagesize + width); |
802 | #ifdef VERBOSE_INIT_ARM | | 805 | #ifdef VERBOSE_INIT_ARM |
803 | printf("sdram_config = %#x, memsize = %uMB\n", sdram_config, | | 806 | printf("sdram_config = %#x, memsize = %uMB\n", sdram_config, |
804 | (u_int)(memsize >> 20)); | | 807 | (u_int)(memsize >> 20)); |
805 | #endif | | 808 | #endif |
806 | return memsize; | | 809 | return memsize; |
807 | } | | 810 | } |
808 | #endif | | 811 | #endif |
809 | | | 812 | |
810 | #if defined(OMAP_3XXX) | | 813 | #if defined(OMAP_3XXX) |
811 | #define SDRC_MCFG(p) (0x80 + (0x30 * (p))) | | 814 | #define SDRC_MCFG(p) (0x80 + (0x30 * (p))) |
812 | #define SDRC_MCFG_MEMSIZE(m) ((((m) & __BITS(8,17)) >> 8) * 2) | | 815 | #define SDRC_MCFG_MEMSIZE(m) ((((m) & __BITS(8,17)) >> 8) * 2) |
813 | static psize_t | | 816 | static psize_t |
814 | omap3_memprobe(void) | | 817 | omap3_memprobe(void) |
815 | { | | 818 | { |
816 | const vaddr_t gpmc_base = OMAP_SDRC_VBASE; | | 819 | const vaddr_t gpmc_base = OMAP_SDRC_VBASE; |
817 | const uint32_t mcfg0 = *(volatile uint32_t *)(gpmc_base + SDRC_MCFG(0)); | | 820 | const uint32_t mcfg0 = *(volatile uint32_t *)(gpmc_base + SDRC_MCFG(0)); |
818 | const uint32_t mcfg1 = *(volatile uint32_t *)(gpmc_base + SDRC_MCFG(1)); | | 821 | const uint32_t mcfg1 = *(volatile uint32_t *)(gpmc_base + SDRC_MCFG(1)); |
819 | | | 822 | |
820 | printf("mcfg0 = %#x, size %lld\n", mcfg0, SDRC_MCFG_MEMSIZE(mcfg0)); | | 823 | printf("mcfg0 = %#x, size %lld\n", mcfg0, SDRC_MCFG_MEMSIZE(mcfg0)); |
821 | printf("mcfg1 = %#x, size %lld\n", mcfg1, SDRC_MCFG_MEMSIZE(mcfg1)); | | 824 | printf("mcfg1 = %#x, size %lld\n", mcfg1, SDRC_MCFG_MEMSIZE(mcfg1)); |
822 | | | 825 | |
823 | return (SDRC_MCFG_MEMSIZE(mcfg0) + SDRC_MCFG_MEMSIZE(mcfg1)) * 1024 * 1024; | | 826 | return (SDRC_MCFG_MEMSIZE(mcfg0) + SDRC_MCFG_MEMSIZE(mcfg1)) * 1024 * 1024; |
824 | } | | 827 | } |
825 | #endif | | 828 | #endif |
826 | | | 829 | |
827 | /* | | 830 | /* |
828 | * EDID can be read from DVI-D (HDMI) port on BeagleBoard from | | 831 | * EDID can be read from DVI-D (HDMI) port on BeagleBoard from |
829 | * If EDID data is present, this function fills in the supplied edid_buf | | 832 | * If EDID data is present, this function fills in the supplied edid_buf |
830 | * and returns true. Otherwise, it returns false and the contents of the | | 833 | * and returns true. Otherwise, it returns false and the contents of the |
831 | * buffer are undefined. | | 834 | * buffer are undefined. |
832 | */ | | 835 | */ |
833 | static bool | | 836 | static bool |
834 | beagle_read_edid(uint8_t *edid_buf, size_t edid_buflen) | | 837 | beagle_read_edid(uint8_t *edid_buf, size_t edid_buflen) |
835 | { | | 838 | { |
836 | #if defined(OMAP_3530) | | 839 | #if defined(OMAP_3530) |
837 | i2c_tag_t ic = NULL; | | 840 | i2c_tag_t ic = NULL; |
838 | uint8_t reg; | | 841 | uint8_t reg; |
839 | int error; | | 842 | int error; |
840 | | | 843 | |
841 | /* On Beagleboard, EDID is accessed using I2C2 ("omapiic2"). */ | | 844 | /* On Beagleboard, EDID is accessed using I2C2 ("omapiic2"). */ |
842 | extern i2c_tag_t omap3_i2c_get_tag(device_t); | | 845 | extern i2c_tag_t omap3_i2c_get_tag(device_t); |
843 | ic = omap3_i2c_get_tag(device_find_by_xname("omapiic2")); | | 846 | ic = omap3_i2c_get_tag(device_find_by_xname("omapiic2")); |
844 | | | 847 | |
845 | if (ic == NULL) | | 848 | if (ic == NULL) |
846 | return false; | | 849 | return false; |
847 | | | 850 | |
848 | iic_acquire_bus(ic, 0); | | 851 | iic_acquire_bus(ic, 0); |
849 | for (reg = DDC_EDID_START; reg < edid_buflen; reg++) { | | 852 | for (reg = DDC_EDID_START; reg < edid_buflen; reg++) { |
850 | error = iic_exec(ic, I2C_OP_READ_WITH_STOP, DDC_ADDR, | | 853 | error = iic_exec(ic, I2C_OP_READ_WITH_STOP, DDC_ADDR, |
851 | ®, sizeof(reg), &edid_buf[reg], 1, 0); | | 854 | ®, sizeof(reg), &edid_buf[reg], 1, 0); |
852 | if (error) | | 855 | if (error) |
853 | break; | | 856 | break; |
854 | } | | 857 | } |
855 | iic_release_bus(ic, 0); | | 858 | iic_release_bus(ic, 0); |
856 | | | 859 | |
857 | return error == 0 ? true : false; | | 860 | return error == 0 ? true : false; |
858 | #else | | 861 | #else |
859 | return false; | | 862 | return false; |
860 | #endif | | 863 | #endif |
861 | } | | 864 | } |
862 | | | 865 | |
863 | void | | 866 | void |
864 | beagle_device_register(device_t self, void *aux) | | 867 | beagle_device_register(device_t self, void *aux) |
865 | { | | 868 | { |
866 | prop_dictionary_t dict = device_properties(self); | | 869 | prop_dictionary_t dict = device_properties(self); |
867 | | | 870 | |
868 | if (device_is_a(self, "armperiph") | | 871 | if (device_is_a(self, "armperiph") |
869 | && device_is_a(device_parent(self), "mainbus")) { | | 872 | && device_is_a(device_parent(self), "mainbus")) { |
870 | /* | | 873 | /* |
871 | * XXX KLUDGE ALERT XXX | | 874 | * XXX KLUDGE ALERT XXX |
872 | * The iot mainbus supplies is completely wrong since it scales | | 875 | * The iot mainbus supplies is completely wrong since it scales |
873 | * addresses by 2. The simpliest remedy is to replace with our | | 876 | * addresses by 2. The simpliest remedy is to replace with our |
874 | * bus space used for the armcore regisers (which armperiph uses). | | 877 | * bus space used for the armcore regisers (which armperiph uses). |
875 | */ | | 878 | */ |
876 | struct mainbus_attach_args * const mb = aux; | | 879 | struct mainbus_attach_args * const mb = aux; |
877 | mb->mb_iot = &omap_bs_tag; | | 880 | mb->mb_iot = &omap_bs_tag; |
878 | return; | | 881 | return; |
879 | } | | 882 | } |
880 | | | 883 | |
881 | /* | | 884 | /* |
882 | * We need to tell the A9 Global/Watchdog Timer | | 885 | * We need to tell the A9 Global/Watchdog Timer |
883 | * what frequency it runs at. | | 886 | * what frequency it runs at. |
884 | */ | | 887 | */ |
885 | if (device_is_a(self, "a9tmr") || device_is_a(self, "a9wdt")) { | | 888 | if (device_is_a(self, "a9tmr") || device_is_a(self, "a9wdt")) { |
886 | /* | | 889 | /* |
887 | * This clock always runs at (arm_clk div 2) and only goes | | 890 | * This clock always runs at (arm_clk div 2) and only goes |
888 | * to timers that are part of the A9 MP core subsystem. | | 891 | * to timers that are part of the A9 MP core subsystem. |
889 | */ | | 892 | */ |
890 | prop_dictionary_set_uint32(dict, "frequency", | | 893 | prop_dictionary_set_uint32(dict, "frequency", |
891 | curcpu()->ci_data.cpu_cc_freq / 2); | | 894 | curcpu()->ci_data.cpu_cc_freq / 2); |
892 | return; | | 895 | return; |
893 | } | | 896 | } |
894 | | | 897 | |
895 | if (device_is_a(self, "ehci")) { | | 898 | if (device_is_a(self, "ehci")) { |
896 | #if defined(OMAP_3530) | | 899 | #if defined(OMAP_3530) |
897 | /* XXX Beagleboard specific port configuration */ | | 900 | /* XXX Beagleboard specific port configuration */ |
898 | prop_dictionary_set_uint16(dict, "nports", 3); | | 901 | prop_dictionary_set_uint16(dict, "nports", 3); |
899 | prop_dictionary_set_cstring(dict, "port0-mode", "none"); | | 902 | prop_dictionary_set_cstring(dict, "port0-mode", "none"); |
900 | prop_dictionary_set_cstring(dict, "port1-mode", "phy"); | | 903 | prop_dictionary_set_cstring(dict, "port1-mode", "phy"); |
901 | prop_dictionary_set_cstring(dict, "port2-mode", "none"); | | 904 | prop_dictionary_set_cstring(dict, "port2-mode", "none"); |
902 | prop_dictionary_set_bool(dict, "phy-reset", true); | | 905 | prop_dictionary_set_bool(dict, "phy-reset", true); |
903 | prop_dictionary_set_int16(dict, "port0-gpio", -1); | | 906 | prop_dictionary_set_int16(dict, "port0-gpio", -1); |
904 | prop_dictionary_set_int16(dict, "port1-gpio", 147); | | 907 | prop_dictionary_set_int16(dict, "port1-gpio", 147); |
905 | prop_dictionary_set_bool(dict, "port1-gpioval", true); | | 908 | prop_dictionary_set_bool(dict, "port1-gpioval", true); |
906 | prop_dictionary_set_int16(dict, "port2-gpio", -1); | | 909 | prop_dictionary_set_int16(dict, "port2-gpio", -1); |
907 | prop_dictionary_set_uint16(dict, "dpll5-m", 443); | | 910 | prop_dictionary_set_uint16(dict, "dpll5-m", 443); |
908 | prop_dictionary_set_uint16(dict, "dpll5-n", 11); | | 911 | prop_dictionary_set_uint16(dict, "dpll5-n", 11); |
909 | prop_dictionary_set_uint16(dict, "dpll5-m2", 4); | | 912 | prop_dictionary_set_uint16(dict, "dpll5-m2", 4); |
910 | #endif | | 913 | #endif |
911 | #if defined(OMAP_4430) | | 914 | #if defined(OMAP_4430) |
912 | prop_dictionary_set_uint16(dict, "nports", 2); | | 915 | prop_dictionary_set_uint16(dict, "nports", 2); |
913 | #if 0 | | 916 | #if 0 |
914 | prop_dictionary_set_bool(dict, "phy-reset", true); | | 917 | prop_dictionary_set_bool(dict, "phy-reset", true); |
915 | #else | | 918 | #else |
916 | prop_dictionary_set_bool(dict, "phy-reset", false); | | 919 | prop_dictionary_set_bool(dict, "phy-reset", false); |
917 | #endif | | 920 | #endif |
918 | prop_dictionary_set_cstring(dict, "port0-mode", "none"); | | 921 | prop_dictionary_set_cstring(dict, "port0-mode", "none"); |
919 | prop_dictionary_set_int16(dict, "port0-gpio", -1); | | 922 | prop_dictionary_set_int16(dict, "port0-gpio", -1); |
920 | #if 0 | | 923 | #if 0 |
921 | prop_dictionary_set_cstring(dict, "port1-mode", "phy"); | | 924 | prop_dictionary_set_cstring(dict, "port1-mode", "phy"); |
922 | #else | | 925 | #else |
923 | prop_dictionary_set_cstring(dict, "port1-mode", "none"); | | 926 | prop_dictionary_set_cstring(dict, "port1-mode", "none"); |
924 | #endif | | 927 | #endif |
925 | prop_dictionary_set_int16(dict, "port1-gpio", 62); | | 928 | prop_dictionary_set_int16(dict, "port1-gpio", 62); |
926 | prop_dictionary_set_bool(dict, "port1-gpioval", true); | | 929 | prop_dictionary_set_bool(dict, "port1-gpioval", true); |
927 | #if 0 | | 930 | #if 0 |
928 | omap2_gpio_ctl(1, GPIO_PIN_OUTPUT); | | 931 | omap2_gpio_ctl(1, GPIO_PIN_OUTPUT); |
929 | omap2_gpio_write(1, 1); // Enable Hub | | 932 | omap2_gpio_write(1, 1); // Enable Hub |
930 | #endif | | 933 | #endif |
931 | #endif | | 934 | #endif |
932 | return; | | 935 | return; |
933 | } | | 936 | } |
934 | | | 937 | |
935 | if (device_is_a(self, "sdhc")) { | | 938 | if (device_is_a(self, "sdhc")) { |
936 | #if defined(OMAP_3430) || defined(OMAP_3530) | | 939 | #if defined(OMAP_3430) || defined(OMAP_3530) |
937 | prop_dictionary_set_uint32(dict, "clkmask", 0); | | 940 | prop_dictionary_set_uint32(dict, "clkmask", 0); |
938 | prop_dictionary_set_bool(dict, "8bit", true); | | 941 | prop_dictionary_set_bool(dict, "8bit", true); |
939 | #endif | | 942 | #endif |
940 | return; | | 943 | return; |
941 | } | | 944 | } |
942 | | | 945 | |
943 | if (device_is_a(self, "omapfb")) { | | 946 | if (device_is_a(self, "omapfb")) { |
944 | if (beagle_read_edid(beagle_edid, sizeof(beagle_edid))) { | | 947 | if (beagle_read_edid(beagle_edid, sizeof(beagle_edid))) { |
945 | prop_dictionary_set(dict, "EDID", | | 948 | prop_dictionary_set(dict, "EDID", |
946 | prop_data_create_data(beagle_edid, | | 949 | prop_data_create_data(beagle_edid, |
947 | sizeof(beagle_edid))); | | 950 | sizeof(beagle_edid))); |
948 | } | | 951 | } |
949 | if (use_fb_console) | | 952 | if (use_fb_console) |
950 | prop_dictionary_set_bool(dict, "is_console", true); | | 953 | prop_dictionary_set_bool(dict, "is_console", true); |
951 | return; | | 954 | return; |
952 | } | | 955 | } |
953 | if (device_is_a(self, "com")) { | | 956 | if (device_is_a(self, "com")) { |
954 | if (use_fb_console) | | 957 | if (use_fb_console) |
955 | prop_dictionary_set_bool(dict, "is_console", false); | | 958 | prop_dictionary_set_bool(dict, "is_console", false); |
956 | } | | 959 | } |
957 | } | | 960 | } |