 @@ -1171,51 +1171,71 @@ static int intel_init_ring_buffer(struct
 		goto err_hws;
+	}
 	ring->obj = obj;
 	ret = i915_gem_object_pin(obj, PAGE_SIZE, true, false);
 	if (ret)
 		goto err_unref;
 	ret = i915_gem_object_set_to_gtt_domain(obj, true);
 	if (ret)
 		goto err_unpin;
 #ifdef __NetBSD__
 	ring->virtual_start_map.offset = (dev_priv->mm.gtt->gma_bus_addr +
 	    obj->gtt_offset);
 	ring->virtual_start_map.size = ring->size;
 	ring->virtual_start_map.flags = 0;
 	ring->virtual_start_map.flags |= _DRM_RESTRICTED;
 	ring->virtual_start_map.flags |= _DRM_KERNEL;
 	ring->virtual_start_map.flags |= _DRM_WRITE_COMBINING;
 	ring->virtual_start_map.flags |= _DRM_DRIVER;
 	ret = drm_ioremap(dev, &ring->virtual_start_map);
 	if (ret) {
 		DRM_ERROR("failed to map ring buffer\n");
 		goto err_unpin;
+	}
 #else
 	ring->virtual_start =
 		ioremap_wc(dev_priv->mm.gtt->gma_bus_addr + obj->gtt_offset,
 			   ring->size);
 	if (ring->virtual_start == NULL) {
 		DRM_ERROR("Failed to map ringbuffer.\n");
 		ret = -EINVAL;
 		goto err_unpin;
+	}
 #endif
 	ret = ring->init(ring);
 	if (ret)
 		goto err_unmap;
 	/* Workaround an erratum on the i830 which causes a hang if
 	 * the TAIL pointer points to within the last 2 cachelines
 	 * of the buffer.
 	 */
 	ring->effective_size = ring->size;
 	if (IS_I830(ring->dev) || IS_845G(ring->dev))
 		ring->effective_size -= 128;
 	return 0;
 err_unmap:
 #ifdef __NetBSD__
 	drm_iounmap(dev, &ring->virtual_start_map);
 #else
 	iounmap(ring->virtual_start);
 #endif
 err_unpin:
 	i915_gem_object_unpin(obj);
 err_unref:
 	drm_gem_object_unreference(&obj->base);
 	ring->obj = NULL;
 err_hws:
 	cleanup_status_page(ring);
 	return ret;
+}
 void intel_cleanup_ring_buffer(struct intel_ring_buffer *ring)
+{
 	struct drm_i915_private *dev_priv;
 @@ -1223,27 +1243,31 @@ void intel_cleanup_ring_buffer(struct in
 	if (ring->obj == NULL)
 		return;
 	/* Disable the ring buffer. The ring must be idle at this point */
 	dev_priv = ring->dev->dev_private;
 	ret = intel_ring_idle(ring);
 	if (ret)
 		DRM_ERROR("failed to quiesce %s whilst cleaning up: %d\n",
 			  ring->name, ret);
 	I915_WRITE_CTL(ring, 0);
 #ifdef __NetBSD__
 	drm_iounmap(dev, &ring->virtual_start_map);
 #else
 	iounmap(ring->virtual_start);
 #endif
 	i915_gem_object_unpin(ring->obj);
 	drm_gem_object_unreference(&ring->obj->base);
 	ring->obj = NULL;
 	if (ring->cleanup)
 		ring->cleanup(ring);
 	cleanup_status_page(ring);
+}
 static int intel_ring_wait_seqno(struct intel_ring_buffer *ring, u32 seqno)
+{
 @@ -1712,32 +1736,48 @@ int intel_render_ring_init_dri(struct dr
 		ring->dispatch_execbuffer = i915_dispatch_execbuffer;
 	ring->init = init_render_ring;
 	ring->cleanup = render_ring_cleanup;
 	ring->dev = dev;
 	INIT_LIST_HEAD(&ring->active_list);
 	INIT_LIST_HEAD(&ring->request_list);
 	ring->size = size;
 	ring->effective_size = ring->size;
 	if (IS_I830(ring->dev) || IS_845G(ring->dev))
 		ring->effective_size -= 128;
 #ifdef __NetBSD__
 	ring->virtual_start_map.offset = start;
 	ring->virtual_start_map.size = size;
 	ring->virtual_start_map.type = _DRM_REGISTERS;
 	ring->virtual_start_map.flags = 0;
 	ring->virtual_start_map.flags |= _DRM_RESTRICTED;
 	ring->virtual_start_map.flags |= _DRM_KERNEL;
 	ring->virtual_start_map.flags |= _DRM_WRITE_COMBINING;
 	ring->virtual_start_map.flags |= _DRM_DRIVER;
 	ret = drm_ioremap(dev, &ring->virtual_start_map);
 	if (ret) {
 		DRM_ERROR("cannot ioremap virtual address for ring buffer\n");
 		return ret;
+	}
 #else
 	ring->virtual_start = ioremap_wc(start, size);
 	if (ring->virtual_start == NULL) {
 		DRM_ERROR("can not ioremap virtual address for"
 			  " ring buffer\n");
 		return -ENOMEM;
+	}
 #endif
 	if (!I915_NEED_GFX_HWS(dev)) {
 		ret = init_phys_hws_pga(ring);
 		if (ret)
 			return ret;
+	}
 	return 0;
+}
 int intel_init_bsd_ring_buffer(struct drm_device *dev)
+{
 	drm_i915_private_t *dev_priv = dev->dev_private;

 @@ -38,27 +38,31 @@ struct  intel_hw_status_page {
 #define I915_READ_NOPID(ring) I915_READ(RING_NOPID((ring)->mmio_base))
 #define I915_READ_SYNC_0(ring) I915_READ(RING_SYNC_0((ring)->mmio_base))
 #define I915_READ_SYNC_1(ring) I915_READ(RING_SYNC_1((ring)->mmio_base))
 struct  intel_ring_buffer {
 	const char	*name;
 	enum intel_ring_id {
 		RCS = 0x0,
 		VCS,
 		BCS,
 	} id;
 #define I915_NUM_RINGS 3
 	u32		mmio_base;
 #ifdef __NetBSD__
 	struct drm_local_map	virtual_start_map;
 #else
 	void		__iomem *virtual_start;
 #endif
 	struct		drm_device *dev;
 	struct		drm_i915_gem_object *obj;
 	u32		head;
 	u32		tail;
 	int		space;
 	int		size;
 	int		effective_size;
 	struct intel_hw_status_page status_page;
 	/** We track the position of the requests in the ring buffer, and
 	 * when each is retired we increment last_retired_head as the GPU
 	 * must have finished processing the request and so we know we
 @@ -195,27 +199,31 @@ intel_read_status_page(struct intel_ring
+ *
  * The area from dword 0x20 to 0x3ff is available for driver usage.
  */
 #define I915_GEM_HWS_INDEX		0x20
 #define I915_GEM_HWS_SCRATCH_INDEX	0x30
 #define I915_GEM_HWS_SCRATCH_ADDR (I915_GEM_HWS_SCRATCH_INDEX << MI_STORE_DWORD_INDEX_SHIFT)
 void intel_cleanup_ring_buffer(struct intel_ring_buffer *ring);
 int __must_check intel_ring_begin(struct intel_ring_buffer *ring, int n);
 static inline void intel_ring_emit(struct intel_ring_buffer *ring,
 				   u32 data)
+{
 #ifdef __NetBSD__
 	DRM_WRITE32(&ring->virtual_start_map, ring->tail, data);
 #else
 	iowrite32(data, ring->virtual_start + ring->tail);
 #endif
 	ring->tail += 4;
+}
 void intel_ring_advance(struct intel_ring_buffer *ring);
 int __must_check intel_ring_idle(struct intel_ring_buffer *ring);
 int intel_ring_flush_all_caches(struct intel_ring_buffer *ring);
 int intel_ring_invalidate_all_caches(struct intel_ring_buffer *ring);
 int intel_init_render_ring_buffer(struct drm_device *dev);
 int intel_init_bsd_ring_buffer(struct drm_device *dev);
 int intel_init_blt_ring_buffer(struct drm_device *dev);
 u32 intel_ring_get_active_head(struct intel_ring_buffer *ring);