| @@ -1,809 +1,813 @@ | | | @@ -1,809 +1,813 @@ |
1 | /* | | 1 | /* |
2 | * Copyright © 2006-2007 Intel Corporation | | 2 | * Copyright © 2006-2007 Intel Corporation |
3 | * | | 3 | * |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | | 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
5 | * copy of this software and associated documentation files (the "Software"), | | 5 | * copy of this software and associated documentation files (the "Software"), |
6 | * to deal in the Software without restriction, including without limitation | | 6 | * to deal in the Software without restriction, including without limitation |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | | 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
8 | * and/or sell copies of the Software, and to permit persons to whom the | | 8 | * and/or sell copies of the Software, and to permit persons to whom the |
9 | * Software is furnished to do so, subject to the following conditions: | | 9 | * Software is furnished to do so, subject to the following conditions: |
10 | * | | 10 | * |
11 | * The above copyright notice and this permission notice (including the next | | 11 | * The above copyright notice and this permission notice (including the next |
12 | * paragraph) shall be included in all copies or substantial portions of the | | 12 | * paragraph) shall be included in all copies or substantial portions of the |
13 | * Software. | | 13 | * Software. |
14 | * | | 14 | * |
15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | | 15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | | 16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | | 17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | | 18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | | 19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
20 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | | 20 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER |
21 | * DEALINGS IN THE SOFTWARE. | | 21 | * DEALINGS IN THE SOFTWARE. |
22 | * | | 22 | * |
23 | * Authors: | | 23 | * Authors: |
24 | * Eric Anholt <eric@anholt.net> | | 24 | * Eric Anholt <eric@anholt.net> |
25 | */ | | 25 | */ |
26 | | | 26 | |
27 | #include <linux/dmi.h> | | 27 | #include <linux/dmi.h> |
28 | #include <linux/i2c.h> | | 28 | #include <linux/i2c.h> |
29 | #include <linux/slab.h> | | 29 | #include <linux/slab.h> |
30 | #include <drm/drmP.h> | | 30 | #include <drm/drmP.h> |
31 | #include <drm/drm_crtc.h> | | 31 | #include <drm/drm_crtc.h> |
32 | #include <drm/drm_crtc_helper.h> | | 32 | #include <drm/drm_crtc_helper.h> |
33 | #include <drm/drm_edid.h> | | 33 | #include <drm/drm_edid.h> |
34 | #include "intel_drv.h" | | 34 | #include "intel_drv.h" |
35 | #include <drm/i915_drm.h> | | 35 | #include <drm/i915_drm.h> |
36 | #include "i915_drv.h" | | 36 | #include "i915_drv.h" |
37 | | | 37 | |
38 | /* Here's the desired hotplug mode */ | | 38 | /* Here's the desired hotplug mode */ |
39 | #define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_PERIOD_128 | \ | | 39 | #define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_PERIOD_128 | \ |
40 | ADPA_CRT_HOTPLUG_WARMUP_10MS | \ | | 40 | ADPA_CRT_HOTPLUG_WARMUP_10MS | \ |
41 | ADPA_CRT_HOTPLUG_SAMPLE_4S | \ | | 41 | ADPA_CRT_HOTPLUG_SAMPLE_4S | \ |
42 | ADPA_CRT_HOTPLUG_VOLTAGE_50 | \ | | 42 | ADPA_CRT_HOTPLUG_VOLTAGE_50 | \ |
43 | ADPA_CRT_HOTPLUG_VOLREF_325MV | \ | | 43 | ADPA_CRT_HOTPLUG_VOLREF_325MV | \ |
44 | ADPA_CRT_HOTPLUG_ENABLE) | | 44 | ADPA_CRT_HOTPLUG_ENABLE) |
45 | | | 45 | |
46 | struct intel_crt { | | 46 | struct intel_crt { |
47 | struct intel_encoder base; | | 47 | struct intel_encoder base; |
48 | bool force_hotplug_required; | | 48 | bool force_hotplug_required; |
49 | u32 adpa_reg; | | 49 | u32 adpa_reg; |
50 | }; | | 50 | }; |
51 | | | 51 | |
52 | static struct intel_crt *intel_attached_crt(struct drm_connector *connector) | | 52 | static struct intel_crt *intel_attached_crt(struct drm_connector *connector) |
53 | { | | 53 | { |
54 | return container_of(intel_attached_encoder(connector), | | 54 | return container_of(intel_attached_encoder(connector), |
55 | struct intel_crt, base); | | 55 | struct intel_crt, base); |
56 | } | | 56 | } |
57 | | | 57 | |
58 | static struct intel_crt *intel_encoder_to_crt(struct intel_encoder *encoder) | | 58 | static struct intel_crt *intel_encoder_to_crt(struct intel_encoder *encoder) |
59 | { | | 59 | { |
60 | return container_of(encoder, struct intel_crt, base); | | 60 | return container_of(encoder, struct intel_crt, base); |
61 | } | | 61 | } |
62 | | | 62 | |
63 | static bool intel_crt_get_hw_state(struct intel_encoder *encoder, | | 63 | static bool intel_crt_get_hw_state(struct intel_encoder *encoder, |
64 | enum pipe *pipe) | | 64 | enum pipe *pipe) |
65 | { | | 65 | { |
66 | struct drm_device *dev = encoder->base.dev; | | 66 | struct drm_device *dev = encoder->base.dev; |
67 | struct drm_i915_private *dev_priv = dev->dev_private; | | 67 | struct drm_i915_private *dev_priv = dev->dev_private; |
68 | struct intel_crt *crt = intel_encoder_to_crt(encoder); | | 68 | struct intel_crt *crt = intel_encoder_to_crt(encoder); |
69 | u32 tmp; | | 69 | u32 tmp; |
70 | | | 70 | |
71 | tmp = I915_READ(crt->adpa_reg); | | 71 | tmp = I915_READ(crt->adpa_reg); |
72 | | | 72 | |
73 | if (!(tmp & ADPA_DAC_ENABLE)) | | 73 | if (!(tmp & ADPA_DAC_ENABLE)) |
74 | return false; | | 74 | return false; |
75 | | | 75 | |
76 | if (HAS_PCH_CPT(dev)) | | 76 | if (HAS_PCH_CPT(dev)) |
77 | *pipe = PORT_TO_PIPE_CPT(tmp); | | 77 | *pipe = PORT_TO_PIPE_CPT(tmp); |
78 | else | | 78 | else |
79 | *pipe = PORT_TO_PIPE(tmp); | | 79 | *pipe = PORT_TO_PIPE(tmp); |
80 | | | 80 | |
81 | return true; | | 81 | return true; |
82 | } | | 82 | } |
83 | | | 83 | |
84 | static void intel_disable_crt(struct intel_encoder *encoder) | | 84 | static void intel_disable_crt(struct intel_encoder *encoder) |
85 | { | | 85 | { |
86 | struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; | | 86 | struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; |
87 | struct intel_crt *crt = intel_encoder_to_crt(encoder); | | 87 | struct intel_crt *crt = intel_encoder_to_crt(encoder); |
88 | u32 temp; | | 88 | u32 temp; |
89 | | | 89 | |
90 | temp = I915_READ(crt->adpa_reg); | | 90 | temp = I915_READ(crt->adpa_reg); |
91 | temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE); | | 91 | temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE); |
92 | temp &= ~ADPA_DAC_ENABLE; | | 92 | temp &= ~ADPA_DAC_ENABLE; |
93 | I915_WRITE(crt->adpa_reg, temp); | | 93 | I915_WRITE(crt->adpa_reg, temp); |
94 | } | | 94 | } |
95 | | | 95 | |
96 | static void intel_enable_crt(struct intel_encoder *encoder) | | 96 | static void intel_enable_crt(struct intel_encoder *encoder) |
97 | { | | 97 | { |
98 | struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; | | 98 | struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; |
99 | struct intel_crt *crt = intel_encoder_to_crt(encoder); | | 99 | struct intel_crt *crt = intel_encoder_to_crt(encoder); |
100 | u32 temp; | | 100 | u32 temp; |
101 | | | 101 | |
102 | temp = I915_READ(crt->adpa_reg); | | 102 | temp = I915_READ(crt->adpa_reg); |
103 | temp |= ADPA_DAC_ENABLE; | | 103 | temp |= ADPA_DAC_ENABLE; |
104 | I915_WRITE(crt->adpa_reg, temp); | | 104 | I915_WRITE(crt->adpa_reg, temp); |
105 | } | | 105 | } |
106 | | | 106 | |
107 | /* Note: The caller is required to filter out dpms modes not supported by the | | 107 | /* Note: The caller is required to filter out dpms modes not supported by the |
108 | * platform. */ | | 108 | * platform. */ |
109 | static void intel_crt_set_dpms(struct intel_encoder *encoder, int mode) | | 109 | static void intel_crt_set_dpms(struct intel_encoder *encoder, int mode) |
110 | { | | 110 | { |
111 | struct drm_device *dev = encoder->base.dev; | | 111 | struct drm_device *dev = encoder->base.dev; |
112 | struct drm_i915_private *dev_priv = dev->dev_private; | | 112 | struct drm_i915_private *dev_priv = dev->dev_private; |
113 | struct intel_crt *crt = intel_encoder_to_crt(encoder); | | 113 | struct intel_crt *crt = intel_encoder_to_crt(encoder); |
114 | u32 temp; | | 114 | u32 temp; |
115 | | | 115 | |
116 | temp = I915_READ(crt->adpa_reg); | | 116 | temp = I915_READ(crt->adpa_reg); |
117 | temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE); | | 117 | temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE); |
118 | temp &= ~ADPA_DAC_ENABLE; | | 118 | temp &= ~ADPA_DAC_ENABLE; |
119 | | | 119 | |
120 | switch (mode) { | | 120 | switch (mode) { |
121 | case DRM_MODE_DPMS_ON: | | 121 | case DRM_MODE_DPMS_ON: |
122 | temp |= ADPA_DAC_ENABLE; | | 122 | temp |= ADPA_DAC_ENABLE; |
123 | break; | | 123 | break; |
124 | case DRM_MODE_DPMS_STANDBY: | | 124 | case DRM_MODE_DPMS_STANDBY: |
125 | temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE; | | 125 | temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE; |
126 | break; | | 126 | break; |
127 | case DRM_MODE_DPMS_SUSPEND: | | 127 | case DRM_MODE_DPMS_SUSPEND: |
128 | temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE; | | 128 | temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE; |
129 | break; | | 129 | break; |
130 | case DRM_MODE_DPMS_OFF: | | 130 | case DRM_MODE_DPMS_OFF: |
131 | temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE; | | 131 | temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE; |
132 | break; | | 132 | break; |
133 | } | | 133 | } |
134 | | | 134 | |
135 | I915_WRITE(crt->adpa_reg, temp); | | 135 | I915_WRITE(crt->adpa_reg, temp); |
136 | } | | 136 | } |
137 | | | 137 | |
138 | static void intel_crt_dpms(struct drm_connector *connector, int mode) | | 138 | static void intel_crt_dpms(struct drm_connector *connector, int mode) |
139 | { | | 139 | { |
140 | struct drm_device *dev = connector->dev; | | 140 | struct drm_device *dev = connector->dev; |
141 | struct intel_encoder *encoder = intel_attached_encoder(connector); | | 141 | struct intel_encoder *encoder = intel_attached_encoder(connector); |
142 | struct drm_crtc *crtc; | | 142 | struct drm_crtc *crtc; |
143 | int old_dpms; | | 143 | int old_dpms; |
144 | | | 144 | |
145 | /* PCH platforms and VLV only support on/off. */ | | 145 | /* PCH platforms and VLV only support on/off. */ |
146 | if (INTEL_INFO(dev)->gen >= 5 && mode != DRM_MODE_DPMS_ON) | | 146 | if (INTEL_INFO(dev)->gen >= 5 && mode != DRM_MODE_DPMS_ON) |
147 | mode = DRM_MODE_DPMS_OFF; | | 147 | mode = DRM_MODE_DPMS_OFF; |
148 | | | 148 | |
149 | if (mode == connector->dpms) | | 149 | if (mode == connector->dpms) |
150 | return; | | 150 | return; |
151 | | | 151 | |
152 | old_dpms = connector->dpms; | | 152 | old_dpms = connector->dpms; |
153 | connector->dpms = mode; | | 153 | connector->dpms = mode; |
154 | | | 154 | |
155 | /* Only need to change hw state when actually enabled */ | | 155 | /* Only need to change hw state when actually enabled */ |
156 | crtc = encoder->base.crtc; | | 156 | crtc = encoder->base.crtc; |
157 | if (!crtc) { | | 157 | if (!crtc) { |
158 | encoder->connectors_active = false; | | 158 | encoder->connectors_active = false; |
159 | return; | | 159 | return; |
160 | } | | 160 | } |
161 | | | 161 | |
162 | /* We need the pipe to run for anything but OFF. */ | | 162 | /* We need the pipe to run for anything but OFF. */ |
163 | if (mode == DRM_MODE_DPMS_OFF) | | 163 | if (mode == DRM_MODE_DPMS_OFF) |
164 | encoder->connectors_active = false; | | 164 | encoder->connectors_active = false; |
165 | else | | 165 | else |
166 | encoder->connectors_active = true; | | 166 | encoder->connectors_active = true; |
167 | | | 167 | |
168 | if (mode < old_dpms) { | | 168 | if (mode < old_dpms) { |
169 | /* From off to on, enable the pipe first. */ | | 169 | /* From off to on, enable the pipe first. */ |
170 | intel_crtc_update_dpms(crtc); | | 170 | intel_crtc_update_dpms(crtc); |
171 | | | 171 | |
172 | intel_crt_set_dpms(encoder, mode); | | 172 | intel_crt_set_dpms(encoder, mode); |
173 | } else { | | 173 | } else { |
174 | intel_crt_set_dpms(encoder, mode); | | 174 | intel_crt_set_dpms(encoder, mode); |
175 | | | 175 | |
176 | intel_crtc_update_dpms(crtc); | | 176 | intel_crtc_update_dpms(crtc); |
177 | } | | 177 | } |
178 | | | 178 | |
179 | intel_modeset_check_state(connector->dev); | | 179 | intel_modeset_check_state(connector->dev); |
180 | } | | 180 | } |
181 | | | 181 | |
182 | static int intel_crt_mode_valid(struct drm_connector *connector, | | 182 | static int intel_crt_mode_valid(struct drm_connector *connector, |
183 | struct drm_display_mode *mode) | | 183 | struct drm_display_mode *mode) |
184 | { | | 184 | { |
185 | struct drm_device *dev = connector->dev; | | 185 | struct drm_device *dev = connector->dev; |
186 | | | 186 | |
187 | int max_clock = 0; | | 187 | int max_clock = 0; |
188 | if (mode->flags & DRM_MODE_FLAG_DBLSCAN) | | 188 | if (mode->flags & DRM_MODE_FLAG_DBLSCAN) |
189 | return MODE_NO_DBLESCAN; | | 189 | return MODE_NO_DBLESCAN; |
190 | | | 190 | |
191 | if (mode->clock < 25000) | | 191 | if (mode->clock < 25000) |
192 | return MODE_CLOCK_LOW; | | 192 | return MODE_CLOCK_LOW; |
193 | | | 193 | |
194 | if (IS_GEN2(dev)) | | 194 | if (IS_GEN2(dev)) |
195 | max_clock = 350000; | | 195 | max_clock = 350000; |
196 | else | | 196 | else |
197 | max_clock = 400000; | | 197 | max_clock = 400000; |
198 | if (mode->clock > max_clock) | | 198 | if (mode->clock > max_clock) |
199 | return MODE_CLOCK_HIGH; | | 199 | return MODE_CLOCK_HIGH; |
200 | | | 200 | |
201 | /* The FDI receiver on LPT only supports 8bpc and only has 2 lanes. */ | | 201 | /* The FDI receiver on LPT only supports 8bpc and only has 2 lanes. */ |
202 | if (HAS_PCH_LPT(dev) && | | 202 | if (HAS_PCH_LPT(dev) && |
203 | (ironlake_get_lanes_required(mode->clock, 270000, 24) > 2)) | | 203 | (ironlake_get_lanes_required(mode->clock, 270000, 24) > 2)) |
204 | return MODE_CLOCK_HIGH; | | 204 | return MODE_CLOCK_HIGH; |
205 | | | 205 | |
206 | return MODE_OK; | | 206 | return MODE_OK; |
207 | } | | 207 | } |
208 | | | 208 | |
209 | static bool intel_crt_mode_fixup(struct drm_encoder *encoder, | | 209 | static bool intel_crt_mode_fixup(struct drm_encoder *encoder, |
210 | const struct drm_display_mode *mode, | | 210 | const struct drm_display_mode *mode, |
211 | struct drm_display_mode *adjusted_mode) | | 211 | struct drm_display_mode *adjusted_mode) |
212 | { | | 212 | { |
213 | return true; | | 213 | return true; |
214 | } | | 214 | } |
215 | | | 215 | |
216 | static void intel_crt_mode_set(struct drm_encoder *encoder, | | 216 | static void intel_crt_mode_set(struct drm_encoder *encoder, |
217 | struct drm_display_mode *mode, | | 217 | struct drm_display_mode *mode, |
218 | struct drm_display_mode *adjusted_mode) | | 218 | struct drm_display_mode *adjusted_mode) |
219 | { | | 219 | { |
220 | | | 220 | |
221 | struct drm_device *dev = encoder->dev; | | 221 | struct drm_device *dev = encoder->dev; |
222 | struct drm_crtc *crtc = encoder->crtc; | | 222 | struct drm_crtc *crtc = encoder->crtc; |
223 | struct intel_crt *crt = | | 223 | struct intel_crt *crt = |
224 | intel_encoder_to_crt(to_intel_encoder(encoder)); | | 224 | intel_encoder_to_crt(to_intel_encoder(encoder)); |
225 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); | | 225 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); |
226 | struct drm_i915_private *dev_priv = dev->dev_private; | | 226 | struct drm_i915_private *dev_priv = dev->dev_private; |
227 | u32 adpa; | | 227 | u32 adpa; |
228 | | | 228 | |
229 | if (HAS_PCH_SPLIT(dev)) | | 229 | if (HAS_PCH_SPLIT(dev)) |
230 | adpa = ADPA_HOTPLUG_BITS; | | 230 | adpa = ADPA_HOTPLUG_BITS; |
231 | else | | 231 | else |
232 | adpa = 0; | | 232 | adpa = 0; |
233 | | | 233 | |
234 | if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC) | | 234 | if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC) |
235 | adpa |= ADPA_HSYNC_ACTIVE_HIGH; | | 235 | adpa |= ADPA_HSYNC_ACTIVE_HIGH; |
236 | if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC) | | 236 | if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC) |
237 | adpa |= ADPA_VSYNC_ACTIVE_HIGH; | | 237 | adpa |= ADPA_VSYNC_ACTIVE_HIGH; |
238 | | | 238 | |
239 | /* For CPT allow 3 pipe config, for others just use A or B */ | | 239 | /* For CPT allow 3 pipe config, for others just use A or B */ |
240 | if (HAS_PCH_LPT(dev)) | | 240 | if (HAS_PCH_LPT(dev)) |
241 | ; /* Those bits don't exist here */ | | 241 | ; /* Those bits don't exist here */ |
242 | else if (HAS_PCH_CPT(dev)) | | 242 | else if (HAS_PCH_CPT(dev)) |
243 | adpa |= PORT_TRANS_SEL_CPT(intel_crtc->pipe); | | 243 | adpa |= PORT_TRANS_SEL_CPT(intel_crtc->pipe); |
244 | else if (intel_crtc->pipe == 0) | | 244 | else if (intel_crtc->pipe == 0) |
245 | adpa |= ADPA_PIPE_A_SELECT; | | 245 | adpa |= ADPA_PIPE_A_SELECT; |
246 | else | | 246 | else |
247 | adpa |= ADPA_PIPE_B_SELECT; | | 247 | adpa |= ADPA_PIPE_B_SELECT; |
248 | | | 248 | |
249 | if (!HAS_PCH_SPLIT(dev)) | | 249 | if (!HAS_PCH_SPLIT(dev)) |
250 | I915_WRITE(BCLRPAT(intel_crtc->pipe), 0); | | 250 | I915_WRITE(BCLRPAT(intel_crtc->pipe), 0); |
251 | | | 251 | |
252 | I915_WRITE(crt->adpa_reg, adpa); | | 252 | I915_WRITE(crt->adpa_reg, adpa); |
253 | } | | 253 | } |
254 | | | 254 | |
255 | static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector) | | 255 | static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector) |
256 | { | | 256 | { |
257 | struct drm_device *dev = connector->dev; | | 257 | struct drm_device *dev = connector->dev; |
258 | struct intel_crt *crt = intel_attached_crt(connector); | | 258 | struct intel_crt *crt = intel_attached_crt(connector); |
259 | struct drm_i915_private *dev_priv = dev->dev_private; | | 259 | struct drm_i915_private *dev_priv = dev->dev_private; |
260 | u32 adpa; | | 260 | u32 adpa; |
261 | bool ret; | | 261 | bool ret; |
262 | | | 262 | |
263 | /* The first time through, trigger an explicit detection cycle */ | | 263 | /* The first time through, trigger an explicit detection cycle */ |
264 | if (crt->force_hotplug_required) { | | 264 | if (crt->force_hotplug_required) { |
265 | bool turn_off_dac = HAS_PCH_SPLIT(dev); | | 265 | bool turn_off_dac = HAS_PCH_SPLIT(dev); |
266 | u32 save_adpa; | | 266 | u32 save_adpa; |
267 | | | 267 | |
268 | crt->force_hotplug_required = 0; | | 268 | crt->force_hotplug_required = 0; |
269 | | | 269 | |
270 | save_adpa = adpa = I915_READ(PCH_ADPA); | | 270 | save_adpa = adpa = I915_READ(PCH_ADPA); |
271 | DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa); | | 271 | DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa); |
272 | | | 272 | |
273 | adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER; | | 273 | adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER; |
274 | if (turn_off_dac) | | 274 | if (turn_off_dac) |
275 | adpa &= ~ADPA_DAC_ENABLE; | | 275 | adpa &= ~ADPA_DAC_ENABLE; |
276 | | | 276 | |
277 | I915_WRITE(PCH_ADPA, adpa); | | 277 | I915_WRITE(PCH_ADPA, adpa); |
278 | | | 278 | |
279 | if (wait_for((I915_READ(PCH_ADPA) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0, | | 279 | if (wait_for((I915_READ(PCH_ADPA) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0, |
280 | 1000)) | | 280 | 1000)) |
281 | DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER"); | | 281 | DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER"); |
282 | | | 282 | |
283 | if (turn_off_dac) { | | 283 | if (turn_off_dac) { |
284 | I915_WRITE(PCH_ADPA, save_adpa); | | 284 | I915_WRITE(PCH_ADPA, save_adpa); |
285 | POSTING_READ(PCH_ADPA); | | 285 | POSTING_READ(PCH_ADPA); |
286 | } | | 286 | } |
287 | } | | 287 | } |
288 | | | 288 | |
289 | /* Check the status to see if both blue and green are on now */ | | 289 | /* Check the status to see if both blue and green are on now */ |
290 | adpa = I915_READ(PCH_ADPA); | | 290 | adpa = I915_READ(PCH_ADPA); |
291 | if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0) | | 291 | if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0) |
292 | ret = true; | | 292 | ret = true; |
293 | else | | 293 | else |
294 | ret = false; | | 294 | ret = false; |
295 | DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa, ret); | | 295 | DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa, ret); |
296 | | | 296 | |
297 | return ret; | | 297 | return ret; |
298 | } | | 298 | } |
299 | | | 299 | |
300 | static bool valleyview_crt_detect_hotplug(struct drm_connector *connector) | | 300 | static bool valleyview_crt_detect_hotplug(struct drm_connector *connector) |
301 | { | | 301 | { |
302 | struct drm_device *dev = connector->dev; | | 302 | struct drm_device *dev = connector->dev; |
303 | struct drm_i915_private *dev_priv = dev->dev_private; | | 303 | struct drm_i915_private *dev_priv = dev->dev_private; |
304 | u32 adpa; | | 304 | u32 adpa; |
305 | bool ret; | | 305 | bool ret; |
306 | u32 save_adpa; | | 306 | u32 save_adpa; |
307 | | | 307 | |
308 | save_adpa = adpa = I915_READ(ADPA); | | 308 | save_adpa = adpa = I915_READ(ADPA); |
309 | DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa); | | 309 | DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa); |
310 | | | 310 | |
311 | adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER; | | 311 | adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER; |
312 | | | 312 | |
313 | I915_WRITE(ADPA, adpa); | | 313 | I915_WRITE(ADPA, adpa); |
314 | | | 314 | |
315 | if (wait_for((I915_READ(ADPA) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0, | | 315 | if (wait_for((I915_READ(ADPA) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0, |
316 | 1000)) { | | 316 | 1000)) { |
317 | DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER"); | | 317 | DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER"); |
318 | I915_WRITE(ADPA, save_adpa); | | 318 | I915_WRITE(ADPA, save_adpa); |
319 | } | | 319 | } |
320 | | | 320 | |
321 | /* Check the status to see if both blue and green are on now */ | | 321 | /* Check the status to see if both blue and green are on now */ |
322 | adpa = I915_READ(ADPA); | | 322 | adpa = I915_READ(ADPA); |
323 | if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0) | | 323 | if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0) |
324 | ret = true; | | 324 | ret = true; |
325 | else | | 325 | else |
326 | ret = false; | | 326 | ret = false; |
327 | | | 327 | |
328 | DRM_DEBUG_KMS("valleyview hotplug adpa=0x%x, result %d\n", adpa, ret); | | 328 | DRM_DEBUG_KMS("valleyview hotplug adpa=0x%x, result %d\n", adpa, ret); |
329 | | | 329 | |
330 | /* FIXME: debug force function and remove */ | | 330 | /* FIXME: debug force function and remove */ |
331 | ret = true; | | 331 | ret = true; |
332 | | | 332 | |
333 | return ret; | | 333 | return ret; |
334 | } | | 334 | } |
335 | | | 335 | |
336 | /** | | 336 | /** |
337 | * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence. | | 337 | * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence. |
338 | * | | 338 | * |
339 | * Not for i915G/i915GM | | 339 | * Not for i915G/i915GM |
340 | * | | 340 | * |
341 | * \return true if CRT is connected. | | 341 | * \return true if CRT is connected. |
342 | * \return false if CRT is disconnected. | | 342 | * \return false if CRT is disconnected. |
343 | */ | | 343 | */ |
344 | static bool intel_crt_detect_hotplug(struct drm_connector *connector) | | 344 | static bool intel_crt_detect_hotplug(struct drm_connector *connector) |
345 | { | | 345 | { |
346 | struct drm_device *dev = connector->dev; | | 346 | struct drm_device *dev = connector->dev; |
347 | struct drm_i915_private *dev_priv = dev->dev_private; | | 347 | struct drm_i915_private *dev_priv = dev->dev_private; |
348 | u32 hotplug_en, orig, stat; | | 348 | u32 hotplug_en, orig, stat; |
349 | bool ret = false; | | 349 | bool ret = false; |
350 | int i, tries = 0; | | 350 | int i, tries = 0; |
351 | | | 351 | |
352 | if (HAS_PCH_SPLIT(dev)) | | 352 | if (HAS_PCH_SPLIT(dev)) |
353 | return intel_ironlake_crt_detect_hotplug(connector); | | 353 | return intel_ironlake_crt_detect_hotplug(connector); |
354 | | | 354 | |
355 | if (IS_VALLEYVIEW(dev)) | | 355 | if (IS_VALLEYVIEW(dev)) |
356 | return valleyview_crt_detect_hotplug(connector); | | 356 | return valleyview_crt_detect_hotplug(connector); |
357 | | | 357 | |
358 | /* | | 358 | /* |
359 | * On 4 series desktop, CRT detect sequence need to be done twice | | 359 | * On 4 series desktop, CRT detect sequence need to be done twice |
360 | * to get a reliable result. | | 360 | * to get a reliable result. |
361 | */ | | 361 | */ |
362 | | | 362 | |
363 | if (IS_G4X(dev) && !IS_GM45(dev)) | | 363 | if (IS_G4X(dev) && !IS_GM45(dev)) |
364 | tries = 2; | | 364 | tries = 2; |
365 | else | | 365 | else |
366 | tries = 1; | | 366 | tries = 1; |
367 | hotplug_en = orig = I915_READ(PORT_HOTPLUG_EN); | | 367 | hotplug_en = orig = I915_READ(PORT_HOTPLUG_EN); |
368 | hotplug_en |= CRT_HOTPLUG_FORCE_DETECT; | | 368 | hotplug_en |= CRT_HOTPLUG_FORCE_DETECT; |
369 | | | 369 | |
370 | for (i = 0; i < tries ; i++) { | | 370 | for (i = 0; i < tries ; i++) { |
371 | /* turn on the FORCE_DETECT */ | | 371 | /* turn on the FORCE_DETECT */ |
372 | I915_WRITE(PORT_HOTPLUG_EN, hotplug_en); | | 372 | I915_WRITE(PORT_HOTPLUG_EN, hotplug_en); |
373 | /* wait for FORCE_DETECT to go off */ | | 373 | /* wait for FORCE_DETECT to go off */ |
374 | if (wait_for((I915_READ(PORT_HOTPLUG_EN) & | | 374 | if (wait_for((I915_READ(PORT_HOTPLUG_EN) & |
375 | CRT_HOTPLUG_FORCE_DETECT) == 0, | | 375 | CRT_HOTPLUG_FORCE_DETECT) == 0, |
376 | 1000)) | | 376 | 1000)) |
377 | DRM_DEBUG_KMS("timed out waiting for FORCE_DETECT to go off"); | | 377 | DRM_DEBUG_KMS("timed out waiting for FORCE_DETECT to go off"); |
378 | } | | 378 | } |
379 | | | 379 | |
380 | stat = I915_READ(PORT_HOTPLUG_STAT); | | 380 | stat = I915_READ(PORT_HOTPLUG_STAT); |
381 | if ((stat & CRT_HOTPLUG_MONITOR_MASK) != CRT_HOTPLUG_MONITOR_NONE) | | 381 | if ((stat & CRT_HOTPLUG_MONITOR_MASK) != CRT_HOTPLUG_MONITOR_NONE) |
382 | ret = true; | | 382 | ret = true; |
383 | | | 383 | |
384 | /* clear the interrupt we just generated, if any */ | | 384 | /* clear the interrupt we just generated, if any */ |
385 | I915_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS); | | 385 | I915_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS); |
386 | | | 386 | |
387 | /* and put the bits back */ | | 387 | /* and put the bits back */ |
388 | I915_WRITE(PORT_HOTPLUG_EN, orig); | | 388 | I915_WRITE(PORT_HOTPLUG_EN, orig); |
389 | | | 389 | |
390 | return ret; | | 390 | return ret; |
391 | } | | 391 | } |
392 | | | 392 | |
393 | static struct edid *intel_crt_get_edid(struct drm_connector *connector, | | 393 | static struct edid *intel_crt_get_edid(struct drm_connector *connector, |
394 | struct i2c_adapter *i2c) | | 394 | struct i2c_adapter *i2c) |
395 | { | | 395 | { |
396 | struct edid *edid; | | 396 | struct edid *edid; |
397 | | | 397 | |
398 | edid = drm_get_edid(connector, i2c); | | 398 | edid = drm_get_edid(connector, i2c); |
399 | | | 399 | |
400 | if (!edid && !intel_gmbus_is_forced_bit(i2c)) { | | 400 | if (!edid && !intel_gmbus_is_forced_bit(i2c)) { |
401 | DRM_DEBUG_KMS("CRT GMBUS EDID read failed, retry using GPIO bit-banging\n"); | | 401 | DRM_DEBUG_KMS("CRT GMBUS EDID read failed, retry using GPIO bit-banging\n"); |
402 | intel_gmbus_force_bit(i2c, true); | | 402 | intel_gmbus_force_bit(i2c, true); |
403 | edid = drm_get_edid(connector, i2c); | | 403 | edid = drm_get_edid(connector, i2c); |
404 | intel_gmbus_force_bit(i2c, false); | | 404 | intel_gmbus_force_bit(i2c, false); |
405 | } | | 405 | } |
406 | | | 406 | |
407 | return edid; | | 407 | return edid; |
408 | } | | 408 | } |
409 | | | 409 | |
410 | /* local version of intel_ddc_get_modes() to use intel_crt_get_edid() */ | | 410 | /* local version of intel_ddc_get_modes() to use intel_crt_get_edid() */ |
411 | static int intel_crt_ddc_get_modes(struct drm_connector *connector, | | 411 | static int intel_crt_ddc_get_modes(struct drm_connector *connector, |
412 | struct i2c_adapter *adapter) | | 412 | struct i2c_adapter *adapter) |
413 | { | | 413 | { |
414 | struct edid *edid; | | 414 | struct edid *edid; |
415 | int ret; | | 415 | int ret; |
416 | | | 416 | |
417 | edid = intel_crt_get_edid(connector, adapter); | | 417 | edid = intel_crt_get_edid(connector, adapter); |
418 | if (!edid) | | 418 | if (!edid) |
419 | return 0; | | 419 | return 0; |
420 | | | 420 | |
421 | ret = intel_connector_update_modes(connector, edid); | | 421 | ret = intel_connector_update_modes(connector, edid); |
422 | kfree(edid); | | 422 | kfree(edid); |
423 | | | 423 | |
424 | return ret; | | 424 | return ret; |
425 | } | | 425 | } |
426 | | | 426 | |
427 | static bool intel_crt_detect_ddc(struct drm_connector *connector) | | 427 | static bool intel_crt_detect_ddc(struct drm_connector *connector) |
428 | { | | 428 | { |
429 | struct intel_crt *crt = intel_attached_crt(connector); | | 429 | struct intel_crt *crt = intel_attached_crt(connector); |
430 | struct drm_i915_private *dev_priv = crt->base.base.dev->dev_private; | | 430 | struct drm_i915_private *dev_priv = crt->base.base.dev->dev_private; |
431 | struct edid *edid; | | 431 | struct edid *edid; |
432 | struct i2c_adapter *i2c; | | 432 | struct i2c_adapter *i2c; |
433 | | | 433 | |
434 | BUG_ON(crt->base.type != INTEL_OUTPUT_ANALOG); | | 434 | BUG_ON(crt->base.type != INTEL_OUTPUT_ANALOG); |
435 | | | 435 | |
436 | i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->crt_ddc_pin); | | 436 | i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->crt_ddc_pin); |
437 | edid = intel_crt_get_edid(connector, i2c); | | 437 | edid = intel_crt_get_edid(connector, i2c); |
438 | | | 438 | |
439 | if (edid) { | | 439 | if (edid) { |
440 | bool is_digital = edid->input & DRM_EDID_INPUT_DIGITAL; | | 440 | bool is_digital = edid->input & DRM_EDID_INPUT_DIGITAL; |
441 | | | 441 | |
442 | /* | | 442 | /* |
443 | * This may be a DVI-I connector with a shared DDC | | 443 | * This may be a DVI-I connector with a shared DDC |
444 | * link between analog and digital outputs, so we | | 444 | * link between analog and digital outputs, so we |
445 | * have to check the EDID input spec of the attached device. | | 445 | * have to check the EDID input spec of the attached device. |
446 | */ | | 446 | */ |
447 | if (!is_digital) { | | 447 | if (!is_digital) { |
448 | DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n"); | | 448 | DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n"); |
449 | return true; | | 449 | return true; |
450 | } | | 450 | } |
451 | | | 451 | |
452 | DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [EDID reports a digital panel]\n"); | | 452 | DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [EDID reports a digital panel]\n"); |
453 | } else { | | 453 | } else { |
454 | DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [no valid EDID found]\n"); | | 454 | DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [no valid EDID found]\n"); |
455 | } | | 455 | } |
456 | | | 456 | |
457 | kfree(edid); | | 457 | kfree(edid); |
458 | | | 458 | |
459 | return false; | | 459 | return false; |
460 | } | | 460 | } |
461 | | | 461 | |
462 | static enum drm_connector_status | | 462 | static enum drm_connector_status |
463 | intel_crt_load_detect(struct intel_crt *crt) | | 463 | intel_crt_load_detect(struct intel_crt *crt) |
464 | { | | 464 | { |
465 | struct drm_device *dev = crt->base.base.dev; | | 465 | struct drm_device *dev = crt->base.base.dev; |
466 | struct drm_i915_private *dev_priv = dev->dev_private; | | 466 | struct drm_i915_private *dev_priv = dev->dev_private; |
467 | uint32_t pipe = to_intel_crtc(crt->base.base.crtc)->pipe; | | 467 | uint32_t pipe = to_intel_crtc(crt->base.base.crtc)->pipe; |
468 | uint32_t save_bclrpat; | | 468 | uint32_t save_bclrpat; |
469 | uint32_t save_vtotal; | | 469 | uint32_t save_vtotal; |
470 | uint32_t vtotal, vactive; | | 470 | uint32_t vtotal, vactive; |
471 | uint32_t vsample; | | 471 | uint32_t vsample; |
472 | uint32_t vblank, vblank_start, vblank_end; | | 472 | uint32_t vblank, vblank_start, vblank_end; |
473 | uint32_t dsl; | | 473 | uint32_t dsl; |
474 | uint32_t bclrpat_reg; | | 474 | uint32_t bclrpat_reg; |
475 | uint32_t vtotal_reg; | | 475 | uint32_t vtotal_reg; |
476 | uint32_t vblank_reg; | | 476 | uint32_t vblank_reg; |
477 | uint32_t vsync_reg; | | 477 | uint32_t vsync_reg; |
478 | uint32_t pipeconf_reg; | | 478 | uint32_t pipeconf_reg; |
479 | uint32_t pipe_dsl_reg; | | 479 | uint32_t pipe_dsl_reg; |
480 | uint8_t st00; | | 480 | uint8_t st00; |
481 | enum drm_connector_status status; | | 481 | enum drm_connector_status status; |
482 | | | 482 | |
483 | DRM_DEBUG_KMS("starting load-detect on CRT\n"); | | 483 | DRM_DEBUG_KMS("starting load-detect on CRT\n"); |
484 | | | 484 | |
485 | bclrpat_reg = BCLRPAT(pipe); | | 485 | bclrpat_reg = BCLRPAT(pipe); |
486 | vtotal_reg = VTOTAL(pipe); | | 486 | vtotal_reg = VTOTAL(pipe); |
487 | vblank_reg = VBLANK(pipe); | | 487 | vblank_reg = VBLANK(pipe); |
488 | vsync_reg = VSYNC(pipe); | | 488 | vsync_reg = VSYNC(pipe); |
489 | pipeconf_reg = PIPECONF(pipe); | | 489 | pipeconf_reg = PIPECONF(pipe); |
490 | pipe_dsl_reg = PIPEDSL(pipe); | | 490 | pipe_dsl_reg = PIPEDSL(pipe); |
491 | | | 491 | |
492 | save_bclrpat = I915_READ(bclrpat_reg); | | 492 | save_bclrpat = I915_READ(bclrpat_reg); |
493 | save_vtotal = I915_READ(vtotal_reg); | | 493 | save_vtotal = I915_READ(vtotal_reg); |
494 | vblank = I915_READ(vblank_reg); | | 494 | vblank = I915_READ(vblank_reg); |
495 | | | 495 | |
496 | vtotal = ((save_vtotal >> 16) & 0xfff) + 1; | | 496 | vtotal = ((save_vtotal >> 16) & 0xfff) + 1; |
497 | vactive = (save_vtotal & 0x7ff) + 1; | | 497 | vactive = (save_vtotal & 0x7ff) + 1; |
498 | | | 498 | |
499 | vblank_start = (vblank & 0xfff) + 1; | | 499 | vblank_start = (vblank & 0xfff) + 1; |
500 | vblank_end = ((vblank >> 16) & 0xfff) + 1; | | 500 | vblank_end = ((vblank >> 16) & 0xfff) + 1; |
501 | | | 501 | |
502 | /* Set the border color to purple. */ | | 502 | /* Set the border color to purple. */ |
503 | I915_WRITE(bclrpat_reg, 0x500050); | | 503 | I915_WRITE(bclrpat_reg, 0x500050); |
504 | | | 504 | |
505 | if (!IS_GEN2(dev)) { | | 505 | if (!IS_GEN2(dev)) { |
506 | uint32_t pipeconf = I915_READ(pipeconf_reg); | | 506 | uint32_t pipeconf = I915_READ(pipeconf_reg); |
507 | I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER); | | 507 | I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER); |
508 | POSTING_READ(pipeconf_reg); | | 508 | POSTING_READ(pipeconf_reg); |
509 | /* Wait for next Vblank to substitue | | 509 | /* Wait for next Vblank to substitue |
510 | * border color for Color info */ | | 510 | * border color for Color info */ |
511 | intel_wait_for_vblank(dev, pipe); | | 511 | intel_wait_for_vblank(dev, pipe); |
512 | st00 = I915_READ8(VGA_MSR_WRITE); | | 512 | st00 = I915_READ8(VGA_MSR_WRITE); |
513 | status = ((st00 & (1 << 4)) != 0) ? | | 513 | status = ((st00 & (1 << 4)) != 0) ? |
514 | connector_status_connected : | | 514 | connector_status_connected : |
515 | connector_status_disconnected; | | 515 | connector_status_disconnected; |
516 | | | 516 | |
517 | I915_WRITE(pipeconf_reg, pipeconf); | | 517 | I915_WRITE(pipeconf_reg, pipeconf); |
518 | } else { | | 518 | } else { |
519 | bool restore_vblank = false; | | 519 | bool restore_vblank = false; |
520 | int count, detect; | | 520 | int count, detect; |
521 | | | 521 | |
522 | /* | | 522 | /* |
523 | * If there isn't any border, add some. | | 523 | * If there isn't any border, add some. |
524 | * Yes, this will flicker | | 524 | * Yes, this will flicker |
525 | */ | | 525 | */ |
526 | if (vblank_start <= vactive && vblank_end >= vtotal) { | | 526 | if (vblank_start <= vactive && vblank_end >= vtotal) { |
527 | uint32_t vsync = I915_READ(vsync_reg); | | 527 | uint32_t vsync = I915_READ(vsync_reg); |
528 | uint32_t vsync_start = (vsync & 0xffff) + 1; | | 528 | uint32_t vsync_start = (vsync & 0xffff) + 1; |
529 | | | 529 | |
530 | vblank_start = vsync_start; | | 530 | vblank_start = vsync_start; |
531 | I915_WRITE(vblank_reg, | | 531 | I915_WRITE(vblank_reg, |
532 | (vblank_start - 1) | | | 532 | (vblank_start - 1) | |
533 | ((vblank_end - 1) << 16)); | | 533 | ((vblank_end - 1) << 16)); |
534 | restore_vblank = true; | | 534 | restore_vblank = true; |
535 | } | | 535 | } |
536 | /* sample in the vertical border, selecting the larger one */ | | 536 | /* sample in the vertical border, selecting the larger one */ |
537 | if (vblank_start - vactive >= vtotal - vblank_end) | | 537 | if (vblank_start - vactive >= vtotal - vblank_end) |
538 | vsample = (vblank_start + vactive) >> 1; | | 538 | vsample = (vblank_start + vactive) >> 1; |
539 | else | | 539 | else |
540 | vsample = (vtotal + vblank_end) >> 1; | | 540 | vsample = (vtotal + vblank_end) >> 1; |
541 | | | 541 | |
542 | /* | | 542 | /* |
543 | * Wait for the border to be displayed | | 543 | * Wait for the border to be displayed |
544 | */ | | 544 | */ |
545 | while (I915_READ(pipe_dsl_reg) >= vactive) | | 545 | while (I915_READ(pipe_dsl_reg) >= vactive) |
546 | ; | | 546 | ; |
547 | while ((dsl = I915_READ(pipe_dsl_reg)) <= vsample) | | 547 | while ((dsl = I915_READ(pipe_dsl_reg)) <= vsample) |
548 | ; | | 548 | ; |
549 | /* | | 549 | /* |
550 | * Watch ST00 for an entire scanline | | 550 | * Watch ST00 for an entire scanline |
551 | */ | | 551 | */ |
552 | detect = 0; | | 552 | detect = 0; |
553 | count = 0; | | 553 | count = 0; |
554 | do { | | 554 | do { |
555 | count++; | | 555 | count++; |
556 | /* Read the ST00 VGA status register */ | | 556 | /* Read the ST00 VGA status register */ |
557 | st00 = I915_READ8(VGA_MSR_WRITE); | | 557 | st00 = I915_READ8(VGA_MSR_WRITE); |
558 | if (st00 & (1 << 4)) | | 558 | if (st00 & (1 << 4)) |
559 | detect++; | | 559 | detect++; |
560 | } while ((I915_READ(pipe_dsl_reg) == dsl)); | | 560 | } while ((I915_READ(pipe_dsl_reg) == dsl)); |
561 | | | 561 | |
562 | /* restore vblank if necessary */ | | 562 | /* restore vblank if necessary */ |
563 | if (restore_vblank) | | 563 | if (restore_vblank) |
564 | I915_WRITE(vblank_reg, vblank); | | 564 | I915_WRITE(vblank_reg, vblank); |
565 | /* | | 565 | /* |
566 | * If more than 3/4 of the scanline detected a monitor, | | 566 | * If more than 3/4 of the scanline detected a monitor, |
567 | * then it is assumed to be present. This works even on i830, | | 567 | * then it is assumed to be present. This works even on i830, |
568 | * where there isn't any way to force the border color across | | 568 | * where there isn't any way to force the border color across |
569 | * the screen | | 569 | * the screen |
570 | */ | | 570 | */ |
571 | status = detect * 4 > count * 3 ? | | 571 | status = detect * 4 > count * 3 ? |
572 | connector_status_connected : | | 572 | connector_status_connected : |
573 | connector_status_disconnected; | | 573 | connector_status_disconnected; |
574 | } | | 574 | } |
575 | | | 575 | |
576 | /* Restore previous settings */ | | 576 | /* Restore previous settings */ |
577 | I915_WRITE(bclrpat_reg, save_bclrpat); | | 577 | I915_WRITE(bclrpat_reg, save_bclrpat); |
578 | | | 578 | |
579 | return status; | | 579 | return status; |
580 | } | | 580 | } |
581 | | | 581 | |
582 | static enum drm_connector_status | | 582 | static enum drm_connector_status |
583 | intel_crt_detect(struct drm_connector *connector, bool force) | | 583 | intel_crt_detect(struct drm_connector *connector, bool force) |
584 | { | | 584 | { |
585 | struct drm_device *dev = connector->dev; | | 585 | struct drm_device *dev = connector->dev; |
586 | struct intel_crt *crt = intel_attached_crt(connector); | | 586 | struct intel_crt *crt = intel_attached_crt(connector); |
587 | enum drm_connector_status status; | | 587 | enum drm_connector_status status; |
588 | struct intel_load_detect_pipe tmp; | | 588 | struct intel_load_detect_pipe tmp; |
589 | | | 589 | |
590 | if (I915_HAS_HOTPLUG(dev)) { | | 590 | if (I915_HAS_HOTPLUG(dev)) { |
591 | /* We can not rely on the HPD pin always being correctly wired | | 591 | /* We can not rely on the HPD pin always being correctly wired |
592 | * up, for example many KVM do not pass it through, and so | | 592 | * up, for example many KVM do not pass it through, and so |
593 | * only trust an assertion that the monitor is connected. | | 593 | * only trust an assertion that the monitor is connected. |
594 | */ | | 594 | */ |
595 | if (intel_crt_detect_hotplug(connector)) { | | 595 | if (intel_crt_detect_hotplug(connector)) { |
596 | DRM_DEBUG_KMS("CRT detected via hotplug\n"); | | 596 | DRM_DEBUG_KMS("CRT detected via hotplug\n"); |
597 | return connector_status_connected; | | 597 | return connector_status_connected; |
598 | } else | | 598 | } else |
599 | DRM_DEBUG_KMS("CRT not detected via hotplug\n"); | | 599 | DRM_DEBUG_KMS("CRT not detected via hotplug\n"); |
600 | } | | 600 | } |
601 | | | 601 | |
602 | if (intel_crt_detect_ddc(connector)) | | 602 | if (intel_crt_detect_ddc(connector)) |
603 | return connector_status_connected; | | 603 | return connector_status_connected; |
604 | | | 604 | |
605 | /* Load detection is broken on HPD capable machines. Whoever wants a | | 605 | /* Load detection is broken on HPD capable machines. Whoever wants a |
606 | * broken monitor (without edid) to work behind a broken kvm (that fails | | 606 | * broken monitor (without edid) to work behind a broken kvm (that fails |
607 | * to have the right resistors for HP detection) needs to fix this up. | | 607 | * to have the right resistors for HP detection) needs to fix this up. |
608 | * For now just bail out. */ | | 608 | * For now just bail out. */ |
609 | if (I915_HAS_HOTPLUG(dev)) | | 609 | if (I915_HAS_HOTPLUG(dev)) |
610 | return connector_status_disconnected; | | 610 | return connector_status_disconnected; |
611 | | | 611 | |
612 | if (!force) | | 612 | if (!force) |
613 | return connector->status; | | 613 | return connector->status; |
614 | | | 614 | |
615 | /* for pre-945g platforms use load detect */ | | 615 | /* for pre-945g platforms use load detect */ |
616 | if (intel_get_load_detect_pipe(connector, NULL, &tmp)) { | | 616 | if (intel_get_load_detect_pipe(connector, NULL, &tmp)) { |
617 | if (intel_crt_detect_ddc(connector)) | | 617 | if (intel_crt_detect_ddc(connector)) |
618 | status = connector_status_connected; | | 618 | status = connector_status_connected; |
619 | else | | 619 | else |
620 | status = intel_crt_load_detect(crt); | | 620 | status = intel_crt_load_detect(crt); |
621 | intel_release_load_detect_pipe(connector, &tmp); | | 621 | intel_release_load_detect_pipe(connector, &tmp); |
622 | } else | | 622 | } else |
623 | status = connector_status_unknown; | | 623 | status = connector_status_unknown; |
624 | | | 624 | |
625 | return status; | | 625 | return status; |
626 | } | | 626 | } |
627 | | | 627 | |
628 | static void intel_crt_destroy(struct drm_connector *connector) | | 628 | static void intel_crt_destroy(struct drm_connector *connector) |
629 | { | | 629 | { |
630 | drm_sysfs_connector_remove(connector); | | 630 | drm_sysfs_connector_remove(connector); |
631 | drm_connector_cleanup(connector); | | 631 | drm_connector_cleanup(connector); |
632 | kfree(connector); | | 632 | kfree(connector); |
633 | } | | 633 | } |
634 | | | 634 | |
635 | static int intel_crt_get_modes(struct drm_connector *connector) | | 635 | static int intel_crt_get_modes(struct drm_connector *connector) |
636 | { | | 636 | { |
637 | struct drm_device *dev = connector->dev; | | 637 | struct drm_device *dev = connector->dev; |
638 | struct drm_i915_private *dev_priv = dev->dev_private; | | 638 | struct drm_i915_private *dev_priv = dev->dev_private; |
639 | int ret; | | 639 | int ret; |
640 | struct i2c_adapter *i2c; | | 640 | struct i2c_adapter *i2c; |
641 | | | 641 | |
642 | i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->crt_ddc_pin); | | 642 | i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->crt_ddc_pin); |
643 | ret = intel_crt_ddc_get_modes(connector, i2c); | | 643 | ret = intel_crt_ddc_get_modes(connector, i2c); |
644 | if (ret || !IS_G4X(dev)) | | 644 | if (ret || !IS_G4X(dev)) |
645 | return ret; | | 645 | return ret; |
646 | | | 646 | |
647 | /* Try to probe digital port for output in DVI-I -> VGA mode. */ | | 647 | /* Try to probe digital port for output in DVI-I -> VGA mode. */ |
648 | i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPB); | | 648 | i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPB); |
649 | return intel_crt_ddc_get_modes(connector, i2c); | | 649 | return intel_crt_ddc_get_modes(connector, i2c); |
650 | } | | 650 | } |
651 | | | 651 | |
652 | static int intel_crt_set_property(struct drm_connector *connector, | | 652 | static int intel_crt_set_property(struct drm_connector *connector, |
653 | struct drm_property *property, | | 653 | struct drm_property *property, |
654 | uint64_t value) | | 654 | uint64_t value) |
655 | { | | 655 | { |
656 | return 0; | | 656 | return 0; |
657 | } | | 657 | } |
658 | | | 658 | |
659 | static void intel_crt_reset(struct drm_connector *connector) | | 659 | static void intel_crt_reset(struct drm_connector *connector) |
660 | { | | 660 | { |
661 | struct drm_device *dev = connector->dev; | | 661 | struct drm_device *dev = connector->dev; |
662 | struct drm_i915_private *dev_priv = dev->dev_private; | | 662 | struct drm_i915_private *dev_priv = dev->dev_private; |
663 | struct intel_crt *crt = intel_attached_crt(connector); | | 663 | struct intel_crt *crt = intel_attached_crt(connector); |
664 | | | 664 | |
665 | if (HAS_PCH_SPLIT(dev)) { | | 665 | if (HAS_PCH_SPLIT(dev)) { |
666 | u32 adpa; | | 666 | u32 adpa; |
667 | | | 667 | |
668 | adpa = I915_READ(PCH_ADPA); | | 668 | adpa = I915_READ(PCH_ADPA); |
669 | adpa &= ~ADPA_CRT_HOTPLUG_MASK; | | 669 | adpa &= ~ADPA_CRT_HOTPLUG_MASK; |
670 | adpa |= ADPA_HOTPLUG_BITS; | | 670 | adpa |= ADPA_HOTPLUG_BITS; |
671 | I915_WRITE(PCH_ADPA, adpa); | | 671 | I915_WRITE(PCH_ADPA, adpa); |
672 | POSTING_READ(PCH_ADPA); | | 672 | POSTING_READ(PCH_ADPA); |
673 | | | 673 | |
674 | DRM_DEBUG_KMS("pch crt adpa set to 0x%x\n", adpa); | | 674 | DRM_DEBUG_KMS("pch crt adpa set to 0x%x\n", adpa); |
675 | crt->force_hotplug_required = 1; | | 675 | crt->force_hotplug_required = 1; |
676 | } | | 676 | } |
677 | | | 677 | |
678 | } | | 678 | } |
679 | | | 679 | |
680 | /* | | 680 | /* |
681 | * Routines for controlling stuff on the analog port | | 681 | * Routines for controlling stuff on the analog port |
682 | */ | | 682 | */ |
683 | | | 683 | |
684 | static const struct drm_encoder_helper_funcs crt_encoder_funcs = { | | 684 | static const struct drm_encoder_helper_funcs crt_encoder_funcs = { |
685 | .mode_fixup = intel_crt_mode_fixup, | | 685 | .mode_fixup = intel_crt_mode_fixup, |
686 | .mode_set = intel_crt_mode_set, | | 686 | .mode_set = intel_crt_mode_set, |
687 | .disable = intel_encoder_noop, | | 687 | .disable = intel_encoder_noop, |
688 | }; | | 688 | }; |
689 | | | 689 | |
690 | static const struct drm_connector_funcs intel_crt_connector_funcs = { | | 690 | static const struct drm_connector_funcs intel_crt_connector_funcs = { |
691 | .reset = intel_crt_reset, | | 691 | .reset = intel_crt_reset, |
692 | .dpms = intel_crt_dpms, | | 692 | .dpms = intel_crt_dpms, |
693 | .detect = intel_crt_detect, | | 693 | .detect = intel_crt_detect, |
694 | .fill_modes = drm_helper_probe_single_connector_modes, | | 694 | .fill_modes = drm_helper_probe_single_connector_modes, |
695 | .destroy = intel_crt_destroy, | | 695 | .destroy = intel_crt_destroy, |
696 | .set_property = intel_crt_set_property, | | 696 | .set_property = intel_crt_set_property, |
697 | }; | | 697 | }; |
698 | | | 698 | |
699 | static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs = { | | 699 | static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs = { |
700 | .mode_valid = intel_crt_mode_valid, | | 700 | .mode_valid = intel_crt_mode_valid, |
701 | .get_modes = intel_crt_get_modes, | | 701 | .get_modes = intel_crt_get_modes, |
702 | .best_encoder = intel_best_encoder, | | 702 | .best_encoder = intel_best_encoder, |
703 | }; | | 703 | }; |
704 | | | 704 | |
705 | static const struct drm_encoder_funcs intel_crt_enc_funcs = { | | 705 | static const struct drm_encoder_funcs intel_crt_enc_funcs = { |
706 | .destroy = intel_encoder_destroy, | | 706 | .destroy = intel_encoder_destroy, |
707 | }; | | 707 | }; |
708 | | | 708 | |
| | | 709 | #ifndef __NetBSD__ /* XXX dmi hack */ |
709 | static int __init intel_no_crt_dmi_callback(const struct dmi_system_id *id) | | 710 | static int __init intel_no_crt_dmi_callback(const struct dmi_system_id *id) |
710 | { | | 711 | { |
711 | DRM_INFO("Skipping CRT initialization for %s\n", id->ident); | | 712 | DRM_INFO("Skipping CRT initialization for %s\n", id->ident); |
712 | return 1; | | 713 | return 1; |
713 | } | | 714 | } |
714 | | | 715 | |
715 | static const struct dmi_system_id intel_no_crt[] = { | | 716 | static const struct dmi_system_id intel_no_crt[] = { |
716 | { | | 717 | { |
717 | .callback = intel_no_crt_dmi_callback, | | 718 | .callback = intel_no_crt_dmi_callback, |
718 | .ident = "ACER ZGB", | | 719 | .ident = "ACER ZGB", |
719 | .matches = { | | 720 | .matches = { |
720 | DMI_MATCH(DMI_SYS_VENDOR, "ACER"), | | 721 | DMI_MATCH(DMI_SYS_VENDOR, "ACER"), |
721 | DMI_MATCH(DMI_PRODUCT_NAME, "ZGB"), | | 722 | DMI_MATCH(DMI_PRODUCT_NAME, "ZGB"), |
722 | }, | | 723 | }, |
723 | }, | | 724 | }, |
724 | { } | | 725 | { } |
725 | }; | | 726 | }; |
| | | 727 | #endif |
726 | | | 728 | |
727 | void intel_crt_init(struct drm_device *dev) | | 729 | void intel_crt_init(struct drm_device *dev) |
728 | { | | 730 | { |
729 | struct drm_connector *connector; | | 731 | struct drm_connector *connector; |
730 | struct intel_crt *crt; | | 732 | struct intel_crt *crt; |
731 | struct intel_connector *intel_connector; | | 733 | struct intel_connector *intel_connector; |
732 | struct drm_i915_private *dev_priv = dev->dev_private; | | 734 | struct drm_i915_private *dev_priv = dev->dev_private; |
733 | | | 735 | |
| | | 736 | #ifndef __NetBSD__ /* XXX dmi hack */ |
734 | /* Skip machines without VGA that falsely report hotplug events */ | | 737 | /* Skip machines without VGA that falsely report hotplug events */ |
735 | if (dmi_check_system(intel_no_crt)) | | 738 | if (dmi_check_system(intel_no_crt)) |
736 | return; | | 739 | return; |
| | | 740 | #endif |
737 | | | 741 | |
738 | crt = kzalloc(sizeof(struct intel_crt), GFP_KERNEL); | | 742 | crt = kzalloc(sizeof(struct intel_crt), GFP_KERNEL); |
739 | if (!crt) | | 743 | if (!crt) |
740 | return; | | 744 | return; |
741 | | | 745 | |
742 | intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL); | | 746 | intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL); |
743 | if (!intel_connector) { | | 747 | if (!intel_connector) { |
744 | kfree(crt); | | 748 | kfree(crt); |
745 | return; | | 749 | return; |
746 | } | | 750 | } |
747 | | | 751 | |
748 | connector = &intel_connector->base; | | 752 | connector = &intel_connector->base; |
749 | drm_connector_init(dev, &intel_connector->base, | | 753 | drm_connector_init(dev, &intel_connector->base, |
750 | &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA); | | 754 | &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA); |
751 | | | 755 | |
752 | drm_encoder_init(dev, &crt->base.base, &intel_crt_enc_funcs, | | 756 | drm_encoder_init(dev, &crt->base.base, &intel_crt_enc_funcs, |
753 | DRM_MODE_ENCODER_DAC); | | 757 | DRM_MODE_ENCODER_DAC); |
754 | | | 758 | |
755 | intel_connector_attach_encoder(intel_connector, &crt->base); | | 759 | intel_connector_attach_encoder(intel_connector, &crt->base); |
756 | | | 760 | |
757 | crt->base.type = INTEL_OUTPUT_ANALOG; | | 761 | crt->base.type = INTEL_OUTPUT_ANALOG; |
758 | crt->base.cloneable = true; | | 762 | crt->base.cloneable = true; |
759 | if (IS_I830(dev)) | | 763 | if (IS_I830(dev)) |
760 | crt->base.crtc_mask = (1 << 0); | | 764 | crt->base.crtc_mask = (1 << 0); |
761 | else | | 765 | else |
762 | crt->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2); | | 766 | crt->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2); |
763 | | | 767 | |
764 | if (IS_GEN2(dev)) | | 768 | if (IS_GEN2(dev)) |
765 | connector->interlace_allowed = 0; | | 769 | connector->interlace_allowed = 0; |
766 | else | | 770 | else |
767 | connector->interlace_allowed = 1; | | 771 | connector->interlace_allowed = 1; |
768 | connector->doublescan_allowed = 0; | | 772 | connector->doublescan_allowed = 0; |
769 | | | 773 | |
770 | if (HAS_PCH_SPLIT(dev)) | | 774 | if (HAS_PCH_SPLIT(dev)) |
771 | crt->adpa_reg = PCH_ADPA; | | 775 | crt->adpa_reg = PCH_ADPA; |
772 | else if (IS_VALLEYVIEW(dev)) | | 776 | else if (IS_VALLEYVIEW(dev)) |
773 | crt->adpa_reg = VLV_ADPA; | | 777 | crt->adpa_reg = VLV_ADPA; |
774 | else | | 778 | else |
775 | crt->adpa_reg = ADPA; | | 779 | crt->adpa_reg = ADPA; |
776 | | | 780 | |
777 | crt->base.disable = intel_disable_crt; | | 781 | crt->base.disable = intel_disable_crt; |
778 | crt->base.enable = intel_enable_crt; | | 782 | crt->base.enable = intel_enable_crt; |
779 | if (IS_HASWELL(dev)) | | 783 | if (IS_HASWELL(dev)) |
780 | crt->base.get_hw_state = intel_ddi_get_hw_state; | | 784 | crt->base.get_hw_state = intel_ddi_get_hw_state; |
781 | else | | 785 | else |
782 | crt->base.get_hw_state = intel_crt_get_hw_state; | | 786 | crt->base.get_hw_state = intel_crt_get_hw_state; |
783 | intel_connector->get_hw_state = intel_connector_get_hw_state; | | 787 | intel_connector->get_hw_state = intel_connector_get_hw_state; |
784 | | | 788 | |
785 | drm_encoder_helper_add(&crt->base.base, &crt_encoder_funcs); | | 789 | drm_encoder_helper_add(&crt->base.base, &crt_encoder_funcs); |
786 | drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs); | | 790 | drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs); |
787 | | | 791 | |
788 | drm_sysfs_connector_add(connector); | | 792 | drm_sysfs_connector_add(connector); |
789 | | | 793 | |
790 | if (I915_HAS_HOTPLUG(dev)) | | 794 | if (I915_HAS_HOTPLUG(dev)) |
791 | connector->polled = DRM_CONNECTOR_POLL_HPD; | | 795 | connector->polled = DRM_CONNECTOR_POLL_HPD; |
792 | else | | 796 | else |
793 | connector->polled = DRM_CONNECTOR_POLL_CONNECT; | | 797 | connector->polled = DRM_CONNECTOR_POLL_CONNECT; |
794 | | | 798 | |
795 | /* | | 799 | /* |
796 | * Configure the automatic hotplug detection stuff | | 800 | * Configure the automatic hotplug detection stuff |
797 | */ | | 801 | */ |
798 | crt->force_hotplug_required = 0; | | 802 | crt->force_hotplug_required = 0; |
799 | | | 803 | |
800 | dev_priv->hotplug_supported_mask |= CRT_HOTPLUG_INT_STATUS; | | 804 | dev_priv->hotplug_supported_mask |= CRT_HOTPLUG_INT_STATUS; |
801 | | | 805 | |
802 | /* | | 806 | /* |
803 | * TODO: find a proper way to discover whether we need to set the | | 807 | * TODO: find a proper way to discover whether we need to set the |
804 | * polarity reversal bit or not, instead of relying on the BIOS. | | 808 | * polarity reversal bit or not, instead of relying on the BIOS. |
805 | */ | | 809 | */ |
806 | if (HAS_PCH_LPT(dev)) | | 810 | if (HAS_PCH_LPT(dev)) |
807 | dev_priv->fdi_rx_polarity_reversed = | | 811 | dev_priv->fdi_rx_polarity_reversed = |
808 | !!(I915_READ(_FDI_RXA_CTL) & FDI_RX_POLARITY_REVERSED_LPT); | | 812 | !!(I915_READ(_FDI_RXA_CTL) & FDI_RX_POLARITY_REVERSED_LPT); |
809 | } | | 813 | } |