Mon Aug 12 21:17:03 2013 UTC ()
use RET/RETc
use unified syntax


(matt)
diff -r1.4 -r1.5 src/sys/arch/evbarm/lubbock/sm_obio_space_asm.S
cvs diff -r1.4 -r1.5 src/sys/arch/evbarm/lubbock/sm_obio_space_asm.S (expand / switch to unified diff)

--- src/sys/arch/evbarm/lubbock/sm_obio_space_asm.S 2005/12/11 12:17:09 1.4
+++ src/sys/arch/evbarm/lubbock/sm_obio_space_asm.S 2013/08/12 21:17:03 1.5
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: sm_obio_space_asm.S,v 1.4 2005/12/11 12:17:09 christos Exp $ */ 1/* $NetBSD: sm_obio_space_asm.S,v 1.5 2013/08/12 21:17:03 matt Exp $ */
2 2
3/* 3/*
4 * Copyright (c) 2002, 2003 Genetec Corporation. All rights reserved. 4 * Copyright (c) 2002, 2003 Genetec Corporation. All rights reserved.
5 * Written by Hiroyuki Bessho for Genetec Corporation. 5 * Written by Hiroyuki Bessho for Genetec Corporation.
6 * 6 *
7 * Redistribution and use in source and binary forms, with or without 7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions 8 * modification, are permitted provided that the following conditions
9 * are met: 9 * are met:
10 * 1. Redistributions of source code must retain the above copyright 10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer. 11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright 12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the 13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution. 14 * documentation and/or other materials provided with the distribution.
@@ -26,119 +26,124 @@ @@ -26,119 +26,124 @@
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE. 29 * POSSIBILITY OF SUCH DAMAGE.
30 */ 30 */
31 31
32/* 32/*
33 * These are special bus space functions for Lubbock's on-board I/O. 33 * These are special bus space functions for Lubbock's on-board I/O.
34 * Especially for SMC91c96 chip in 8-bit mode. 34 * Especially for SMC91c96 chip in 8-bit mode.
35 */  35 */
36 36
37#include <machine/asm.h> 37#include <machine/asm.h>
38 38
39RCSID("$NetBSD: sm_obio_space_asm.S,v 1.4 2005/12/11 12:17:09 christos Exp $") 39RCSID("$NetBSD: sm_obio_space_asm.S,v 1.5 2013/08/12 21:17:03 matt Exp $")
40 40
41/* 41/*
42 * bus_space I/O functions with offset*4, 8-bit access. 42 * bus_space I/O functions with offset*4, 8-bit access.
43 */ 43 */
44 44
45/* 45/*
46 * read single 46 * read single
47 */ 47 */
48 48
49ENTRY(smobio8_bs_r_2) 49ENTRY(smobio8_bs_r_2)
50 add r1, r1, r2, LSL #2 50 add r1, r1, r2, LSL #2
51 ldrb r0, [r1], #4 51 ldrb r0, [r1], #4
52 ldrb r2, [r1] 52 ldrb r2, [r1]
53 orr r0, r0, r2, LSL #8 53 orr r0, r0, r2, LSL #8
54 mov pc, lr 54 RET
 55END(smobio8_bs_r_2)
55 56
56/* 57/*
57 * write single 58 * write single
58 */ 59 */
59 60
60ENTRY(smobio8_bs_w_2) 61ENTRY(smobio8_bs_w_2)
61 add r1, r1, r2, LSL #2 62 add r1, r1, r2, LSL #2
62 strb r3, [r1], #4 63 strb r3, [r1], #4
63 mov r3, r3, LSR #8 64 mov r3, r3, LSR #8
64 strb r3, [r1] 65 strb r3, [r1]
65 mov pc, lr 66 RET
 67END(smobio8_bs_w_2)
66 68
67/* 69/*
68 * read multiple 70 * read multiple
69 */ 71 */
70ENTRY(smobio8_bs_rm_2) 72ENTRY(smobio8_bs_rm_2)
71 add r0, r1, r2, LSL #2 73 add r0, r1, r2, LSL #2
72 ldr r2, [sp, #0] 74 ldr r2, [sp, #0]
73 cmp r2, #0x00000000 75 cmp r2, #0x00000000
74 movle pc, lr 76 RETc(le)
75 77
76 stmfd sp!, {lr} 
77Lbs_rm_2_loop: 78Lbs_rm_2_loop:
78 ldrb r1, [r0] 79 ldrb r1, [r0]
79 ldrb lr, [r0, #4] 80 ldrb lr, [r0, #4]
80 subs r2, r2, #0x00000001 81 subs r2, r2, #0x00000001
81 orr r1, r1, lr, LSL #8 82 orr r1, r1, lr, LSL #8
82 strh r1, [r3], #0x0002 83 strh r1, [r3], #0x0002
83 bgt Lbs_rm_2_loop 84 bgt Lbs_rm_2_loop
84 85
85 ldmfd sp!, {pc} 86 RET
 87END(smobio8_bs_rm_2)
86 88
87 89
88 90
89/* 91/*
90 * write multiple 92 * write multiple
91 */ 93 */
92ENTRY(smobio8_bs_wm_2) 94ENTRY(smobio8_bs_wm_2)
93 add r0, r1, r2, LSL #2 95 add r0, r1, r2, LSL #2
94 ldr r2, [sp, #0] 96 ldr r2, [sp, #0]
95 cmp r2, #0x00000000 97 cmp r2, #0x00000000
96 movle pc, lr 98 RETc(le)
97 99
98Lbs_wm_2_loop: 100Lbs_wm_2_loop:
99 ldrh r1, [r3], #0x0002 101 ldrh r1, [r3], #0x0002
100 subs r2, r2, #0x00000001 102 subs r2, r2, #0x00000001
101 strb r1, [r0] 103 strb r1, [r0]
102 mov r1, r1, LSR #8 104 mov r1, r1, LSR #8
103 strb r1, [r0,#4] 105 strb r1, [r0,#4]
104 bgt Lbs_wm_2_loop 106 bgt Lbs_wm_2_loop
105 107
106 mov pc, lr 108 RET
 109END(smobio8_bs_wm_2)
107 110
108 111
109/* 112/*
110 * For 16-bit mode 113 * For 16-bit mode
111 */ 114 */
112  115
113/* 116/*
114 * read single 117 * read single
115 */ 118 */
116 119
117ENTRY(smobio16_bs_r_1) 120ENTRY(smobio16_bs_r_1)
118 tst r2, #1 /* Even/Odd ? */ 121 tst r2, #1 /* Even/Odd ? */
119 ldreqb r0, [r1, r2, LSL #2] 122 ldrbeq r0, [r1, r2, LSL #2]
120 moveq pc,lr 123 RETc(eq)
121 124
122 /* Odd byte. read 16bits and get high byte */ 125 /* Odd byte. read 16bits and get high byte */
123 bic r2, r2, #1 126 bic r2, r2, #1
124 add r1, r1, r2, LSL #2 127 add r1, r1, r2, LSL #2
125 ldrh r0, [r1] 128 ldrh r0, [r1]
126 mov r0, r0, LSR #8 129 mov r0, r0, LSR #8
127 mov pc, lr 130 RET
 131END(smobio16_bs_r_1)
128 132
129 133
130/* 134/*
131 * write single 135 * write single
132 */ 136 */
133 137
134ENTRY(smobio16_bs_w_1) 138ENTRY(smobio16_bs_w_1)
135 tst r2, #1 /* Even/Odd ? */ 139 tst r2, #1 /* Even/Odd ? */
136 streqb r3, [r1, r2, LSL #2] 140 strbeq r3, [r1, r2, LSL #2]
137 moveq pc,lr 141 RETc(eq)
138 142
139 /* Odd byte. write 16bit with low byte is 0. */ 143 /* Odd byte. write 16bit with low byte is 0. */
140 bic r2, r2, #1 144 bic r2, r2, #1
141 mov r3, r3, LSL #8 145 mov r3, r3, LSL #8
142 add r1, r1, r2, LSL #2 146 add r1, r1, r2, LSL #2
143 strh r3, [r1] 147 strh r3, [r1]
144 mov pc, lr 148 RET
 149END(smobio16_bs_w_1)