Thu Sep 12 19:46:31 2013 UTC ()
Remove unused variables


(martin)
diff -r1.38 -r1.39 src/sys/dev/i2c/dbcool.c

cvs diff -r1.38 -r1.39 src/sys/dev/i2c/dbcool.c (expand / switch to unified diff)

--- src/sys/dev/i2c/dbcool.c 2012/06/02 21:36:44 1.38
+++ src/sys/dev/i2c/dbcool.c 2013/09/12 19:46:31 1.39
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: dbcool.c,v 1.38 2012/06/02 21:36:44 dsl Exp $ */ 1/* $NetBSD: dbcool.c,v 1.39 2013/09/12 19:46:31 martin Exp $ */
2 2
3/*- 3/*-
4 * Copyright (c) 2008 The NetBSD Foundation, Inc. 4 * Copyright (c) 2008 The NetBSD Foundation, Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * This code is derived from software contributed to The NetBSD Foundation 7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Paul Goyette 8 * by Paul Goyette
9 * 9 *
10 * Redistribution and use in source and binary forms, with or without 10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions 11 * modification, are permitted provided that the following conditions
12 * are met: 12 * are met:
13 * 1. Redistributions of source code must retain the above copyright 13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer. 14 * notice, this list of conditions and the following disclaimer.
@@ -40,27 +40,27 @@ @@ -40,27 +40,27 @@
40 * http://www.onsemi.com/pub/Collateral/ADT7466.PDF 40 * http://www.onsemi.com/pub/Collateral/ADT7466.PDF
41 * http://www.onsemi.com/pub/Collateral/ADT7467-D.PDF 41 * http://www.onsemi.com/pub/Collateral/ADT7467-D.PDF
42 * http://www.onsemi.com/pub/Collateral/ADT7468-D.PDF 42 * http://www.onsemi.com/pub/Collateral/ADT7468-D.PDF
43 * http://www.onsemi.com/pub/Collateral/ADT7473-D.PDF 43 * http://www.onsemi.com/pub/Collateral/ADT7473-D.PDF
44 * http://www.onsemi.com/pub/Collateral/ADT7475-D.PDF 44 * http://www.onsemi.com/pub/Collateral/ADT7475-D.PDF
45 * http://www.onsemi.com/pub/Collateral/ADT7476-D.PDF 45 * http://www.onsemi.com/pub/Collateral/ADT7476-D.PDF
46 * http://www.onsemi.com/pub/Collateral/ADT7490-D.PDF 46 * http://www.onsemi.com/pub/Collateral/ADT7490-D.PDF
47 * http://www.smsc.com/media/Downloads_Public/Data_Sheets/6d103s.pdf 47 * http://www.smsc.com/media/Downloads_Public/Data_Sheets/6d103s.pdf
48 * 48 *
49 * (URLs are correct as of October 5, 2008) 49 * (URLs are correct as of October 5, 2008)
50 */ 50 */
51 51
52#include <sys/cdefs.h> 52#include <sys/cdefs.h>
53__KERNEL_RCSID(0, "$NetBSD: dbcool.c,v 1.38 2012/06/02 21:36:44 dsl Exp $"); 53__KERNEL_RCSID(0, "$NetBSD: dbcool.c,v 1.39 2013/09/12 19:46:31 martin Exp $");
54 54
55#include <sys/param.h> 55#include <sys/param.h>
56#include <sys/systm.h> 56#include <sys/systm.h>
57#include <sys/kernel.h> 57#include <sys/kernel.h>
58#include <sys/device.h> 58#include <sys/device.h>
59#include <sys/malloc.h> 59#include <sys/malloc.h>
60#include <sys/sysctl.h> 60#include <sys/sysctl.h>
61#include <sys/module.h> 61#include <sys/module.h>
62 62
63#include <dev/i2c/dbcool_var.h> 63#include <dev/i2c/dbcool_var.h>
64#include <dev/i2c/dbcool_reg.h> 64#include <dev/i2c/dbcool_reg.h>
65 65
66/* Config interface */ 66/* Config interface */
@@ -826,41 +826,40 @@ bool dbcool_pmf_suspend(device_t dev, co @@ -826,41 +826,40 @@ bool dbcool_pmf_suspend(device_t dev, co
826 bit = DBCOOL_ADT7466_CFG2_SHDN; 826 bit = DBCOOL_ADT7466_CFG2_SHDN;
827 } else { 827 } else {
828 reg = DBCOOL_CONFIG2_REG; 828 reg = DBCOOL_CONFIG2_REG;
829 bit = DBCOOL_CFG2_SHDN; 829 bit = DBCOOL_CFG2_SHDN;
830 } 830 }
831 cfg = sc->sc_dc.dc_readreg(&sc->sc_dc, reg); 831 cfg = sc->sc_dc.dc_readreg(&sc->sc_dc, reg);
832 sc->sc_suspend = cfg & bit; 832 sc->sc_suspend = cfg & bit;
833 cfg |= bit; 833 cfg |= bit;
834 sc->sc_dc.dc_writereg(&sc->sc_dc, reg, cfg); 834 sc->sc_dc.dc_writereg(&sc->sc_dc, reg, cfg);
835 835
836 return true; 836 return true;
837} 837}
838 838
839/* On resume, we restore the previous state of the SHDN bit */ 839/* On resume, we restore the previous state of the SHDN bit (which
 840 we saved in sc_suspend) */
840bool dbcool_pmf_resume(device_t dev, const pmf_qual_t *qual) 841bool dbcool_pmf_resume(device_t dev, const pmf_qual_t *qual)
841{ 842{
842 struct dbcool_softc *sc = device_private(dev); 843 struct dbcool_softc *sc = device_private(dev);
843 uint8_t reg, bit, cfg; 844 uint8_t reg, cfg;
844 845
845 if ((sc->sc_dc.dc_chip->flags & DBCFLAG_HAS_SHDN) == 0) 846 if ((sc->sc_dc.dc_chip->flags & DBCFLAG_HAS_SHDN) == 0)
846 return true; 847 return true;
847  848
848 if (sc->sc_dc.dc_chip->flags & DBCFLAG_ADT7466) { 849 if (sc->sc_dc.dc_chip->flags & DBCFLAG_ADT7466) {
849 reg = DBCOOL_ADT7466_CONFIG2; 850 reg = DBCOOL_ADT7466_CONFIG2;
850 bit = DBCOOL_ADT7466_CFG2_SHDN; 
851 } else { 851 } else {
852 reg = DBCOOL_CONFIG2_REG; 852 reg = DBCOOL_CONFIG2_REG;
853 bit = DBCOOL_CFG2_SHDN; 
854 } 853 }
855 cfg = sc->sc_dc.dc_readreg(&sc->sc_dc, reg); 854 cfg = sc->sc_dc.dc_readreg(&sc->sc_dc, reg);
856 cfg &= ~sc->sc_suspend; 855 cfg &= ~sc->sc_suspend;
857 sc->sc_dc.dc_writereg(&sc->sc_dc, reg, cfg); 856 sc->sc_dc.dc_writereg(&sc->sc_dc, reg, cfg);
858 857
859 return true; 858 return true;
860 859
861} 860}
862 861
863uint8_t 862uint8_t
864dbcool_readreg(struct dbcool_chipset *dc, uint8_t reg) 863dbcool_readreg(struct dbcool_chipset *dc, uint8_t reg)
865{ 864{
866 uint8_t data = 0; 865 uint8_t data = 0;
@@ -1742,54 +1741,54 @@ dbcool_attach_temp_control(struct dbcool @@ -1742,54 +1741,54 @@ dbcool_attach_temp_control(struct dbcool
1742 SYSCTL_DESCR(dbc_sysctl_table[sysctl_index].desc), 1741 SYSCTL_DESCR(dbc_sysctl_table[sysctl_index].desc),
1743 dbc_sysctl_table[sysctl_index].helper, 1742 dbc_sysctl_table[sysctl_index].helper,
1744 0, (void *)sc, sizeof(int), 1743 0, (void *)sc, sizeof(int),
1745 CTL_HW, sc->sc_root_sysctl_num, 1744 CTL_HW, sc->sc_root_sysctl_num,
1746 sc->sc_sysctl_num[j], 1745 sc->sc_sysctl_num[j],
1747 DBC_PWM_SYSCTL(idx, sysctl_reg), CTL_EOL); 1746 DBC_PWM_SYSCTL(idx, sysctl_reg), CTL_EOL);
1748 1747
1749 return ret; 1748 return ret;
1750} 1749}
1751 1750
1752static void 1751static void
1753dbcool_setup_controllers(struct dbcool_softc *sc) 1752dbcool_setup_controllers(struct dbcool_softc *sc)
1754{ 1753{
1755 int i, j, ret, rw_flag; 1754 int i, j, rw_flag;
1756 uint8_t sysctl_reg; 1755 uint8_t sysctl_reg;
1757 struct chip_id *chip = sc->sc_dc.dc_chip; 1756 struct chip_id *chip = sc->sc_dc.dc_chip;
1758 const struct sysctlnode *me2 = NULL; 1757 const struct sysctlnode *me2 = NULL;
1759 const struct sysctlnode *node = NULL; 1758 const struct sysctlnode *node = NULL;
1760 char name[SYSCTL_NAMELEN]; 1759 char name[SYSCTL_NAMELEN];
1761 1760
1762 for (i = 0; chip->power[i].desc != NULL; i++) { 1761 for (i = 0; chip->power[i].desc != NULL; i++) {
1763 snprintf(name, sizeof(name), "fan_ctl_%d", i); 1762 snprintf(name, sizeof(name), "fan_ctl_%d", i);
1764 ret = sysctl_createv(&sc->sc_sysctl_log, 0, NULL, &me2, 1763 sysctl_createv(&sc->sc_sysctl_log, 0, NULL, &me2,
1765 CTLFLAG_READWRITE | CTLFLAG_OWNDESC, 1764 CTLFLAG_READWRITE | CTLFLAG_OWNDESC,
1766 CTLTYPE_NODE, name, NULL, 1765 CTLTYPE_NODE, name, NULL,
1767 NULL, 0, NULL, 0, 1766 NULL, 0, NULL, 0,
1768 CTL_HW, sc->sc_root_sysctl_num, CTL_CREATE, CTL_EOL); 1767 CTL_HW, sc->sc_root_sysctl_num, CTL_CREATE, CTL_EOL);
1769 1768
1770 for (j = DBC_PWM_BEHAVIOR; j < DBC_PWM_LAST_PARAM; j++) { 1769 for (j = DBC_PWM_BEHAVIOR; j < DBC_PWM_LAST_PARAM; j++) {
1771 if (j == DBC_PWM_MAX_DUTY && 1770 if (j == DBC_PWM_MAX_DUTY &&
1772 (chip->flags & DBCFLAG_HAS_MAXDUTY) == 0) 1771 (chip->flags & DBCFLAG_HAS_MAXDUTY) == 0)
1773 continue; 1772 continue;
1774 sysctl_reg = chip->power[i].power_regs[j]; 1773 sysctl_reg = chip->power[i].power_regs[j];
1775 if (sysctl_reg == DBCOOL_NO_REG) 1774 if (sysctl_reg == DBCOOL_NO_REG)
1776 continue; 1775 continue;
1777 strlcpy(name, dbc_sysctl_table[j].name, sizeof(name)); 1776 strlcpy(name, dbc_sysctl_table[j].name, sizeof(name));
1778 if (dbc_sysctl_table[j].lockable && dbcool_islocked(sc)) 1777 if (dbc_sysctl_table[j].lockable && dbcool_islocked(sc))
1779 rw_flag = CTLFLAG_READONLY | CTLFLAG_OWNDESC; 1778 rw_flag = CTLFLAG_READONLY | CTLFLAG_OWNDESC;
1780 else 1779 else
1781 rw_flag = CTLFLAG_READWRITE | CTLFLAG_OWNDESC; 1780 rw_flag = CTLFLAG_READWRITE | CTLFLAG_OWNDESC;
1782 ret = (sysctl_createv)(&sc->sc_sysctl_log, 0, NULL, 1781 (sysctl_createv)(&sc->sc_sysctl_log, 0, NULL,
1783 &node, rw_flag, 1782 &node, rw_flag,
1784 (j == DBC_PWM_BEHAVIOR)? 1783 (j == DBC_PWM_BEHAVIOR)?
1785 CTLTYPE_STRING:CTLTYPE_INT, 1784 CTLTYPE_STRING:CTLTYPE_INT,
1786 name, 1785 name,
1787 SYSCTL_DESCR(dbc_sysctl_table[j].desc), 1786 SYSCTL_DESCR(dbc_sysctl_table[j].desc),
1788 dbc_sysctl_table[j].helper, 1787 dbc_sysctl_table[j].helper,
1789 0, sc,  1788 0, sc,
1790 ( j == DBC_PWM_BEHAVIOR)? 1789 ( j == DBC_PWM_BEHAVIOR)?
1791 sizeof(dbcool_cur_behav): sizeof(int), 1790 sizeof(dbcool_cur_behav): sizeof(int),
1792 CTL_HW, sc->sc_root_sysctl_num, me2->sysctl_num, 1791 CTL_HW, sc->sc_root_sysctl_num, me2->sysctl_num,
1793 DBC_PWM_SYSCTL(j, sysctl_reg), CTL_EOL); 1792 DBC_PWM_SYSCTL(j, sysctl_reg), CTL_EOL);
1794 } 1793 }
1795 } 1794 }