Sat Sep 14 17:21:19 2013 UTC ()
Add Shared L2 TLB and some cache and tlb entries from the latest document.


(msaitoh)
diff -r1.15 -r1.16 src/sys/arch/x86/include/cacheinfo.h
cvs diff -r1.15 -r1.16 src/sys/arch/x86/include/cacheinfo.h (expand / switch to unified diff)

--- src/sys/arch/x86/include/cacheinfo.h 2013/07/17 15:26:38 1.15
+++ src/sys/arch/x86/include/cacheinfo.h 2013/09/14 17:21:19 1.16
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: cacheinfo.h,v 1.15 2013/07/17 15:26:38 msaitoh Exp $ */ 1/* $NetBSD: cacheinfo.h,v 1.16 2013/09/14 17:21:19 msaitoh Exp $ */
2 2
3#ifndef _X86_CACHEINFO_H_ 3#ifndef _X86_CACHEINFO_H_
4#define _X86_CACHEINFO_H_ 4#define _X86_CACHEINFO_H_
5 5
6struct x86_cache_info { 6struct x86_cache_info {
7 uint8_t cai_index; 7 uint8_t cai_index;
8 uint8_t cai_desc; 8 uint8_t cai_desc;
9 uint8_t cai_associativity; 9 uint8_t cai_associativity;
10 u_int cai_totalsize; /* #entries for TLB, bytes for cache */ 10 u_int cai_totalsize; /* #entries for TLB, bytes for cache */
11 u_int cai_linesize; /* or page size for TLB */ 11 u_int cai_linesize; /* or page size for TLB */
12#ifndef _KERNEL 12#ifndef _KERNEL
13 const char *cai_string; 13 const char *cai_string;
14#endif 14#endif
@@ -20,28 +20,30 @@ struct x86_cache_info { @@ -20,28 +20,30 @@ struct x86_cache_info {
20#define CAI_DTLB2 3 /* Data TLB (2/4M pages) */ 20#define CAI_DTLB2 3 /* Data TLB (2/4M pages) */
21#define CAI_ICACHE 4 /* Instruction cache */ 21#define CAI_ICACHE 4 /* Instruction cache */
22#define CAI_DCACHE 5 /* Data cache */ 22#define CAI_DCACHE 5 /* Data cache */
23#define CAI_L2CACHE 6 /* Level 2 cache */ 23#define CAI_L2CACHE 6 /* Level 2 cache */
24#define CAI_L3CACHE 7 /* Level 3 cache */ 24#define CAI_L3CACHE 7 /* Level 3 cache */
25#define CAI_L1_1GBITLB 8 /* L1 1GB Page instruction TLB */ 25#define CAI_L1_1GBITLB 8 /* L1 1GB Page instruction TLB */
26#define CAI_L1_1GBDTLB 9 /* L1 1GB Page data TLB */ 26#define CAI_L1_1GBDTLB 9 /* L1 1GB Page data TLB */
27#define CAI_L2_1GBITLB 10 /* L2 1GB Page instruction TLB */ 27#define CAI_L2_1GBITLB 10 /* L2 1GB Page instruction TLB */
28#define CAI_L2_1GBDTLB 11 /* L2 1GB Page data TLB */ 28#define CAI_L2_1GBDTLB 11 /* L2 1GB Page data TLB */
29#define CAI_L2_ITLB 12 /* L2 Instruction TLB (4K pages) */ 29#define CAI_L2_ITLB 12 /* L2 Instruction TLB (4K pages) */
30#define CAI_L2_ITLB2 13 /* L2 Instruction TLB (2/4M pages) */ 30#define CAI_L2_ITLB2 13 /* L2 Instruction TLB (2/4M pages) */
31#define CAI_L2_DTLB 14 /* L2 Data TLB (4K pages) */ 31#define CAI_L2_DTLB 14 /* L2 Data TLB (4K pages) */
32#define CAI_L2_DTLB2 15 /* L2 Data TLB (2/4M pages) */ 32#define CAI_L2_DTLB2 15 /* L2 Data TLB (2/4M pages) */
 33#define CAI_L2_STLB 16 /* Shared L2 TLB (4K pages) */
 34#define CAI_L2_STLB2 17 /* Shared L2 TLB (4K/2M pages) */
33 35
34#define CAI_COUNT 16 36#define CAI_COUNT 18
35 37
36/* 38/*
37 * AMD Cache Info: 39 * AMD Cache Info:
38 * 40 *
39 * Barcelona, Phenom: 41 * Barcelona, Phenom:
40 * 42 *
41 * Function 8000.0005 L1 TLB/Cache Information 43 * Function 8000.0005 L1 TLB/Cache Information
42 * EAX -- L1 TLB 2/4MB pages 44 * EAX -- L1 TLB 2/4MB pages
43 * EBX -- L1 TLB 4K pages 45 * EBX -- L1 TLB 4K pages
44 * ECX -- L1 D-cache 46 * ECX -- L1 D-cache
45 * EDX -- L1 I-cache 47 * EDX -- L1 I-cache
46 * 48 *
47 * Function 8000.0006 L2 TLB/Cache Information 49 * Function 8000.0006 L2 TLB/Cache Information
@@ -199,106 +201,119 @@ struct x86_cache_info { @@ -199,106 +201,119 @@ struct x86_cache_info {
199 201
200#ifdef _KERNEL 202#ifdef _KERNEL
201#define __CI_TBL(a,b,c,d,e,f) { a, b, c, d, e } 203#define __CI_TBL(a,b,c,d,e,f) { a, b, c, d, e }
202#else 204#else
203#define __CI_TBL(a,b,c,d,e,f) { a, b, c, d, e, f } 205#define __CI_TBL(a,b,c,d,e,f) { a, b, c, d, e, f }
204#endif 206#endif
205 207
206/* 208/*
207 * XXX Currently organized mostly by cache type, but would be 209 * XXX Currently organized mostly by cache type, but would be
208 * XXX easier to maintain if it were in descriptor type order. 210 * XXX easier to maintain if it were in descriptor type order.
209 */ 211 */
210#define INTEL_CACHE_INFO { \ 212#define INTEL_CACHE_INFO { \
211__CI_TBL(CAI_ITLB, 0x01, 4, 32, 4 * 1024, NULL), \ 213__CI_TBL(CAI_ITLB, 0x01, 4, 32, 4 * 1024, NULL), \
212__CI_TBL(CAI_ITLB, 0xb0, 4,128, 4 * 1024, NULL), \ 
213__CI_TBL(CAI_ITLB2, 0x02, 0xff, 2, 4 * 1024 * 1024, NULL), \ 214__CI_TBL(CAI_ITLB2, 0x02, 0xff, 2, 4 * 1024 * 1024, NULL), \
214__CI_TBL(CAI_DTLB, 0x03, 4, 64, 4 * 1024, NULL), \ 215__CI_TBL(CAI_DTLB, 0x03, 4, 64, 4 * 1024, NULL), \
215__CI_TBL(CAI_DTLB, 0xb3, 4,128, 4 * 1024, NULL), \ 
216__CI_TBL(CAI_DTLB, 0xb4, 4,256, 4 * 1024, NULL), \ 
217__CI_TBL(CAI_DTLB2, 0x04, 4, 8, 4 * 1024 * 1024, NULL), \ 216__CI_TBL(CAI_DTLB2, 0x04, 4, 8, 4 * 1024 * 1024, NULL), \
218__CI_TBL(CAI_DTLB2, 0x05, 4, 32, 4 * 1024 * 1024, NULL), \ 217__CI_TBL(CAI_DTLB2, 0x05, 4, 32, 4 * 1024 * 1024, NULL), \
 218__CI_TBL(CAI_ITLB2, 0x0b, 4, 4, 4 * 1024 * 1024, NULL), \
 219__CI_TBL(CAI_ITLB, 0x4f, 0xff, 32, 4 * 1024, NULL), \
219__CI_TBL(CAI_ITLB, 0x50, 0xff, 64, 4 * 1024, "4K/4M: 64 entries"), \ 220__CI_TBL(CAI_ITLB, 0x50, 0xff, 64, 4 * 1024, "4K/4M: 64 entries"), \
220__CI_TBL(CAI_ITLB, 0x51, 0xff, 64, 4 * 1024, "4K/4M: 128 entries"),\ 221__CI_TBL(CAI_ITLB, 0x51, 0xff, 64, 4 * 1024, "4K/4M: 128 entries"),\
221__CI_TBL(CAI_ITLB, 0x52, 0xff, 64, 4 * 1024, "4K/4M: 256 entries"),\ 222__CI_TBL(CAI_ITLB, 0x52, 0xff, 64, 4 * 1024, "4K/4M: 256 entries"),\
222__CI_TBL(CAI_ITLB, 0x55, 0xff, 64, 4 * 1024, "2M/4M: 7 entries"), \ 223__CI_TBL(CAI_ITLB, 0x55, 0xff, 64, 4 * 1024, "2M/4M: 7 entries"), \
223__CI_TBL(CAI_DTLB2, 0x56, 4, 16, 4 * 1024 * 1024, NULL), \ 224__CI_TBL(CAI_DTLB2, 0x56, 4, 16, 4 * 1024 * 1024, NULL), \
224__CI_TBL(CAI_DTLB2, 0x57, 4, 16, 4 * 1024, NULL), \ 225__CI_TBL(CAI_DTLB2, 0x57, 4, 16, 4 * 1024, NULL), \
225__CI_TBL(CAI_DTLB2, 0x59, 0xff, 16, 4 * 1024, NULL), \ 226__CI_TBL(CAI_DTLB2, 0x59, 0xff, 16, 4 * 1024, NULL), \
226__CI_TBL(CAI_DTLB, 0x5a, 0xff, 64, 4 * 1024, "2M/4M: 32 entries (L0)"), \ 227__CI_TBL(CAI_DTLB, 0x5a, 0xff, 64, 4 * 1024, "2M/4M: 32 entries (L0)"), \
227__CI_TBL(CAI_DTLB, 0x5b, 0xff, 64, 4 * 1024, "4K/4M: 64 entries"), \ 228__CI_TBL(CAI_DTLB, 0x5b, 0xff, 64, 4 * 1024, "4K/4M: 64 entries"), \
228__CI_TBL(CAI_DTLB, 0x5c, 0xff, 64, 4 * 1024, "4K/4M: 128 entries"),\ 229__CI_TBL(CAI_DTLB, 0x5c, 0xff, 64, 4 * 1024, "4K/4M: 128 entries"),\
229__CI_TBL(CAI_DTLB, 0x5d, 0xff, 64, 4 * 1024, "4K/4M: 256 entries"),\ 230__CI_TBL(CAI_DTLB, 0x5d, 0xff, 64, 4 * 1024, "4K/4M: 256 entries"),\
 231__CI_TBL(CAI_ITLB, 0x61, 0xff, 48, 4 * 1024, NULL), \
 232__CI_TBL(CAI_L1_1GBDTLB,0x63, 4, 4,1024*1024 * 1024, NULL), \
 233__CI_TBL(CAI_ITLB2, 0x76, 0xff, 8, 4 * 1024 * 1024, "2M/4M: 8 entries"), \
 234__CI_TBL(CAI_ITLB, 0xb0, 4,128, 4 * 1024, NULL), \
230__CI_TBL(CAI_ITLB, 0xb1, 4, 64, 0, "8 2M/4 4M entries"), \ 235__CI_TBL(CAI_ITLB, 0xb1, 4, 64, 0, "8 2M/4 4M entries"), \
231__CI_TBL(CAI_ITLB, 0xb2, 4, 64, 4 * 1024, NULL), \ 236__CI_TBL(CAI_ITLB, 0xb2, 4, 64, 4 * 1024, NULL), \
 237__CI_TBL(CAI_DTLB, 0xb3, 4,128, 4 * 1024, NULL), \
 238__CI_TBL(CAI_DTLB, 0xb4, 4,256, 4 * 1024, NULL), \
 239__CI_TBL(CAI_ITLB, 0xb5, 8, 64, 4 * 1024, NULL), \
 240__CI_TBL(CAI_ITLB, 0xb6, 8,128, 4 * 1024, NULL), \
 241__CI_TBL(CAI_DTLB, 0xba, 4, 64, 4 * 1024, NULL), \
 242__CI_TBL(CAI_DTLB, 0xc0, 4, 8, 4 * 1024, "4K/4M: 8 entries"), \
 243__CI_TBL(CAI_L2_STLB2, 0xc1, 8,1024, 4 * 1024, "4K/2M: 1024 entries"), \
 244__CI_TBL(CAI_DTLB, 0xc2, 4, 16, 4 * 1024, "2M/4M: 16 entries"), \
 245__CI_TBL(CAI_L2_STLB, 0xca, 4,512, 4 * 1024, "4K/4M: 512 entries"), \
232__CI_TBL(CAI_ICACHE, 0x06, 4, 8 * 1024, 32, NULL), \ 246__CI_TBL(CAI_ICACHE, 0x06, 4, 8 * 1024, 32, NULL), \
233__CI_TBL(CAI_ICACHE, 0x08, 4, 16 * 1024, 32, NULL), \ 247__CI_TBL(CAI_ICACHE, 0x08, 4, 16 * 1024, 32, NULL), \
234__CI_TBL(CAI_ICACHE, 0x09, 4, 32 * 1024, 64, NULL), \ 248__CI_TBL(CAI_ICACHE, 0x09, 4, 32 * 1024, 64, NULL), \
235__CI_TBL(CAI_ICACHE, 0x30, 8, 32 * 1024, 64, NULL), \ 
236__CI_TBL(CAI_DCACHE, 0x0a, 2, 8 * 1024, 32, NULL), \ 249__CI_TBL(CAI_DCACHE, 0x0a, 2, 8 * 1024, 32, NULL), \
237__CI_TBL(CAI_DCACHE, 0x0c, 4, 16 * 1024, 32, NULL), \ 250__CI_TBL(CAI_DCACHE, 0x0c, 4, 16 * 1024, 32, NULL), \
238__CI_TBL(CAI_DCACHE, 0x0d, 4, 16 * 1024, 64, NULL), \ 251__CI_TBL(CAI_DCACHE, 0x0d, 4, 16 * 1024, 64, NULL), \
239__CI_TBL(CAI_DCACHE, 0x0e, 6, 24 * 1024, 64, NULL), \ 252__CI_TBL(CAI_DCACHE, 0x0e, 6, 24 * 1024, 64, NULL), \
240__CI_TBL(CAI_L2CACHE, 0x21, 8, 256 * 1024, 64, NULL), /* L2 (MLC) */ \ 253__CI_TBL(CAI_L2CACHE, 0x21, 8, 256 * 1024, 64, NULL), /* L2 (MLC) */ \
 254__CI_TBL(CAI_L3CACHE, 0x22, 0xff, 512 * 1024, 64, "sectored, 4-way "), \
 255__CI_TBL(CAI_L3CACHE, 0x23, 0xff, 1 * 1024 * 1024, 64, "sectored, 8-way "), \
 256__CI_TBL(CAI_L2CACHE, 0x24, 16, 1 * 1024 * 1024, 64, NULL), \
 257__CI_TBL(CAI_L3CACHE, 0x25, 0xff, 2 * 1024 * 1024, 64, "sectored, 8-way "), \
 258__CI_TBL(CAI_L3CACHE, 0x29, 0xff, 4 * 1024 * 1024, 64, "sectored, 8-way "), \
 259__CI_TBL(CAI_DCACHE, 0x2c, 8, 32 * 1024, 64, NULL), \
 260__CI_TBL(CAI_ICACHE, 0x30, 8, 32 * 1024, 64, NULL), \
241__CI_TBL(CAI_L2CACHE, 0x39, 4, 128 * 1024, 64, NULL), \ 261__CI_TBL(CAI_L2CACHE, 0x39, 4, 128 * 1024, 64, NULL), \
242__CI_TBL(CAI_L2CACHE, 0x3a, 6, 192 * 1024, 64, NULL), \ 262__CI_TBL(CAI_L2CACHE, 0x3a, 6, 192 * 1024, 64, NULL), \
243__CI_TBL(CAI_L2CACHE, 0x3b, 2, 128 * 1024, 64, NULL), \ 263__CI_TBL(CAI_L2CACHE, 0x3b, 2, 128 * 1024, 64, NULL), \
244__CI_TBL(CAI_L2CACHE, 0x3c, 4, 256 * 1024, 64, NULL), \ 264__CI_TBL(CAI_L2CACHE, 0x3c, 4, 256 * 1024, 64, NULL), \
245__CI_TBL(CAI_L2CACHE, 0x3d, 6, 384 * 1024, 64, NULL), \ 265__CI_TBL(CAI_L2CACHE, 0x3d, 6, 384 * 1024, 64, NULL), \
246__CI_TBL(CAI_L2CACHE, 0x3e, 4, 512 * 1024, 64, NULL), \ 266__CI_TBL(CAI_L2CACHE, 0x3e, 4, 512 * 1024, 64, NULL), \
247__CI_TBL(CAI_L2CACHE, 0x40, 0, 0, 0, "not present"), \ 267__CI_TBL(CAI_L2CACHE, 0x40, 0, 0, 0, "not present"), \
248__CI_TBL(CAI_L2CACHE, 0x41, 4, 128 * 1024, 32, NULL), \ 268__CI_TBL(CAI_L2CACHE, 0x41, 4, 128 * 1024, 32, NULL), \
249__CI_TBL(CAI_L2CACHE, 0x42, 4, 256 * 1024, 32, NULL), \ 269__CI_TBL(CAI_L2CACHE, 0x42, 4, 256 * 1024, 32, NULL), \
250__CI_TBL(CAI_L2CACHE, 0x43, 4, 512 * 1024, 32, NULL), \ 270__CI_TBL(CAI_L2CACHE, 0x43, 4, 512 * 1024, 32, NULL), \
251__CI_TBL(CAI_L2CACHE, 0x44, 4, 1 * 1024 * 1024, 32, NULL), \ 271__CI_TBL(CAI_L2CACHE, 0x44, 4, 1 * 1024 * 1024, 32, NULL), \
252__CI_TBL(CAI_L2CACHE, 0x45, 4, 2 * 1024 * 1024, 32, NULL), \ 272__CI_TBL(CAI_L2CACHE, 0x45, 4, 2 * 1024 * 1024, 32, NULL), \
 273__CI_TBL(CAI_L3CACHE, 0x46, 4, 4 * 1024 * 1024, 64, NULL), \
 274__CI_TBL(CAI_L3CACHE, 0x47, 8, 8 * 1024 * 1024, 64, NULL), \
253__CI_TBL(CAI_L2CACHE, 0x48, 12, 3 * 1024 * 1024, 64, NULL), \ 275__CI_TBL(CAI_L2CACHE, 0x48, 12, 3 * 1024 * 1024, 64, NULL), \
254 \ 276 \
255/* 0x49 Is L2 on Xeon MP (Family 0f, Model 06), L3 otherwise */ \ 277/* 0x49 Is L2 on Xeon MP (Family 0f, Model 06), L3 otherwise */ \
256__CI_TBL(CAI_L2CACHE, 0x49, 16, 4 * 1024 * 1024, 64, NULL), \ 278__CI_TBL(CAI_L2CACHE, 0x49, 16, 4 * 1024 * 1024, 64, NULL), \
 279__CI_TBL(CAI_L3CACHE, 0x49, 16, 4 * 1024 * 1024, 64, NULL), \
 280__CI_TBL(CAI_L3CACHE, 0x4a, 12, 6 * 1024 * 1024, 64, NULL), \
 281__CI_TBL(CAI_L3CACHE, 0x4b, 16, 8 * 1024 * 1024, 64, NULL), \
 282__CI_TBL(CAI_L3CACHE, 0x4c, 12,12 * 1024 * 1024, 64, NULL), \
 283__CI_TBL(CAI_L3CACHE, 0x4d, 16,16 * 1024 * 1024, 64, NULL), \
257__CI_TBL(CAI_L2CACHE, 0x4e, 24, 6 * 1024 * 1024, 64, NULL), \ 284__CI_TBL(CAI_L2CACHE, 0x4e, 24, 6 * 1024 * 1024, 64, NULL), \
258__CI_TBL(CAI_DCACHE, 0x60, 8, 16 * 1024, 64, NULL), \ 285__CI_TBL(CAI_DCACHE, 0x60, 8, 16 * 1024, 64, NULL), \
259__CI_TBL(CAI_DCACHE, 0x66, 4, 8 * 1024, 64, NULL), \ 286__CI_TBL(CAI_DCACHE, 0x66, 4, 8 * 1024, 64, NULL), \
260__CI_TBL(CAI_DCACHE, 0x67, 4, 16 * 1024, 64, NULL), \ 287__CI_TBL(CAI_DCACHE, 0x67, 4, 16 * 1024, 64, NULL), \
261__CI_TBL(CAI_DCACHE, 0x2c, 8, 32 * 1024, 64, NULL), \ 
262__CI_TBL(CAI_DCACHE, 0x68, 4, 32 * 1024, 64, NULL), \ 288__CI_TBL(CAI_DCACHE, 0x68, 4, 32 * 1024, 64, NULL), \
263__CI_TBL(CAI_ICACHE, 0x70, 8, 12 * 1024, 64, "12K uOp cache"), \ 289__CI_TBL(CAI_ICACHE, 0x70, 8, 12 * 1024, 64, "12K uOp cache"), \
264__CI_TBL(CAI_ICACHE, 0x71, 8, 16 * 1024, 64, "16K uOp cache"), \ 290__CI_TBL(CAI_ICACHE, 0x71, 8, 16 * 1024, 64, "16K uOp cache"), \
265__CI_TBL(CAI_ICACHE, 0x72, 8, 32 * 1024, 64, "32K uOp cache"), \ 291__CI_TBL(CAI_ICACHE, 0x72, 8, 32 * 1024, 64, "32K uOp cache"), \
266__CI_TBL(CAI_ICACHE, 0x73, 8, 64 * 1024, 64, "64K uOp cache"), \ 292__CI_TBL(CAI_ICACHE, 0x73, 8, 64 * 1024, 64, "64K uOp cache"), \
267__CI_TBL(CAI_L2CACHE, 0x78, 4, 1 * 1024 * 1024, 64, NULL), \ 293__CI_TBL(CAI_L2CACHE, 0x78, 4, 1 * 1024 * 1024, 64, NULL), \
268__CI_TBL(CAI_L2CACHE, 0x79, 8, 128 * 1024, 64, NULL), \ 294__CI_TBL(CAI_L2CACHE, 0x79, 8, 128 * 1024, 64, NULL), \
269__CI_TBL(CAI_L2CACHE, 0x7a, 8, 256 * 1024, 64, NULL), \ 295__CI_TBL(CAI_L2CACHE, 0x7a, 8, 256 * 1024, 64, NULL), \
270__CI_TBL(CAI_L2CACHE, 0x7b, 8, 512 * 1024, 64, NULL), \ 296__CI_TBL(CAI_L2CACHE, 0x7b, 8, 512 * 1024, 64, NULL), \
271__CI_TBL(CAI_L2CACHE, 0x7c, 8, 1 * 1024 * 1024, 64, NULL), \ 297__CI_TBL(CAI_L2CACHE, 0x7c, 8, 1 * 1024 * 1024, 64, NULL), \
272__CI_TBL(CAI_L2CACHE, 0x7d, 8, 2 * 1024 * 1024, 64, NULL), \ 298__CI_TBL(CAI_L2CACHE, 0x7d, 8, 2 * 1024 * 1024, 64, NULL), \
273__CI_TBL(CAI_L2CACHE, 0x7f, 2, 512 * 1024, 64, NULL), \ 299__CI_TBL(CAI_L2CACHE, 0x7f, 2, 512 * 1024, 64, NULL), \
274__CI_TBL(CAI_L2CACHE, 0x80, 8, 512 * 1024, 64, NULL), \ 300__CI_TBL(CAI_L2CACHE, 0x80, 8, 512 * 1024, 64, NULL), \
275__CI_TBL(CAI_L2CACHE, 0x82, 8, 256 * 1024, 32, NULL), \ 301__CI_TBL(CAI_L2CACHE, 0x82, 8, 256 * 1024, 32, NULL), \
276__CI_TBL(CAI_L2CACHE, 0x83, 8, 512 * 1024, 32, NULL), \ 302__CI_TBL(CAI_L2CACHE, 0x83, 8, 512 * 1024, 32, NULL), \
277__CI_TBL(CAI_L2CACHE, 0x84, 8, 1 * 1024 * 1024, 32, NULL), \ 303__CI_TBL(CAI_L2CACHE, 0x84, 8, 1 * 1024 * 1024, 32, NULL), \
278__CI_TBL(CAI_L2CACHE, 0x85, 8, 2 * 1024 * 1024, 32, NULL), \ 304__CI_TBL(CAI_L2CACHE, 0x85, 8, 2 * 1024 * 1024, 32, NULL), \
279__CI_TBL(CAI_L2CACHE, 0x86, 4, 512 * 1024, 64, NULL), \ 305__CI_TBL(CAI_L2CACHE, 0x86, 4, 512 * 1024, 64, NULL), \
280__CI_TBL(CAI_L2CACHE, 0x87, 8, 1 * 1024 * 1024, 64, NULL), \ 306__CI_TBL(CAI_L2CACHE, 0x87, 8, 1 * 1024 * 1024, 64, NULL), \
281__CI_TBL(CAI_L3CACHE, 0x22, 0xff, 512 * 1024, 64, "sectored, 4-way "), \ 
282__CI_TBL(CAI_L3CACHE, 0x23, 0xff, 1 * 1024 * 1024, 64, "sectored, 8-way "), \ 
283__CI_TBL(CAI_L3CACHE, 0x25, 0xff, 2 * 1024 * 1024, 64, "sectored, 8-way "), \ 
284__CI_TBL(CAI_L3CACHE, 0x29, 0xff, 4 * 1024 * 1024, 64, "sectored, 8-way "), \ 
285__CI_TBL(CAI_L3CACHE, 0x46, 4, 4 * 1024 * 1024, 64, NULL), \ 
286__CI_TBL(CAI_L3CACHE, 0x47, 8, 8 * 1024 * 1024, 64, NULL), \ 
287__CI_TBL(CAI_L3CACHE, 0x49, 16, 4 * 1024 * 1024, 64, NULL), \ 
288__CI_TBL(CAI_L3CACHE, 0x4a, 12, 6 * 1024 * 1024, 64, NULL), \ 
289__CI_TBL(CAI_L3CACHE, 0x4b, 16, 8 * 1024 * 1024, 64, NULL), \ 
290__CI_TBL(CAI_L3CACHE, 0x4c, 12,12 * 1024 * 1024, 64, NULL), \ 
291__CI_TBL(CAI_L3CACHE, 0x4d, 16,16 * 1024 * 1024, 64, NULL), \ 
292__CI_TBL(CAI_L3CACHE, 0xd0, 4, 512 * 1024, 64, NULL), \ 307__CI_TBL(CAI_L3CACHE, 0xd0, 4, 512 * 1024, 64, NULL), \
293__CI_TBL(CAI_L3CACHE, 0xd1, 4, 1 * 1024 * 1024, 64, NULL), \ 308__CI_TBL(CAI_L3CACHE, 0xd1, 4, 1 * 1024 * 1024, 64, NULL), \
294__CI_TBL(CAI_L3CACHE, 0xd2, 4, 2 * 1024 * 1024, 64, NULL), \ 309__CI_TBL(CAI_L3CACHE, 0xd2, 4, 2 * 1024 * 1024, 64, NULL), \
295__CI_TBL(CAI_L3CACHE, 0xd6, 8, 1 * 1024 * 1024, 64, NULL), \ 310__CI_TBL(CAI_L3CACHE, 0xd6, 8, 1 * 1024 * 1024, 64, NULL), \
296__CI_TBL(CAI_L3CACHE, 0xd7, 8, 2 * 1024 * 1024, 64, NULL), \ 311__CI_TBL(CAI_L3CACHE, 0xd7, 8, 2 * 1024 * 1024, 64, NULL), \
297__CI_TBL(CAI_L3CACHE, 0xd8, 8, 4 * 1024 * 1024, 64, NULL), \ 312__CI_TBL(CAI_L3CACHE, 0xd8, 8, 4 * 1024 * 1024, 64, NULL), \
298__CI_TBL(CAI_L3CACHE, 0xdc, 12, 3 * 512 * 1024, 64, NULL), \ 313__CI_TBL(CAI_L3CACHE, 0xdc, 12, 3 * 512 * 1024, 64, NULL), \
299__CI_TBL(CAI_L3CACHE, 0xdd, 12, 3 * 1024 * 1024, 64, NULL), \ 314__CI_TBL(CAI_L3CACHE, 0xdd, 12, 3 * 1024 * 1024, 64, NULL), \
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