Sun Oct 20 09:30:41 2013 UTC ()

Use cpuctrlmask in the arm1[01] case.


(skrll)

diff -r1.125 -r1.126 src/sys/arch/arm/arm/cpufunc.c

--- src/sys/arch/arm/arm/cpufunc.c 2013/08/18 07:57:27	1.125
+++ src/sys/arch/arm/arm/cpufunc.c 2013/10/20 09:30:41	1.126

 @@ -1,14 +1,14 @@
-/*	$NetBSD: cpufunc.c,v 1.125 2013/08/18 07:57:27 matt Exp $	*/
+/*	$NetBSD: cpufunc.c,v 1.126 2013/10/20 09:30:41 skrll Exp $	*/
 /*
  * arm7tdmi support code Copyright (c) 2001 John Fremlin
  * arm8 support code Copyright (c) 1997 ARM Limited
  * arm8 support code Copyright (c) 1997 Causality Limited
  * arm9 support code Copyright (C) 2001 ARM Ltd
  * arm11 support code Copyright (c) 2007 Microsoft
  * cortexa8 support code Copyright (c) 2008 3am Software Foundry
  * cortexa8 improvements Copyright (c) Goeran Weinholt
  * Copyright (c) 1997 Mark Brinicombe.
  * Copyright (c) 1997 Causality Limited
  * All rights reserved.
+ *
 @@ -39,27 +39,27 @@
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
+ *
  * RiscBSD kernel project
+ *
  * cpufuncs.c
+ *
  * C functions for supporting CPU / MMU / TLB specific operations.
+ *
  * Created	: 30/01/97
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.125 2013/08/18 07:57:27 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.126 2013/10/20 09:30:41 skrll Exp $");
 #include "opt_compat_netbsd.h"
 #include "opt_cpuoptions.h"
 #include "opt_perfctrs.h"
 #include <sys/types.h>
 #include <sys/param.h>
 #include <sys/pmc.h>
 #include <sys/systm.h>
 #include <machine/cpu.h>
 #include <machine/bootconfig.h>
 #include <arch/arm/arm/disassem.h>
 @@ -2861,27 +2861,27 @@ arm10_setup(char *args)
 #ifndef ARM_HAS_VBAR
 	if (vector_page == ARM_VECTORS_HIGH)
 		cpuctrl |= CPU_CONTROL_VECRELOC;
 #endif
 	/* Clear out the cache */
 	cpu_idcache_wbinv_all();
 	/* Now really make sure they are clean.  */
 	__asm volatile ("mcr\tp15, 0, r0, c7, c7, 0" : : );
 	/* Set the control register */
 	curcpu()->ci_ctrl = cpuctrl;
-	cpu_control(0xffffffff, cpuctrl);
+	cpu_control(cpuctrlmask, cpuctrl);
 	/* And again. */
 	cpu_idcache_wbinv_all();
+}
 #endif	/* CPU_ARM9E || CPU_ARM10 */
 #if defined(CPU_ARM11)
 struct cpu_option arm11_options[] = {
 	{ "cpu.cache",		BIC, OR,  (CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE) },
 	{ "cpu.nocache",	OR,  BIC, (CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE) },
 	{ "arm11.cache",	BIC, OR,  (CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE) },
 	{ "arm11.icache",	BIC, OR,  CPU_CONTROL_IC_ENABLE },
 	{ "arm11.dcache",	BIC, OR,  CPU_CONTROL_DC_ENABLE },
 @@ -2920,27 +2920,27 @@ arm11_setup(char *args)
 #endif
 	/* Clear out the cache */
 	cpu_idcache_wbinv_all();
 	/* Now really make sure they are clean.  */
 	__asm volatile ("mcr\tp15, 0, r0, c7, c7, 0" : : );
 	/* Allow detection code to find the VFP if it's fitted.  */
 	__asm volatile ("mcr\tp15, 0, %0, c1, c0, 2" : : "r" (0x0fffffff));
 	/* Set the control register */
 	curcpu()->ci_ctrl = cpuctrl;
-	cpu_control(0xffffffff, cpuctrl);
+	cpu_control(cpuctrlmask, cpuctrl);
 	/* And again. */
 	cpu_idcache_wbinv_all();
+}
 #endif	/* CPU_ARM11 */
 #if defined(CPU_ARM11MPCORE)
 void
 arm11mpcore_setup(char *args)
+{
 	int cpuctrl, cpuctrlmask;