| @@ -1,14 +1,14 @@ | | | @@ -1,14 +1,14 @@ |
| 1 | /* $NetBSD: cpu.h,v 1.108 2014/01/09 12:51:27 macallan Exp $ */ | | 1 | /* $NetBSD: cpu.h,v 1.109 2014/01/09 20:28:23 palle Exp $ */ |
| 2 | | | 2 | |
| 3 | /* | | 3 | /* |
| 4 | * Copyright (c) 1992, 1993 | | 4 | * Copyright (c) 1992, 1993 |
| 5 | * The Regents of the University of California. All rights reserved. | | 5 | * The Regents of the University of California. All rights reserved. |
| 6 | * | | 6 | * |
| 7 | * This software was developed by the Computer Systems Engineering group | | 7 | * This software was developed by the Computer Systems Engineering group |
| 8 | * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and | | 8 | * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and |
| 9 | * contributed to Berkeley. | | 9 | * contributed to Berkeley. |
| 10 | * | | 10 | * |
| 11 | * All advertising materials mentioning features or use of this software | | 11 | * All advertising materials mentioning features or use of this software |
| 12 | * must display the following acknowledgement: | | 12 | * must display the following acknowledgement: |
| 13 | * This product includes software developed by the University of | | 13 | * This product includes software developed by the University of |
| 14 | * California, Lawrence Berkeley Laboratory. | | 14 | * California, Lawrence Berkeley Laboratory. |
| @@ -164,31 +164,32 @@ struct cpu_info { | | | @@ -164,31 +164,32 @@ struct cpu_info { |
| 164 | kmutex_t ci_ctx_lock; | | 164 | kmutex_t ci_ctx_lock; |
| 165 | int ci_pmap_next_ctx; | | 165 | int ci_pmap_next_ctx; |
| 166 | int ci_numctx; | | 166 | int ci_numctx; |
| 167 | paddr_t *ci_ctxbusy; | | 167 | paddr_t *ci_ctxbusy; |
| 168 | LIST_HEAD(, pmap) ci_pmap_ctxlist; | | 168 | LIST_HEAD(, pmap) ci_pmap_ctxlist; |
| 169 | | | 169 | |
| 170 | /* | | 170 | /* |
| 171 | * The TSBs are per cpu too (since MMU context differs between | | 171 | * The TSBs are per cpu too (since MMU context differs between |
| 172 | * cpus). These are just caches for the TLBs. | | 172 | * cpus). These are just caches for the TLBs. |
| 173 | */ | | 173 | */ |
| 174 | pte_t *ci_tsb_dmmu; | | 174 | pte_t *ci_tsb_dmmu; |
| 175 | pte_t *ci_tsb_immu; | | 175 | pte_t *ci_tsb_immu; |
| 176 | | | 176 | |
| 177 | /* this field is used by SUN4V */ | | 177 | /* MMU Fault Status Area (sun4v). |
| 178 | /* MMU Fault Status Area. Will be initialized to the physical | | 178 | * Will be initialized to the physical address of the bottom of |
| 179 | address of the bottom of the interrupt stack */ | | 179 | * the interrupt stack. |
| | | 180 | */ |
| 180 | paddr_t ci_mmfsa; | | 181 | paddr_t ci_mmfsa; |
| 181 | | | 182 | |
| 182 | /* probe fault in PCI config space reads */ | | 183 | /* probe fault in PCI config space reads */ |
| 183 | bool ci_pci_probe; | | 184 | bool ci_pci_probe; |
| 184 | bool ci_pci_fault; | | 185 | bool ci_pci_fault; |
| 185 | | | 186 | |
| 186 | volatile void *ci_ddb_regs; /* DDB regs */ | | 187 | volatile void *ci_ddb_regs; /* DDB regs */ |
| 187 | }; | | 188 | }; |
| 188 | | | 189 | |
| 189 | #endif /* _KERNEL || _KMEMUSER */ | | 190 | #endif /* _KERNEL || _KMEMUSER */ |
| 190 | | | 191 | |
| 191 | #ifdef _KERNEL | | 192 | #ifdef _KERNEL |
| 192 | | | 193 | |
| 193 | #define CPUF_PRIMARY 1 | | 194 | #define CPUF_PRIMARY 1 |
| 194 | | | 195 | |