 @@ -1,14 +1,14 @@
-/*	$NetBSD: timer.c,v 1.31 2013/10/19 19:40:23 mrg Exp $ */
+/*	$NetBSD: timer.c,v 1.32 2014/01/19 00:22:33 mrg Exp $ */
 /*
  * Copyright (c) 1992, 1993
  *	The Regents of the University of California.  All rights reserved.
  * Copyright (c) 1994 Gordon W. Ross
  * Copyright (c) 1993 Adam Glass
  * Copyright (c) 1996 Paul Kranenburg
  * Copyright (c) 1996
  * 	The President and Fellows of Harvard College. All rights reserved.
+ *
  * This software was developed by the Computer Systems Engineering group
  * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
  * contributed to Berkeley.
 @@ -50,54 +50,54 @@
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
+ *
  *	@(#)clock.c	8.1 (Berkeley) 6/11/93
  */
 /*
  * Kernel clocks provided by "timer" device.  The hardclock is provided by
  * the timer register (aka system counter).  The statclock is provided by
  * per CPU counter register(s) (aka processor counter(s)).
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: timer.c,v 1.31 2013/10/19 19:40:23 mrg Exp $");
+__KERNEL_RCSID(0, "$NetBSD: timer.c,v 1.32 2014/01/19 00:22:33 mrg Exp $");
 #include <sys/param.h>
 #include <sys/kernel.h>
 #include <sys/device.h>
 #include <sys/systm.h>
 #include <sys/timetc.h>
 #include <machine/autoconf.h>
 #include <sys/bus.h>
 #include <sparc/sparc/timerreg.h>
 #include <sparc/sparc/timervar.h>
 static struct intrhand level10;
 static struct intrhand level14;
 static u_int timer_get_timecount(struct timecounter *);
 void *sched_cookie;
 /*
  * timecounter local state
  */
 static struct counter {
 	volatile u_int *cntreg;	/* counter register */
 	u_int limit;		/* limit we count up to */
-	u_int offset;		/* accumulated offet due to wraps */
+	u_int offset;		/* accumulated offset due to wraps */
 	u_int shift;		/* scaling for valid bits */
 	u_int mask;		/* valid bit mask */
 } cntr;
 /*
  * define timecounter
  */
 static struct timecounter counter_timecounter = {
 	timer_get_timecount,	/* get_timecount */
 ,			/* no poll_pps */
 	~0u,			/* counter_mask */
 ,                      /* frequency - set at initialisation */
 @@ -107,32 +107,31 @@ static struct timecounter counter_timeco
 };
 /*
  * timer_get_timecount provide current counter value
  */
 static u_int
 timer_get_timecount(struct timecounter *tc)
+{
 	struct counter *ctr = (struct counter *)tc->tc_priv;
 	u_int c, res, r;
 	int s;
 	s = splhigh();
 	res = c = *ctr->cntreg;
-	res  &= ~TMR_LIMIT;
+	res &= ~TMR_LIMIT;
 	if (c != res) {
 		r = ctr->limit;
 	} else {
 		r = 0;
+	}
 	res >>= ctr->shift;
 	res  &= ctr->mask;
 	res += r + ctr->offset;
 	splx(s);
 @@ -145,27 +144,26 @@ tickle_tc(void)
+{
 	if (timecounter->tc_get_timecount == timer_get_timecount) {
 		cntr.offset += cntr.limit;
+	}
+}
 /*
  * sun4/sun4c/sun4m common timer attach code
  */
 void
 timerattach(volatile int *cntreg, volatile int *limreg)
+{
 	u_int prec = 0, t0;
 	void    (*sched_intr_fn)(void *);
 	/*
 	 * Calibrate delay() by tweaking the magic constant
 	 * until a delay(100) actually reads (at least) 100 us on the clock.
 	 * Note: sun4m clocks tick with 500ns periods.
 	 */
 	for (timerblurb = 1; ; timerblurb++) {
 		int discard;
 		u_int t1;
 		/* Reset counter register by writing some large limit value */
 		discard = *limreg;
 		__USE(discard);
 @@ -188,56 +186,50 @@ timerattach(volatile int *cntreg, volati
+	}
 	/* find lowest active bit */
 	for (t0 = 0; t0 < TMR_SHIFT; t0++)
 		if ((1 << t0) & prec)
 			break;
 	cntr.shift = t0;
 	cntr.mask = (1 << (31-t0))-1;
 	counter_timecounter.tc_frequency = 1000000 * (TMR_SHIFT - t0 + 1);
 	printf(": delay constant %d, frequency = %" PRIu64 " Hz\n",
 	       timerblurb, counter_timecounter.tc_frequency);
 printf("timer: limit %u shift %u mask %x\n", cntr.limit, cntr.shift, cntr.mask);
 #if defined(SUN4) || defined(SUN4C)
 	if (CPU_ISSUN4 || CPU_ISSUN4C) {
 		timer_init = timer_init_4;
 		sched_intr_fn = schedintr;
 		level10.ih_fun = clockintr_4;
 		level14.ih_fun = statintr_4;
 		cntr.limit = tmr_ustolim(tick);
+	}
 #endif
 #if defined(SUN4M)
 	if (CPU_ISSUN4M) {
 		timer_init = timer_init_4m;
 #if defined(MULTIPROCESSOR)
 		if (sparc_ncpus > 1)
 			sched_intr_fn = schedintr_4m;
 		else
 #endif
 			sched_intr_fn = schedintr;
 		level10.ih_fun = clockintr_4m;
 		level14.ih_fun = statintr_4m;
 		cntr.limit = tmr_ustolim4m(tick);
+	}
 #endif
 	/* link interrupt handlers */
 	intr_establish(10, 0, &level10, NULL, true);
 	intr_establish(14, 0, &level14, NULL, true);
 	/* Establish a soft interrupt at a lower level for schedclock */
-	sched_cookie = sparc_softintr_establish(IPL_SCHED, sched_intr_fn, NULL);
+	sched_cookie = sparc_softintr_establish(IPL_SCHED, schedintr, NULL);
 	if (sched_cookie == NULL)
 		panic("timerattach: cannot establish schedintr");
 	cntr.cntreg = cntreg;
 	cntr.limit >>= cntr.shift;
 	tc_init(&counter_timecounter);
+}
 /*
  * Both sun4 and sun4m can attach a timer on obio.
  * The sun4m OPENPROM calls the timer the "counter".
  * The sun4 timer must be probed.

 @@ -1,14 +1,14 @@
-/*	$NetBSD: timer_sun4m.c,v 1.29 2013/11/16 23:54:01 mrg Exp $	*/
+/*	$NetBSD: timer_sun4m.c,v 1.30 2014/01/19 00:22:33 mrg Exp $	*/
 /*
  * Copyright (c) 1992, 1993
  *	The Regents of the University of California.  All rights reserved.
  * Copyright (c) 1994 Gordon W. Ross
  * Copyright (c) 1993 Adam Glass
  * Copyright (c) 1996 Paul Kranenburg
  * Copyright (c) 1996
  * 	The President and Fellows of Harvard College. All rights reserved.
+ *
  * This software was developed by the Computer Systems Engineering group
  * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
  * contributed to Berkeley.
 @@ -48,115 +48,140 @@
  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
+ *
  *	@(#)clock.c	8.1 (Berkeley) 6/11/93
  */
 /*
  * Sun4m timer support.
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: timer_sun4m.c,v 1.29 2013/11/16 23:54:01 mrg Exp $");
+__KERNEL_RCSID(0, "$NetBSD: timer_sun4m.c,v 1.30 2014/01/19 00:22:33 mrg Exp $");
 #include <sys/param.h>
 #include <sys/kernel.h>
 #include <sys/device.h>
 #include <sys/systm.h>
 #include <sys/cpu.h>
 #include <machine/autoconf.h>
 #include <sys/bus.h>
 #include <sparc/sparc/vaddrs.h>
 #include <sparc/sparc/cpuvar.h>
 #include <sparc/sparc/timerreg.h>
 #include <sparc/sparc/timervar.h>
 struct timer_4m		*timerreg4m;
 #define	counterreg4m	cpuinfo.counterreg_4m
 /*
  * SMP hardclock handler.
  */
 #define IPL_HARDCLOCK	10
 /*
  * Set up the real-time and statistics clocks.
  * Leave stathz 0 only if no alternative timer is available.
+ *
  * The frequencies of these clocks must be an even number of microseconds.
  */
 void
 timer_init_4m(void)
+{
 	struct cpu_info *cpi;
 	CPU_INFO_ITERATOR n;
 	timerreg4m->t_limit = tmr_ustolim4m(tick);
 	for (CPU_INFO_FOREACH(n, cpi)) {
 		cpi->counterreg_4m->t_limit = tmr_ustolim4m(statint);
+	}
 	icr_si_bic(SINTR_T);
+}
-void
+#ifdef MULTIPROCESSOR
-schedintr_4m(void *v)
+/*
  * Handle SMP hardclock() calling for this CPU.
  */
 static void
 hardclock_ipi(void *cap)
+{
 	int s = splsched();
-	kpreempt_disable();
+	hardclock((struct clockframe *)cap);
 	splx(s);
+}
 #endif
 /*
  * Call hardclock on all CPUs.
  */
 static void
 handle_hardclock(struct clockframe *cap)
+{
 	int s;
 #ifdef MULTIPROCESSOR
-	/*
+	struct cpu_info *cpi;
-	 * We call hardclock() here so that we make sure it is called on
+	CPU_INFO_ITERATOR n;
 	 * all CPUs.  This function ends up being called on sun4m systems
 	 * every tick.
 	 */
 	if (!CPU_IS_PRIMARY(curcpu()))
 		hardclock(v);
-	/*
+	for (CPU_INFO_FOREACH(n, cpi)) {
-	 * The factor 8 is only valid for stathz==100.
+		if (cpi == cpuinfo.ci_self) {
-	 * See also clock.c
+			KASSERT(CPU_IS_PRIMARY(cpi));
-	 */
+			continue;
 	if ((++cpuinfo.ci_schedstate.spc_schedticks & 7) == 0 && schedhz != 0)
 		raise_ipi(cpi, IPL_HARDCLOCK);
+	}
 #endif
-		schedclock(curlwp);
+	s = splsched();
-	kpreempt_enable();
+	hardclock(cap);
 	splx(s);
+}
 /*
  * Level 10 (clock) interrupts from system counter.
  */
 int
 clockintr_4m(void *cap)
+{
 	KASSERT(CPU_IS_PRIMARY(curcpu()));
 	/*
 	 * XXX this needs to be fixed in a more general way
 	 * problem is that the kernel enables interrupts and THEN
 	 * sets up clocks. In between there's an opportunity to catch
 	 * a timer interrupt - if we call hardclock() at that point we'll
 	 * panic
 	 * so for now just bail when cold
+	 *
 	 * For MP, we defer calling hardclock() to the schedintr so
 	 * that we call it on all cpus.
 	 */
 	if (cold)
 		return 0;
 	kpreempt_disable();
 	/* read the limit register to clear the interrupt */
 	*((volatile int *)&timerreg4m->t_limit);
 	tickle_tc();
 	hardclock((struct clockframe *)cap);
 	/*
 	 * We don't have a system-clock per-cpu, and we'd like to keep
 	 * the per-cpu timer for the statclock, so, send an IPI to
 	 * everyone to call hardclock.
 	 */
 	handle_hardclock(cap);
 	kpreempt_enable();
 	return (1);
+}
 /*
  * Level 14 (stat clock) interrupts from processor counter.
  */
 int
 statintr_4m(void *cap)
+{
 	struct clockframe *frame = cap;
 	u_long newint;
 @@ -173,43 +198,39 @@ statintr_4m(void *cap)
 	newint = new_interval();
 	/*
 	 * Use the `non-resetting' limit register, so we don't
 	 * loose the counter ticks that happened since this
 	 * interrupt was raised.
 	 */
 	counterreg4m->t_limit_nr = tmr_ustolim4m(newint);
 	/*
 	 * The factor 8 is only valid for stathz==100.
 	 * See also clock.c
 	 */
 #if !defined(MULTIPROCESSOR)
 	if ((++cpuinfo.ci_schedstate.spc_schedticks & 7) == 0 && schedhz != 0) {
 #endif
 		if (CLKF_LOPRI(frame, IPL_SCHED)) {
 			/* No need to schedule a soft interrupt */
 			spllowerschedclock();
-			schedintr_4m(cap);
+			schedintr(cap);
 		} else {
 			/*
 			 * We're interrupting a thread that may have the
-			 * scheduler lock; run schedintr_4m() on this CPU later.
+			 * scheduler lock; run schedintr() on this CPU later.
 			 */
 			raise_ipi(&cpuinfo, IPL_SCHED); /* sched_cookie->pil */
+		}
 #if !defined(MULTIPROCESSOR)
+	}
 #endif
 	kpreempt_enable();
 	return (1);
+}
 void
 timerattach_obio_4m(device_t parent, device_t self, void *aux)
+{
 	union obio_attach_args *uoba = aux;
 	struct sbus_attach_args *sa = &uoba->uoba_sbus;
 	struct cpu_info *cpi;
 	bus_space_handle_t bh;
 	int i;
 @@ -251,18 +272,34 @@ timerattach_obio_4m(device_t parent, dev
 		if (sbus_bus_map(sa->sa_bustag,
 				 sa->sa_reg[i].oa_space,
 				 sa->sa_reg[i].oa_base,
 				 sizeof(struct timer_4m),
 				 BUS_SPACE_MAP_LINEAR,
 				 &bh) != 0) {
 			printf(": can't map CPU counter %d\n", i);
 			return;
+		}
 		cpi->counterreg_4m = (struct counter_4m *)bh;
+	}
 #if defined(MULTIPROCESSOR)
 	if (sparc_ncpus > 1) {
 		/*
 		 * Note that we don't actually use this cookie after checking
 		 * it was establised, we call directly via raise_ipi() on
 		 * IPL_HARDCLOCK.
 		 */
 		void *hardclock_cookie;
 		hardclock_cookie = sparc_softintr_establish(IPL_HARDCLOCK,
 		    hardclock_ipi, NULL);
 		if (hardclock_cookie == NULL)
 			panic("timerattach: cannot establish hardclock_intr");
+	}
 #endif
 	/* Put processor counter in "timer" mode */
 	timerreg4m->t_cfg = 0;
 	timerattach(&timerreg4m->t_counter, &timerreg4m->t_limit);
+}

 @@ -1,14 +1,14 @@
-/*	$NetBSD: timervar.h,v 1.11 2012/07/29 00:04:05 matt Exp $	*/
+/*	$NetBSD: timervar.h,v 1.12 2014/01/19 00:22:33 mrg Exp $	*/
 /*
  * Copyright (c) 1992, 1993
  *	The Regents of the University of California.  All rights reserved.
+ *
  * This software was developed by the Computer Systems Engineering group
  * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
  * contributed to Berkeley.
+ *
  * All advertising materials mentioning features or use of this software
  * must display the following acknowledgement:
  *	This product includes software developed by the University of
  *	California, Lawrence Berkeley Laboratory.
 @@ -40,43 +40,42 @@
 #include "opt_sparc_arch.h"
 #if defined(SUN4) || defined(SUN4C)
 int	clockintr_4(void *);
 int	statintr_4(void *);
 void	timer_init_4(void);
 void	timerattach_obio_4(device_t, device_t, void *);
 void	timerattach_mainbus_4c(device_t, device_t, void *);
 #endif /* SUN4 || SUN4C */
 #if defined(SUN4M)
 void	schedintr_4m(void *);
 int	clockintr_4m(void *);
 int	statintr_4m(void *);
 void	timer_init_4m(void);
 void	timerattach_obio_4m(device_t, device_t, void *);
 #endif /* SUN4M */
 /* Imported from clock.c: */
 extern int statvar, statmin, statint;
 extern int timerblurb;
 extern void (*timer_init)(void);
 extern void tickle_tc(void);
 /* Common timer attach routine in timer.c: */
 void	timerattach(volatile int *, volatile int *);
-extern void	*sched_cookie;	/* for schedclock() interrupts */
+extern void	*sched_cookie;		/* for schedclock() interrupts */
 static inline u_long __attribute__((__unused__))
 new_interval(void)
+{
 	u_long newint, r, var;
 	/*
 	 * Compute new randomized interval.  The intervals are uniformly
 	 * distributed on [statint - statvar / 2, statint + statvar / 2],
 	 * and therefore have mean statint, giving a stathz frequency clock.
 	 */
 	var = statvar;
 	do {