| @@ -1,14 +1,14 @@ | | | @@ -1,14 +1,14 @@ |
1 | /* $NetBSD: bcm53xx_board.c,v 1.17.2.2 2014/02/15 16:18:36 matt Exp $ */ | | 1 | /* $NetBSD: bcm53xx_board.c,v 1.17.2.3 2014/02/19 23:19:57 matt Exp $ */ |
2 | /*- | | 2 | /*- |
3 | * Copyright (c) 2012 The NetBSD Foundation, Inc. | | 3 | * Copyright (c) 2012 The NetBSD Foundation, Inc. |
4 | * All rights reserved. | | 4 | * All rights reserved. |
5 | * | | 5 | * |
6 | * This code is derived from software contributed to The NetBSD Foundation | | 6 | * This code is derived from software contributed to The NetBSD Foundation |
7 | * by Matt Thomas of 3am Software Foundry. | | 7 | * by Matt Thomas of 3am Software Foundry. |
8 | * | | 8 | * |
9 | * Redistribution and use in source and binary forms, with or without | | 9 | * Redistribution and use in source and binary forms, with or without |
10 | * modification, are permitted provided that the following conditions | | 10 | * modification, are permitted provided that the following conditions |
11 | * are met: | | 11 | * are met: |
12 | * 1. Redistributions of source code must retain the above copyright | | 12 | * 1. Redistributions of source code must retain the above copyright |
13 | * notice, this list of conditions and the following disclaimer. | | 13 | * notice, this list of conditions and the following disclaimer. |
14 | * 2. Redistributions in binary form must reproduce the above copyright | | 14 | * 2. Redistributions in binary form must reproduce the above copyright |
| @@ -19,32 +19,33 @@ | | | @@ -19,32 +19,33 @@ |
19 | * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED | | 19 | * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED |
20 | * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR | | 20 | * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR |
21 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS | | 21 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS |
22 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR | | 22 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
23 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF | | 23 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
24 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS | | 24 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
25 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN | | 25 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
26 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) | | 26 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
27 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE | | 27 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
28 | * POSSIBILITY OF SUCH DAMAGE. | | 28 | * POSSIBILITY OF SUCH DAMAGE. |
29 | */ | | 29 | */ |
30 | | | 30 | |
31 | #include "opt_broadcom.h" | | 31 | #include "opt_broadcom.h" |
| | | 32 | #include "arml2cc.h" |
32 | | | 33 | |
33 | #define _ARM32_BUS_DMA_PRIVATE | | 34 | #define _ARM32_BUS_DMA_PRIVATE |
34 | | | 35 | |
35 | #include <sys/cdefs.h> | | 36 | #include <sys/cdefs.h> |
36 | | | 37 | |
37 | __KERNEL_RCSID(1, "$NetBSD: bcm53xx_board.c,v 1.17.2.2 2014/02/15 16:18:36 matt Exp $"); | | 38 | __KERNEL_RCSID(1, "$NetBSD: bcm53xx_board.c,v 1.17.2.3 2014/02/19 23:19:57 matt Exp $"); |
38 | | | 39 | |
39 | #include <sys/param.h> | | 40 | #include <sys/param.h> |
40 | #include <sys/bus.h> | | 41 | #include <sys/bus.h> |
41 | #include <sys/cpu.h> | | 42 | #include <sys/cpu.h> |
42 | #include <sys/device.h> | | 43 | #include <sys/device.h> |
43 | | | 44 | |
44 | #include <prop/proplib.h> | | 45 | #include <prop/proplib.h> |
45 | | | 46 | |
46 | #include <net/if.h> | | 47 | #include <net/if.h> |
47 | #include <net/if_ether.h> | | 48 | #include <net/if_ether.h> |
48 | | | 49 | |
49 | #define CCA_PRIVATE | | 50 | #define CCA_PRIVATE |
50 | #define CRU_PRIVATE | | 51 | #define CRU_PRIVATE |
| @@ -73,28 +74,28 @@ struct arm32_dma_range bcm53xx_dma_range | | | @@ -73,28 +74,28 @@ struct arm32_dma_range bcm53xx_dma_range |
73 | .dr_sysbase = 0x80000000, | | 74 | .dr_sysbase = 0x80000000, |
74 | .dr_busbase = 0x80000000, | | 75 | .dr_busbase = 0x80000000, |
75 | .dr_len = 0x10000000, | | 76 | .dr_len = 0x10000000, |
76 | }, [1] = { | | 77 | }, [1] = { |
77 | .dr_sysbase = 0x90000000, | | 78 | .dr_sysbase = 0x90000000, |
78 | .dr_busbase = 0x90000000, | | 79 | .dr_busbase = 0x90000000, |
79 | }, | | 80 | }, |
80 | #elif defined(BCM563XX) | | 81 | #elif defined(BCM563XX) |
81 | [0] = { | | 82 | [0] = { |
82 | .dr_sysbase = 0x60000000, | | 83 | .dr_sysbase = 0x60000000, |
83 | .dr_busbase = 0x60000000, | | 84 | .dr_busbase = 0x60000000, |
84 | .dr_len = 0x20000000, | | 85 | .dr_len = 0x20000000, |
85 | }, [1] = { | | 86 | }, [1] = { |
86 | .dr_sysbase = 0xa0000000, | | 87 | .dr_sysbase = 0x80000000, |
87 | .dr_busbase = 0xa0000000, | | 88 | .dr_busbase = 0x80000000, |
88 | }, | | 89 | }, |
89 | #endif | | 90 | #endif |
90 | }; | | 91 | }; |
91 | | | 92 | |
92 | struct arm32_bus_dma_tag bcm53xx_dma_tag = { | | 93 | struct arm32_bus_dma_tag bcm53xx_dma_tag = { |
93 | ._ranges = bcm53xx_dma_ranges, | | 94 | ._ranges = bcm53xx_dma_ranges, |
94 | ._nranges = __arraycount(bcm53xx_dma_ranges), | | 95 | ._nranges = __arraycount(bcm53xx_dma_ranges), |
95 | _BUS_DMAMAP_FUNCS, | | 96 | _BUS_DMAMAP_FUNCS, |
96 | _BUS_DMAMEM_FUNCS, | | 97 | _BUS_DMAMEM_FUNCS, |
97 | _BUS_DMATAG_FUNCS, | | 98 | _BUS_DMATAG_FUNCS, |
98 | }; | | 99 | }; |
99 | | | 100 | |
100 | struct arm32_dma_range bcm53xx_coherent_dma_ranges[] = { | | 101 | struct arm32_dma_range bcm53xx_coherent_dma_ranges[] = { |
| @@ -105,28 +106,28 @@ struct arm32_dma_range bcm53xx_coherent_ | | | @@ -105,28 +106,28 @@ struct arm32_dma_range bcm53xx_coherent_ |
105 | .dr_len = 0x10000000, | | 106 | .dr_len = 0x10000000, |
106 | .dr_flags = _BUS_DMAMAP_COHERENT, | | 107 | .dr_flags = _BUS_DMAMAP_COHERENT, |
107 | }, [1] = { | | 108 | }, [1] = { |
108 | .dr_sysbase = 0x90000000, | | 109 | .dr_sysbase = 0x90000000, |
109 | .dr_busbase = 0x90000000, | | 110 | .dr_busbase = 0x90000000, |
110 | }, | | 111 | }, |
111 | #elif defined(BCM563XX) | | 112 | #elif defined(BCM563XX) |
112 | [0] = { | | 113 | [0] = { |
113 | .dr_sysbase = 0x60000000, | | 114 | .dr_sysbase = 0x60000000, |
114 | .dr_busbase = 0x60000000, | | 115 | .dr_busbase = 0x60000000, |
115 | .dr_len = 0x20000000, | | 116 | .dr_len = 0x20000000, |
116 | .dr_flags = _BUS_DMAMAP_COHERENT, | | 117 | .dr_flags = _BUS_DMAMAP_COHERENT, |
117 | }, [1] = { | | 118 | }, [1] = { |
118 | .dr_sysbase = 0xa0000000, | | 119 | .dr_sysbase = 0x80000000, |
119 | .dr_busbase = 0xa0000000, | | 120 | .dr_busbase = 0x80000000, |
120 | }, | | 121 | }, |
121 | #endif | | 122 | #endif |
122 | }; | | 123 | }; |
123 | | | 124 | |
124 | struct arm32_bus_dma_tag bcm53xx_coherent_dma_tag = { | | 125 | struct arm32_bus_dma_tag bcm53xx_coherent_dma_tag = { |
125 | ._ranges = bcm53xx_coherent_dma_ranges, | | 126 | ._ranges = bcm53xx_coherent_dma_ranges, |
126 | ._nranges = __arraycount(bcm53xx_coherent_dma_ranges), | | 127 | ._nranges = __arraycount(bcm53xx_coherent_dma_ranges), |
127 | _BUS_DMAMAP_FUNCS, | | 128 | _BUS_DMAMAP_FUNCS, |
128 | _BUS_DMAMEM_FUNCS, | | 129 | _BUS_DMAMEM_FUNCS, |
129 | _BUS_DMATAG_FUNCS, | | 130 | _BUS_DMATAG_FUNCS, |
130 | }; | | 131 | }; |
131 | | | 132 | |
132 | #ifdef _ARM32_NEED_BUS_DMA_BOUNCE | | 133 | #ifdef _ARM32_NEED_BUS_DMA_BOUNCE |
| @@ -544,28 +545,30 @@ bcm53xx_bootstrap(vaddr_t iobase) | | | @@ -544,28 +545,30 @@ bcm53xx_bootstrap(vaddr_t iobase) |
544 | bcm53xx_clock_init(clk); | | 545 | bcm53xx_clock_init(clk); |
545 | bcm53xx_lcpll_clock_init(clk, bcs.bcs_lcpll_control1, | | 546 | bcm53xx_lcpll_clock_init(clk, bcs.bcs_lcpll_control1, |
546 | bcs.bcs_lcpll_control2); | | 547 | bcs.bcs_lcpll_control2); |
547 | bcm53xx_genpll_clock_init(clk, bcs.bcs_genpll_control5, | | 548 | bcm53xx_genpll_clock_init(clk, bcs.bcs_genpll_control5, |
548 | bcs.bcs_genpll_control6, bcs.bcs_genpll_control7); | | 549 | bcs.bcs_genpll_control6, bcs.bcs_genpll_control7); |
549 | bcm53xx_usb_clock_init(clk, bcs.bcs_usb2_control); | | 550 | bcm53xx_usb_clock_init(clk, bcs.bcs_usb2_control); |
550 | bcm53xx_get_ddr_freq(clk, bcs.bcs_ddr_phy_ctl_pll_status, | | 551 | bcm53xx_get_ddr_freq(clk, bcs.bcs_ddr_phy_ctl_pll_status, |
551 | bcs.bcs_ddr_phy_ctl_pll_dividers); | | 552 | bcs.bcs_ddr_phy_ctl_pll_dividers); |
552 | bcm53xx_get_cpu_freq(clk, bcs.bcs_armcore_clk_pllarma, | | 553 | bcm53xx_get_cpu_freq(clk, bcs.bcs_armcore_clk_pllarma, |
553 | bcs.bcs_armcore_clk_pllarmb, bcs.bcs_armcore_clk_policy); | | 554 | bcs.bcs_armcore_clk_pllarmb, bcs.bcs_armcore_clk_policy); |
554 | | | 555 | |
555 | curcpu()->ci_data.cpu_cc_freq = clk->clk_cpu; | | 556 | curcpu()->ci_data.cpu_cc_freq = clk->clk_cpu; |
556 | | | 557 | |
| | | 558 | #if NARML2CC > 0 |
557 | arml2cc_init(bcm53xx_armcore_bst, bcm53xx_armcore_bsh, | | 559 | arml2cc_init(bcm53xx_armcore_bst, bcm53xx_armcore_bsh, |
558 | ARMCORE_L2C_BASE); | | 560 | ARMCORE_L2C_BASE); |
| | | 561 | #endif |
559 | } | | 562 | } |
560 | | | 563 | |
561 | void | | 564 | void |
562 | bcm53xx_dma_bootstrap(psize_t memsize) | | 565 | bcm53xx_dma_bootstrap(psize_t memsize) |
563 | { | | 566 | { |
564 | if (memsize <= 256*1024*1024) { | | 567 | if (memsize <= 256*1024*1024) { |
565 | bcm53xx_dma_ranges[0].dr_len = memsize; | | 568 | bcm53xx_dma_ranges[0].dr_len = memsize; |
566 | bcm53xx_coherent_dma_ranges[0].dr_len = memsize; | | 569 | bcm53xx_coherent_dma_ranges[0].dr_len = memsize; |
567 | bcm53xx_dma_tag._nranges = 1; | | 570 | bcm53xx_dma_tag._nranges = 1; |
568 | bcm53xx_coherent_dma_tag._nranges = 1; | | 571 | bcm53xx_coherent_dma_tag._nranges = 1; |
569 | } else { | | 572 | } else { |
570 | /* | | 573 | /* |
571 | * By setting up two ranges, bus_dmamem_alloc will always | | 574 | * By setting up two ranges, bus_dmamem_alloc will always |