Thu Feb 20 14:48:11 2014 UTC ()
Make sure AFLT_ENABLE in the cpuctrl mask for armv7_setup.


(matt)
diff -r1.136 -r1.137 src/sys/arch/arm/arm/cpufunc.c
cvs diff -r1.136 -r1.137 src/sys/arch/arm/arm/cpufunc.c (expand / switch to unified diff)

--- src/sys/arch/arm/arm/cpufunc.c 2014/01/23 19:28:47 1.136
+++ src/sys/arch/arm/arm/cpufunc.c 2014/02/20 14:48:11 1.137
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: cpufunc.c,v 1.136 2014/01/23 19:28:47 matt Exp $ */ 1/* $NetBSD: cpufunc.c,v 1.137 2014/02/20 14:48:11 matt Exp $ */
2 2
3/* 3/*
4 * arm7tdmi support code Copyright (c) 2001 John Fremlin 4 * arm7tdmi support code Copyright (c) 2001 John Fremlin
5 * arm8 support code Copyright (c) 1997 ARM Limited 5 * arm8 support code Copyright (c) 1997 ARM Limited
6 * arm8 support code Copyright (c) 1997 Causality Limited 6 * arm8 support code Copyright (c) 1997 Causality Limited
7 * arm9 support code Copyright (C) 2001 ARM Ltd 7 * arm9 support code Copyright (C) 2001 ARM Ltd
8 * arm11 support code Copyright (c) 2007 Microsoft 8 * arm11 support code Copyright (c) 2007 Microsoft
9 * cortexa8 support code Copyright (c) 2008 3am Software Foundry 9 * cortexa8 support code Copyright (c) 2008 3am Software Foundry
10 * cortexa8 improvements Copyright (c) Goeran Weinholt 10 * cortexa8 improvements Copyright (c) Goeran Weinholt
11 * Copyright (c) 1997 Mark Brinicombe. 11 * Copyright (c) 1997 Mark Brinicombe.
12 * Copyright (c) 1997 Causality Limited 12 * Copyright (c) 1997 Causality Limited
13 * All rights reserved. 13 * All rights reserved.
14 * 14 *
@@ -39,27 +39,27 @@ @@ -39,27 +39,27 @@
39 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 39 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
40 * SUCH DAMAGE. 40 * SUCH DAMAGE.
41 * 41 *
42 * RiscBSD kernel project 42 * RiscBSD kernel project
43 * 43 *
44 * cpufuncs.c 44 * cpufuncs.c
45 * 45 *
46 * C functions for supporting CPU / MMU / TLB specific operations. 46 * C functions for supporting CPU / MMU / TLB specific operations.
47 * 47 *
48 * Created : 30/01/97 48 * Created : 30/01/97
49 */ 49 */
50 50
51#include <sys/cdefs.h> 51#include <sys/cdefs.h>
52__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.136 2014/01/23 19:28:47 matt Exp $"); 52__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.137 2014/02/20 14:48:11 matt Exp $");
53 53
54#include "opt_compat_netbsd.h" 54#include "opt_compat_netbsd.h"
55#include "opt_cpuoptions.h" 55#include "opt_cpuoptions.h"
56#include "opt_perfctrs.h" 56#include "opt_perfctrs.h"
57 57
58#include <sys/types.h> 58#include <sys/types.h>
59#include <sys/param.h> 59#include <sys/param.h>
60#include <sys/pmc.h> 60#include <sys/pmc.h>
61#include <sys/systm.h> 61#include <sys/systm.h>
62#include <machine/cpu.h> 62#include <machine/cpu.h>
63#include <machine/bootconfig.h> 63#include <machine/bootconfig.h>
64#include <arch/arm/arm/disassem.h> 64#include <arch/arm/arm/disassem.h>
65 65
@@ -3045,54 +3045,47 @@ struct cpu_option armv7_options[] = { @@ -3045,54 +3045,47 @@ struct cpu_option armv7_options[] = {
3045 { "armv7.dcache", BIC, OR, CPU_CONTROL_DC_ENABLE }, 3045 { "armv7.dcache", BIC, OR, CPU_CONTROL_DC_ENABLE },
3046 { NULL, IGN, IGN, 0} 3046 { NULL, IGN, IGN, 0}
3047}; 3047};
3048 3048
3049void 3049void
3050armv7_setup(char *args) 3050armv7_setup(char *args)
3051{ 3051{
3052 3052
3053 int cpuctrl = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_IC_ENABLE 3053 int cpuctrl = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_IC_ENABLE
3054 | CPU_CONTROL_DC_ENABLE | CPU_CONTROL_BPRD_ENABLE 3054 | CPU_CONTROL_DC_ENABLE | CPU_CONTROL_BPRD_ENABLE
3055#ifdef __ARMEB__ 3055#ifdef __ARMEB__
3056 | CPU_CONTROL_EX_BEND 3056 | CPU_CONTROL_EX_BEND
3057#endif 3057#endif
 3058#ifndef ARM32_DISABLE_ALIGNMENT_FAULTS
 3059 | CPU_CONTROL_AFLT_ENABLE;
 3060#endif
3058 | CPU_CONTROL_UNAL_ENABLE; 3061 | CPU_CONTROL_UNAL_ENABLE;
3059 3062
3060#if 0 3063 int cpuctrlmask = cpuctrl | CPU_CONTROL_AFLT_ENABLE;
3061 int cpuctrlmask = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_SYST_ENABLE 
3062 | CPU_CONTROL_IC_ENABLE | CPU_CONTROL_DC_ENABLE 
3063 | CPU_CONTROL_ROM_ENABLE | CPU_CONTROL_BPRD_ENABLE 
3064 | CPU_CONTROL_BEND_ENABLE | CPU_CONTROL_AFLT_ENABLE 
3065 | CPU_CONTROL_ROUNDROBIN | CPU_CONTROL_CPCLK; 
3066#endif 
3067 3064
3068#ifdef ARM32_DISABLE_ALIGNMENT_FAULTS 
3069#else 
3070 cpuctrl |= CPU_CONTROL_AFLT_ENABLE; 
3071#endif 
3072 3065
3073 cpuctrl = parse_cpu_options(args, armv7_options, cpuctrl); 3066 cpuctrl = parse_cpu_options(args, armv7_options, cpuctrl);
3074 3067
3075#ifndef ARM_HAS_VBAR 3068#ifndef ARM_HAS_VBAR
3076 if (vector_page == ARM_VECTORS_HIGH) 3069 if (vector_page == ARM_VECTORS_HIGH)
3077 cpuctrl |= CPU_CONTROL_VECRELOC; 3070 cpuctrl |= CPU_CONTROL_VECRELOC;
3078#endif 3071#endif
3079 3072
3080 /* Clear out the cache */ 3073 /* Clear out the cache */
3081 cpu_idcache_wbinv_all(); 3074 cpu_idcache_wbinv_all();
3082 3075
3083 /* Set the control register */ 3076 /* Set the control register */
3084 curcpu()->ci_ctrl = cpuctrl; 3077 curcpu()->ci_ctrl = cpuctrl;
3085 cpu_control(cpuctrl, cpuctrl); 3078 cpu_control(cpuctrlmask, cpuctrl);
3086} 3079}
3087#endif /* CPU_CORTEX */ 3080#endif /* CPU_CORTEX */
3088 3081
3089 3082
3090#if defined(CPU_ARM1136) || defined(CPU_ARM1176)  3083#if defined(CPU_ARM1136) || defined(CPU_ARM1176)
3091void 3084void
3092arm11x6_setup(char *args) 3085arm11x6_setup(char *args)
3093{ 3086{
3094 int cpuctrl, cpuctrl_wax; 3087 int cpuctrl, cpuctrl_wax;
3095 uint32_t auxctrl, auxctrl_wax; 3088 uint32_t auxctrl, auxctrl_wax;
3096 uint32_t tmp, tmp2; 3089 uint32_t tmp, tmp2;
3097 uint32_t sbz=0; 3090 uint32_t sbz=0;
3098 uint32_t cpuid; 3091 uint32_t cpuid;