| @@ -1,14 +1,14 @@ | | | @@ -1,14 +1,14 @@ |
1 | /* $NetBSD: cpufunc.c,v 1.137 2014/02/20 14:48:11 matt Exp $ */ | | 1 | /* $NetBSD: cpufunc.c,v 1.138 2014/02/20 17:38:42 matt Exp $ */ |
2 | | | 2 | |
3 | /* | | 3 | /* |
4 | * arm7tdmi support code Copyright (c) 2001 John Fremlin | | 4 | * arm7tdmi support code Copyright (c) 2001 John Fremlin |
5 | * arm8 support code Copyright (c) 1997 ARM Limited | | 5 | * arm8 support code Copyright (c) 1997 ARM Limited |
6 | * arm8 support code Copyright (c) 1997 Causality Limited | | 6 | * arm8 support code Copyright (c) 1997 Causality Limited |
7 | * arm9 support code Copyright (C) 2001 ARM Ltd | | 7 | * arm9 support code Copyright (C) 2001 ARM Ltd |
8 | * arm11 support code Copyright (c) 2007 Microsoft | | 8 | * arm11 support code Copyright (c) 2007 Microsoft |
9 | * cortexa8 support code Copyright (c) 2008 3am Software Foundry | | 9 | * cortexa8 support code Copyright (c) 2008 3am Software Foundry |
10 | * cortexa8 improvements Copyright (c) Goeran Weinholt | | 10 | * cortexa8 improvements Copyright (c) Goeran Weinholt |
11 | * Copyright (c) 1997 Mark Brinicombe. | | 11 | * Copyright (c) 1997 Mark Brinicombe. |
12 | * Copyright (c) 1997 Causality Limited | | 12 | * Copyright (c) 1997 Causality Limited |
13 | * All rights reserved. | | 13 | * All rights reserved. |
14 | * | | 14 | * |
| @@ -39,27 +39,27 @@ | | | @@ -39,27 +39,27 @@ |
39 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF | | 39 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
40 | * SUCH DAMAGE. | | 40 | * SUCH DAMAGE. |
41 | * | | 41 | * |
42 | * RiscBSD kernel project | | 42 | * RiscBSD kernel project |
43 | * | | 43 | * |
44 | * cpufuncs.c | | 44 | * cpufuncs.c |
45 | * | | 45 | * |
46 | * C functions for supporting CPU / MMU / TLB specific operations. | | 46 | * C functions for supporting CPU / MMU / TLB specific operations. |
47 | * | | 47 | * |
48 | * Created : 30/01/97 | | 48 | * Created : 30/01/97 |
49 | */ | | 49 | */ |
50 | | | 50 | |
51 | #include <sys/cdefs.h> | | 51 | #include <sys/cdefs.h> |
52 | __KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.137 2014/02/20 14:48:11 matt Exp $"); | | 52 | __KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.138 2014/02/20 17:38:42 matt Exp $"); |
53 | | | 53 | |
54 | #include "opt_compat_netbsd.h" | | 54 | #include "opt_compat_netbsd.h" |
55 | #include "opt_cpuoptions.h" | | 55 | #include "opt_cpuoptions.h" |
56 | #include "opt_perfctrs.h" | | 56 | #include "opt_perfctrs.h" |
57 | | | 57 | |
58 | #include <sys/types.h> | | 58 | #include <sys/types.h> |
59 | #include <sys/param.h> | | 59 | #include <sys/param.h> |
60 | #include <sys/pmc.h> | | 60 | #include <sys/pmc.h> |
61 | #include <sys/systm.h> | | 61 | #include <sys/systm.h> |
62 | #include <machine/cpu.h> | | 62 | #include <machine/cpu.h> |
63 | #include <machine/bootconfig.h> | | 63 | #include <machine/bootconfig.h> |
64 | #include <arch/arm/arm/disassem.h> | | 64 | #include <arch/arm/arm/disassem.h> |
65 | | | 65 | |
| @@ -1282,32 +1282,32 @@ struct cpu_functions cortex_cpufuncs = { | | | @@ -1282,32 +1282,32 @@ struct cpu_functions cortex_cpufuncs = { |
1282 | .cf_id = cpufunc_id, | | 1282 | .cf_id = cpufunc_id, |
1283 | .cf_cpwait = cpufunc_nullop, | | 1283 | .cf_cpwait = cpufunc_nullop, |
1284 | | | 1284 | |
1285 | /* MMU functions */ | | 1285 | /* MMU functions */ |
1286 | | | 1286 | |
1287 | .cf_control = cpufunc_control, | | 1287 | .cf_control = cpufunc_control, |
1288 | .cf_domains = cpufunc_domains, | | 1288 | .cf_domains = cpufunc_domains, |
1289 | .cf_setttb = armv7_setttb, | | 1289 | .cf_setttb = armv7_setttb, |
1290 | .cf_faultstatus = cpufunc_faultstatus, | | 1290 | .cf_faultstatus = cpufunc_faultstatus, |
1291 | .cf_faultaddress = cpufunc_faultaddress, | | 1291 | .cf_faultaddress = cpufunc_faultaddress, |
1292 | | | 1292 | |
1293 | /* TLB functions */ | | 1293 | /* TLB functions */ |
1294 | | | 1294 | |
1295 | .cf_tlb_flushID = arm11_tlb_flushID, | | 1295 | .cf_tlb_flushID = armv7_tlb_flushID, |
1296 | .cf_tlb_flushID_SE = armv7_tlb_flushID_SE, | | 1296 | .cf_tlb_flushID_SE = armv7_tlb_flushID_SE, |
1297 | .cf_tlb_flushI = arm11_tlb_flushI, | | 1297 | .cf_tlb_flushI = armv7_tlb_flushI, |
1298 | .cf_tlb_flushI_SE = arm11_tlb_flushI_SE, | | 1298 | .cf_tlb_flushI_SE = armv7_tlb_flushI_SE, |
1299 | .cf_tlb_flushD = arm11_tlb_flushD, | | 1299 | .cf_tlb_flushD = armv7_tlb_flushD, |
1300 | .cf_tlb_flushD_SE = arm11_tlb_flushD_SE, | | 1300 | .cf_tlb_flushD_SE = armv7_tlb_flushD_SE, |
1301 | | | 1301 | |
1302 | /* Cache operations */ | | 1302 | /* Cache operations */ |
1303 | | | 1303 | |
1304 | .cf_icache_sync_all = armv7_icache_sync_all, | | 1304 | .cf_icache_sync_all = armv7_icache_sync_all, |
1305 | .cf_dcache_wbinv_all = armv7_dcache_wbinv_all, | | 1305 | .cf_dcache_wbinv_all = armv7_dcache_wbinv_all, |
1306 | | | 1306 | |
1307 | .cf_dcache_inv_range = armv7_dcache_inv_range, | | 1307 | .cf_dcache_inv_range = armv7_dcache_inv_range, |
1308 | .cf_dcache_wb_range = armv7_dcache_wb_range, | | 1308 | .cf_dcache_wb_range = armv7_dcache_wb_range, |
1309 | .cf_dcache_wbinv_range = armv7_dcache_wbinv_range, | | 1309 | .cf_dcache_wbinv_range = armv7_dcache_wbinv_range, |
1310 | | | 1310 | |
1311 | .cf_sdcache_wbinv_range = (void *)cpufunc_nullop, | | 1311 | .cf_sdcache_wbinv_range = (void *)cpufunc_nullop, |
1312 | .cf_sdcache_inv_range = (void *)cpufunc_nullop, | | 1312 | .cf_sdcache_inv_range = (void *)cpufunc_nullop, |
1313 | .cf_sdcache_wb_range = (void *)cpufunc_nullop, | | 1313 | .cf_sdcache_wb_range = (void *)cpufunc_nullop, |