Thu Feb 20 20:39:01 2014 UTC ()
Add missing __sync_* ops


(martin)
diff -r1.11 -r1.12 src/common/lib/libc/arch/m68k/atomic/Makefile.inc
diff -r1.7 -r1.8 src/common/lib/libc/arch/m68k/atomic/atomic_add.S
diff -r1.8 -r1.9 src/common/lib/libc/arch/m68k/atomic/atomic_and.S
diff -r1.8 -r1.9 src/common/lib/libc/arch/m68k/atomic/atomic_or.S
diff -r0 -r1.1 src/common/lib/libc/arch/m68k/atomic/atomic_nand.S
diff -r0 -r1.1 src/common/lib/libc/arch/m68k/atomic/atomic_sub.S
diff -r0 -r1.1 src/common/lib/libc/arch/m68k/atomic/atomic_xor.S
cvs diff -r1.11 -r1.12 src/common/lib/libc/arch/m68k/atomic/Makefile.inc (expand / switch to unified diff)

--- src/common/lib/libc/arch/m68k/atomic/Makefile.inc 2014/01/29 10:20:11 1.11
+++ src/common/lib/libc/arch/m68k/atomic/Makefile.inc 2014/02/20 20:39:01 1.12
@@ -1,30 +1,31 @@ @@ -1,30 +1,31 @@
1# $NetBSD: Makefile.inc,v 1.11 2014/01/29 10:20:11 martin Exp $ 1# $NetBSD: Makefile.inc,v 1.12 2014/02/20 20:39:01 martin Exp $
2 2
3# 3#
4# Note: The atomic operations here in these assembly files are atomic 4# Note: The atomic operations here in these assembly files are atomic
5# only with respect to regular memory on uniprocessor systems. Since 5# only with respect to regular memory on uniprocessor systems. Since
6# we don't support any MP m68k systems, this is just fine. If we ever 6# we don't support any MP m68k systems, this is just fine. If we ever
7# do, then these routines will probably need to be replaced with CAS- 7# do, then these routines will probably need to be replaced with CAS-
8# based routines (CAS generates an atomic bus cycle, whereas these 8# based routines (CAS generates an atomic bus cycle, whereas these
9# others are merely single-instruction). 9# others are merely single-instruction).
10# 10#
11 11
12.if defined(LIB) && (${LIB} == "kern" || ${LIB} == "c" || ${LIB} == "pthread" \ 12.if defined(LIB) && (${LIB} == "kern" || ${LIB} == "c" || ${LIB} == "pthread" \
13 || ${LIB} == "rump") 13 || ${LIB} == "rump")
14.if ${MACHINE_ARCH} == "m68k" 14.if ${MACHINE_ARCH} == "m68k"
15 15
16SRCS+= atomic_add.S atomic_and.S atomic_cas.S atomic_dec.S \ 16SRCS+= atomic_add.S atomic_and.S atomic_cas.S atomic_dec.S \
17 atomic_inc.S atomic_or.S atomic_swap.S membar_ops_nop.c 17 atomic_inc.S atomic_or.S atomic_swap.S membar_ops_nop.c \
 18 atomic_sub.S atomic_xor.S atomic_nand.S
18 19
19.else 20.else
20 21
21SRCS+= atomic_add_32_cas.c atomic_add_32_nv_cas.c atomic_and_32_cas.c \ 22SRCS+= atomic_add_32_cas.c atomic_add_32_nv_cas.c atomic_and_32_cas.c \
22 atomic_and_32_nv_cas.c atomic_dec_32_cas.c atomic_dec_32_nv_cas.c \ 23 atomic_and_32_nv_cas.c atomic_dec_32_cas.c atomic_dec_32_nv_cas.c \
23 atomic_inc_32_cas.c atomic_inc_32_nv_cas.c atomic_or_32_cas.c \ 24 atomic_inc_32_cas.c atomic_inc_32_nv_cas.c atomic_or_32_cas.c \
24 atomic_or_32_nv_cas.c atomic_swap_32_cas.c membar_ops_nop.c 25 atomic_or_32_nv_cas.c atomic_swap_32_cas.c membar_ops_nop.c
25 26
26.endif 27.endif
27.endif 28.endif
28 29
29.if defined(LIB) && (${LIB} == "c" || ${LIB} == "pthread") 30.if defined(LIB) && (${LIB} == "c" || ${LIB} == "pthread")
30.if ${MACHINE_ARCH} == "m68k" 31.if ${MACHINE_ARCH} == "m68k"
cvs diff -r1.7 -r1.8 src/common/lib/libc/arch/m68k/atomic/atomic_add.S (expand / switch to unified diff)

--- src/common/lib/libc/arch/m68k/atomic/atomic_add.S 2014/02/18 16:19:28 1.7
+++ src/common/lib/libc/arch/m68k/atomic/atomic_add.S 2014/02/20 20:39:01 1.8
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: atomic_add.S,v 1.7 2014/02/18 16:19:28 martin Exp $ */ 1/* $NetBSD: atomic_add.S,v 1.8 2014/02/20 20:39:01 martin Exp $ */
2 2
3/*- 3/*-
4 * Copyright (c) 2007 The NetBSD Foundation, Inc. 4 * Copyright (c) 2007 The NetBSD Foundation, Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * This code is derived from software contributed to The NetBSD Foundation 7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe. 8 * by Jason R. Thorpe.
9 * 9 *
10 * Redistribution and use in source and binary forms, with or without 10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions 11 * modification, are permitted provided that the following conditions
12 * are met: 12 * are met:
13 * 1. Redistributions of source code must retain the above copyright 13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer. 14 * notice, this list of conditions and the following disclaimer.
@@ -58,36 +58,67 @@ ENTRY(_atomic_add_32_nv) @@ -58,36 +58,67 @@ ENTRY(_atomic_add_32_nv)
58 movl %d0, %a0 /* pointers return also in %a0 */ 58 movl %d0, %a0 /* pointers return also in %a0 */
59 rts 59 rts
60END(_atomic_add_32_nv) 60END(_atomic_add_32_nv)
61 61
62ATOMIC_OP_ALIAS(atomic_add_32_nv,_atomic_add_32_nv) 62ATOMIC_OP_ALIAS(atomic_add_32_nv,_atomic_add_32_nv)
63ATOMIC_OP_ALIAS(atomic_add_int_nv,_atomic_add_32_nv) 63ATOMIC_OP_ALIAS(atomic_add_int_nv,_atomic_add_32_nv)
64STRONG_ALIAS(_atomic_add_int_nv,_atomic_add_32_nv) 64STRONG_ALIAS(_atomic_add_int_nv,_atomic_add_32_nv)
65ATOMIC_OP_ALIAS(atomic_add_long_nv,_atomic_add_32_nv) 65ATOMIC_OP_ALIAS(atomic_add_long_nv,_atomic_add_32_nv)
66STRONG_ALIAS(_atomic_add_long_nv,_atomic_add_32_nv) 66STRONG_ALIAS(_atomic_add_long_nv,_atomic_add_32_nv)
67ATOMIC_OP_ALIAS(atomic_add_ptr_nv,_atomic_add_32_nv) 67ATOMIC_OP_ALIAS(atomic_add_ptr_nv,_atomic_add_32_nv)
68STRONG_ALIAS(_atomic_add_ptr_nv,_atomic_add_32_nv) 68STRONG_ALIAS(_atomic_add_ptr_nv,_atomic_add_32_nv)
69STRONG_ALIAS(__sync_add_and_fetch_4,_atomic_add_32_nv) 69STRONG_ALIAS(__sync_add_and_fetch_4,_atomic_add_32_nv)
70 70
 71ENTRY(__sync_fetch_and_add_4)
 72 movl 4(%sp), %a0
 731: movl (%a0), %d0
 74 movl %d0, %d1
 75 addl 8(%sp), %d1
 76 casl %d0, %d1, (%a0)
 77 bne 1b
 78 movl %d0, %a0 /* pointers return also in %a0 */
 79 rts
 80END(__sync_fetch_and_add_4)
 81
71ENTRY(_atomic_add_16_nv) 82ENTRY(_atomic_add_16_nv)
72 movl 4(%sp), %a0 83 movl 4(%sp), %a0
731: movw (%a0), %d0 841: movw (%a0), %d0
74 movw %d0, %d1 85 movw %d0, %d1
75 addw 8(%sp), %d0 86 addw 8(%sp), %d0
76 casw %d1, %d0, (%a0) 87 casw %d1, %d0, (%a0)
77 bne 1b 88 bne 1b
78 rts 89 rts
79END(_atomic_add_16_nv) 90END(_atomic_add_16_nv)
80 91
81STRONG_ALIAS(__sync_add_and_fetch_2,_atomic_add_16_nv) 92STRONG_ALIAS(__sync_add_and_fetch_2,_atomic_add_16_nv)
82 93
 94ENTRY(__sync_fetch_and_add_2)
 95 movl 4(%sp), %a0
 961: movw (%a0), %d0
 97 movw %d0, %d1
 98 addw 8(%sp), %d1
 99 casw %d0, %d1, (%a0)
 100 bne 1b
 101 rts
 102END(__sync_fetch_and_add_2)
 103
83ENTRY(_atomic_add_8_nv) 104ENTRY(_atomic_add_8_nv)
84 movl 4(%sp), %a0 105 movl 4(%sp), %a0
851: movb (%a0), %d0 1061: movb (%a0), %d0
86 movb %d0, %d1 107 movb %d0, %d1
87 addb 8(%sp), %d0 108 addb 8(%sp), %d0
88 casb %d1, %d0, (%a0) 109 casb %d1, %d0, (%a0)
89 bne 1b 110 bne 1b
90 rts 111 rts
91END(_atomic_add_8_nv) 112END(_atomic_add_8_nv)
92 113
93STRONG_ALIAS(__sync_add_and_fetch_1,_atomic_add_8_nv) 114STRONG_ALIAS(__sync_add_and_fetch_1,_atomic_add_8_nv)
 115
 116ENTRY(__sync_fetch_and_add_1)
 117 movl 4(%sp), %a0
 1181: movb (%a0), %d0
 119 movb %d0, %d1
 120 addb 8(%sp), %d1
 121 casb %d0, %d1, (%a0)
 122 bne 1b
 123 rts
 124END(__sync_fetch_and_add_1)
cvs diff -r1.8 -r1.9 src/common/lib/libc/arch/m68k/atomic/atomic_and.S (expand / switch to unified diff)

--- src/common/lib/libc/arch/m68k/atomic/atomic_and.S 2013/07/16 23:24:18 1.8
+++ src/common/lib/libc/arch/m68k/atomic/atomic_and.S 2014/02/20 20:39:01 1.9
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: atomic_and.S,v 1.8 2013/07/16 23:24:18 matt Exp $ */ 1/* $NetBSD: atomic_and.S,v 1.9 2014/02/20 20:39:01 martin Exp $ */
2 2
3/*- 3/*-
4 * Copyright (c) 2007 The NetBSD Foundation, Inc. 4 * Copyright (c) 2007 The NetBSD Foundation, Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * This code is derived from software contributed to The NetBSD Foundation 7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe. 8 * by Jason R. Thorpe.
9 * 9 *
10 * Redistribution and use in source and binary forms, with or without 10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions 11 * modification, are permitted provided that the following conditions
12 * are met: 12 * are met:
13 * 1. Redistributions of source code must retain the above copyright 13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer. 14 * notice, this list of conditions and the following disclaimer.
@@ -44,22 +44,83 @@ ATOMIC_OP_ALIAS(atomic_and_uint,_atomic_ @@ -44,22 +44,83 @@ ATOMIC_OP_ALIAS(atomic_and_uint,_atomic_
44STRONG_ALIAS(_atomic_and_uint,_atomic_and_32) 44STRONG_ALIAS(_atomic_and_uint,_atomic_and_32)
45ATOMIC_OP_ALIAS(atomic_and_ulong,_atomic_and_32) 45ATOMIC_OP_ALIAS(atomic_and_ulong,_atomic_and_32)
46STRONG_ALIAS(_atomic_and_ulong,_atomic_and_32) 46STRONG_ALIAS(_atomic_and_ulong,_atomic_and_32)
47ATOMIC_OP_ALIAS(atomic_and_ptr,_atomic_and_32) 47ATOMIC_OP_ALIAS(atomic_and_ptr,_atomic_and_32)
48STRONG_ALIAS(_atomic_and_ptr,_atomic_and_32) 48STRONG_ALIAS(_atomic_and_ptr,_atomic_and_32)
49 49
50ENTRY(_atomic_and_32_nv) 50ENTRY(_atomic_and_32_nv)
51 movl 4(%sp), %a0 51 movl 4(%sp), %a0
521: movl (%a0), %d0 521: movl (%a0), %d0
53 movl %d0, %d1 53 movl %d0, %d1
54 andl 8(%sp), %d0 54 andl 8(%sp), %d0
55 casl %d1, %d0, (%a0) 55 casl %d1, %d0, (%a0)
56 bne 1b 56 bne 1b
 57 movl %d0, %a0
57 rts 58 rts
58END(_atomic_and_32_nv) 59END(_atomic_and_32_nv)
59ATOMIC_OP_ALIAS(atomic_and_32_nv,_atomic_and_32_nv) 60ATOMIC_OP_ALIAS(atomic_and_32_nv,_atomic_and_32_nv)
60ATOMIC_OP_ALIAS(atomic_and_uint_nv,_atomic_and_32_nv) 61ATOMIC_OP_ALIAS(atomic_and_uint_nv,_atomic_and_32_nv)
61STRONG_ALIAS(_atomic_and_uint_nv,_atomic_and_32_nv) 62STRONG_ALIAS(_atomic_and_uint_nv,_atomic_and_32_nv)
62ATOMIC_OP_ALIAS(atomic_and_ulong_nv,_atomic_and_32_nv) 63ATOMIC_OP_ALIAS(atomic_and_ulong_nv,_atomic_and_32_nv)
63STRONG_ALIAS(_atomic_and_ulong_nv,_atomic_and_32_nv) 64STRONG_ALIAS(_atomic_and_ulong_nv,_atomic_and_32_nv)
64ATOMIC_OP_ALIAS(atomic_and_ptr_nv,_atomic_and_32_nv) 65ATOMIC_OP_ALIAS(atomic_and_ptr_nv,_atomic_and_32_nv)
65STRONG_ALIAS(_atomic_and_ptr_nv,_atomic_and_32_nv) 66STRONG_ALIAS(_atomic_and_ptr_nv,_atomic_and_32_nv)
 67STRONG_ALIAS(__sync_and_and_fetch_4,_atomic_and_32_nv)
 68
 69ENTRY(__sync_fetch_and_and_4)
 70 movl 4(%sp), %a0
 711: movl (%a0), %d0
 72 movl %d0, %d1
 73 andl 8(%sp), %d1
 74 casl %d0, %d1, (%a0)
 75 bne 1b
 76 movl %d0, %a0
 77 rts
 78END(__sync_fetch_and_and_4)
 79
 80
 81ENTRY(_atomic_and_16_nv)
 82 movl 4(%sp), %a0
 831: movw (%a0), %d0
 84 movw %d0, %d1
 85 andw 8(%sp), %d0
 86 casw %d1, %d0, (%a0)
 87 bne 1b
 88 rts
 89END(_atomic_and_16_nv)
 90
 91STRONG_ALIAS(__sync_and_and_fetch_2,_atomic_and_16_nv)
 92
 93ENTRY(__sync_fetch_and_and_2)
 94 movl 4(%sp), %a0
 951: movw (%a0), %d0
 96 movw %d0, %d1
 97 andw 8(%sp), %d1
 98 casw %d0, %d1, (%a0)
 99 bne 1b
 100 rts
 101END(__sync_fetch_and_and_2)
 102
 103
 104ENTRY(_atomic_and_8_nv)
 105 movl 4(%sp), %a0
 1061: movb (%a0), %d0
 107 movb %d0, %d1
 108 andb 8(%sp), %d0
 109 casb %d1, %d0, (%a0)
 110 bne 1b
 111 rts
 112END(_atomic_and_8_nv)
 113
 114STRONG_ALIAS(__sync_and_and_fetch_1,_atomic_and_8_nv)
 115
 116ENTRY(__sync_fetch_and_and_1)
 117 movl 4(%sp), %a0
 1181: movb (%a0), %d0
 119 movb %d0, %d1
 120 andb 8(%sp), %d1
 121 casb %d0, %d1, (%a0)
 122 bne 1b
 123 rts
 124END(__sync_fetch_and_and_1)
 125
 126
cvs diff -r1.8 -r1.9 src/common/lib/libc/arch/m68k/atomic/atomic_or.S (expand / switch to unified diff)

--- src/common/lib/libc/arch/m68k/atomic/atomic_or.S 2013/07/16 23:24:18 1.8
+++ src/common/lib/libc/arch/m68k/atomic/atomic_or.S 2014/02/20 20:39:01 1.9
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: atomic_or.S,v 1.8 2013/07/16 23:24:18 matt Exp $ */ 1/* $NetBSD: atomic_or.S,v 1.9 2014/02/20 20:39:01 martin Exp $ */
2 2
3/*- 3/*-
4 * Copyright (c) 2007 The NetBSD Foundation, Inc. 4 * Copyright (c) 2007 The NetBSD Foundation, Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * This code is derived from software contributed to The NetBSD Foundation 7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe. 8 * by Jason R. Thorpe.
9 * 9 *
10 * Redistribution and use in source and binary forms, with or without 10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions 11 * modification, are permitted provided that the following conditions
12 * are met: 12 * are met:
13 * 1. Redistributions of source code must retain the above copyright 13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer. 14 * notice, this list of conditions and the following disclaimer.
@@ -29,36 +29,97 @@ @@ -29,36 +29,97 @@
29 * POSSIBILITY OF SUCH DAMAGE. 29 * POSSIBILITY OF SUCH DAMAGE.
30 */ 30 */
31 31
32#include "atomic_op_asm.h" 32#include "atomic_op_asm.h"
33 33
34 .text 34 .text
35 35
36ENTRY(_atomic_or_32) 36ENTRY(_atomic_or_32)
37 movl 4(%sp), %a0 37 movl 4(%sp), %a0
38 movl 8(%sp), %d0 38 movl 8(%sp), %d0
39 orl %d0, (%a0) 39 orl %d0, (%a0)
40 rts 40 rts
41END(_atomic_or_32) 41END(_atomic_or_32)
 42
42ATOMIC_OP_ALIAS(atomic_or_32,_atomic_or_32) 43ATOMIC_OP_ALIAS(atomic_or_32,_atomic_or_32)
43ATOMIC_OP_ALIAS(atomic_or_uint,_atomic_or_32) 44ATOMIC_OP_ALIAS(atomic_or_uint,_atomic_or_32)
44STRONG_ALIAS(_atomic_or_uint,_atomic_or_32) 45STRONG_ALIAS(_atomic_or_uint,_atomic_or_32)
45ATOMIC_OP_ALIAS(atomic_or_ulong,_atomic_or_32) 46ATOMIC_OP_ALIAS(atomic_or_ulong,_atomic_or_32)
46STRONG_ALIAS(_atomic_or_ulong,_atomic_or_32) 47STRONG_ALIAS(_atomic_or_ulong,_atomic_or_32)
47ATOMIC_OP_ALIAS(atomic_or_ptr,_atomic_or_32) 48ATOMIC_OP_ALIAS(atomic_or_ptr,_atomic_or_32)
48STRONG_ALIAS(_atomic_or_ptr,_atomic_or_32) 49STRONG_ALIAS(_atomic_or_ptr,_atomic_or_32)
49 50
50ENTRY(_atomic_or_32_nv) 51ENTRY(_atomic_or_32_nv)
51 movl 4(%sp), %a0 52 movl 4(%sp), %a0
521: movl (%a0), %d0 531: movl (%a0), %d0
53 movl %d0, %d1 54 movl %d0, %d1
54 orl 8(%sp), %d0 55 orl 8(%sp), %d0
55 casl %d1, %d0, (%a0) 56 casl %d1, %d0, (%a0)
56 bne 1b 57 bne 1b
 58 movl %d0, %a0
57 rts 59 rts
 60END(_atomic_or_32_nv)
 61
58ATOMIC_OP_ALIAS(atomic_or_32_nv,_atomic_or_32_nv) 62ATOMIC_OP_ALIAS(atomic_or_32_nv,_atomic_or_32_nv)
59ATOMIC_OP_ALIAS(atomic_or_uint_nv,_atomic_or_32_nv) 63ATOMIC_OP_ALIAS(atomic_or_uint_nv,_atomic_or_32_nv)
60STRONG_ALIAS(_atomic_or_uint_nv,_atomic_or_32_nv) 64STRONG_ALIAS(_atomic_or_uint_nv,_atomic_or_32_nv)
61ATOMIC_OP_ALIAS(atomic_or_ulong_nv,_atomic_or_32_nv) 65ATOMIC_OP_ALIAS(atomic_or_ulong_nv,_atomic_or_32_nv)
62STRONG_ALIAS(_atomic_or_ulong_nv,_atomic_or_32_nv) 66STRONG_ALIAS(_atomic_or_ulong_nv,_atomic_or_32_nv)
63ATOMIC_OP_ALIAS(atomic_or_ptr_nv,_atomic_or_32_nv) 67ATOMIC_OP_ALIAS(atomic_or_ptr_nv,_atomic_or_32_nv)
64STRONG_ALIAS(_atomic_or_ptr_nv,_atomic_or_32_nv) 68STRONG_ALIAS(_atomic_or_ptr_nv,_atomic_or_32_nv)
 69STRONG_ALIAS(__sync_or_and_fetch_4, _atomic_or_32_nv)
 70
 71
 72ENTRY(__sync_fetch_and_or_4)
 73 movl 4(%sp), %a0
 741: movl (%a0), %d0
 75 movl %d0, %d1
 76 orl 8(%sp), %d1
 77 casl %d0, %d1, (%a0)
 78 bne 1b
 79 movl %d0, %a0
 80 rts
 81END(__sync_fetch_and_or_4)
 82
 83
 84ENTRY(_atomic_or_16_nv)
 85 movl 4(%sp), %a0
 861: movw (%a0), %d0
 87 movw %d0, %d1
 88 orw 8(%sp), %d0
 89 casw %d1, %d0, (%a0)
 90 bne 1b
 91 rts
 92END(_atomic_or_16_nv)
 93STRONG_ALIAS(__sync_or_and_fetch_2, _atomic_or_16_nv)
 94
 95ENTRY(__sync_fetch_and_or_2)
 96 movl 4(%sp), %a0
 971: movw (%a0), %d0
 98 movw %d0, %d1
 99 orw 8(%sp), %d1
 100 casw %d0, %d1, (%a0)
 101 bne 1b
 102 rts
 103END(__sync_fetch_and_or_2)
 104
 105
 106ENTRY(_atomic_or_8_nv)
 107 movl 4(%sp), %a0
 1081: movb (%a0), %d0
 109 movb %d0, %d1
 110 orb 8(%sp), %d0
 111 casb %d1, %d0, (%a0)
 112 bne 1b
 113 rts
 114END(_atomic_or_8_nv)
 115STRONG_ALIAS(__sync_or_and_fetch_1, _atomic_or_8_nv)
 116
 117ENTRY(__sync_fetch_and_or_1)
 118 movl 4(%sp), %a0
 1191: movb (%a0), %d0
 120 movb %d0, %d1
 121 orb 8(%sp), %d1
 122 casb %d0, %d1, (%a0)
 123 bne 1b
 124 rts
 125END(__sync_fetch_and_or_1)
File Added: src/common/lib/libc/arch/m68k/atomic/atomic_nand.S
/*	$NetBSD: atomic_nand.S,v 1.1 2014/02/20 20:39:01 martin Exp $	*/

/*-
 * Copyright (c) 2007 The NetBSD Foundation, Inc.
 * All rights reserved.
 *
 * This code is derived from software contributed to The NetBSD Foundation
 * by Jason R. Thorpe.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *      
 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

#include "atomic_op_asm.h"

	.text

ENTRY(_atomic_nand_32_nv)
	movl	4(%sp), %a0
1:	movl	(%a0), %d0
	movl	%d0, %d1
	andl	8(%sp), %d0
	notl	%d0
	casl	%d1, %d0, (%a0)
	bne	1b
	movl	%d0, %a0
	rts
END(_atomic_nand_32_nv)
ATOMIC_OP_ALIAS(atomic_nand_32_nv,_atomic_nand_32_nv)
ATOMIC_OP_ALIAS(atomic_nand_uint_nv,_atomic_nand_32_nv)
STRONG_ALIAS(_atomic_nand_uint_nv,_atomic_nand_32_nv)
ATOMIC_OP_ALIAS(atomic_nand_ulong_nv,_atomic_nand_32_nv)
STRONG_ALIAS(_atomic_nand_ulong_nv,_atomic_nand_32_nv)
ATOMIC_OP_ALIAS(atomic_nand_ptr_nv,_atomic_nand_32_nv)
STRONG_ALIAS(_atomic_nand_ptr_nv,_atomic_nand_32_nv)
ATOMIC_OP_ALIAS(atomic_nand_32,_atomic_nand_32_nv)
ATOMIC_OP_ALIAS(atomic_nand_uint,_atomic_nand_32_nv)
STRONG_ALIAS(_atomic_nand_uint,_atomic_nand_32_nv)
ATOMIC_OP_ALIAS(atomic_nand_ulong,_atomic_nand_32_nv)
STRONG_ALIAS(_atomic_nand_ulong,_atomic_nand_32_nv)
ATOMIC_OP_ALIAS(atomic_nand_ptr,_atomic_nand_32_nv)
STRONG_ALIAS(_atomic_nand_ptr,_atomic_nand_32_nv)
STRONG_ALIAS(__sync_nand_and_fetch_4,_atomic_nand_32_nv)

ENTRY(__sync_fetch_and_nand_4)
	movl	4(%sp), %a0
1:	movl	(%a0), %d0
	movl	%d0, %d1
	andl	8(%sp), %d1
	notl	%d1
	casl	%d0, %d1, (%a0)
	bne	1b
	movl	%d0, %a0
	rts
END(__sync_fetch_and_nand_4)


ENTRY(_atomic_nand_16_nv)
	movl	4(%sp), %a0
1:	movw	(%a0), %d0
	movw	%d0, %d1
	andw	8(%sp), %d0
	notw	%d0
	casw	%d1, %d0, (%a0)
	bne	1b
	rts
END(_atomic_nand_16_nv)

STRONG_ALIAS(__sync_nand_and_fetch_2,_atomic_nand_16_nv)

ENTRY(__sync_fetch_and_nand_2)
	movl	4(%sp), %a0
1:	movw	(%a0), %d0
	movw	%d0, %d1
	andw	8(%sp), %d1
	notw	%d1
	casw	%d0, %d1, (%a0)
	bne	1b
	rts
END(__sync_fetch_and_nand_2)


ENTRY(_atomic_nand_8_nv)
	movl	4(%sp), %a0
1:	movb	(%a0), %d0
	movb	%d0, %d1
	andb	8(%sp), %d0
	notb	%d0
	casb	%d1, %d0, (%a0)
	bne	1b
	rts
END(_atomic_nand_8_nv)

STRONG_ALIAS(__sync_nand_and_fetch_1,_atomic_nand_8_nv)

ENTRY(__sync_fetch_and_nand_1)
	movl	4(%sp), %a0
1:	movb	(%a0), %d0
	movb	%d0, %d1
	andb	8(%sp), %d1
	notb	%d1
	casb	%d0, %d1, (%a0)
	bne	1b
	rts
END(__sync_fetch_and_nand_1)
File Added: src/common/lib/libc/arch/m68k/atomic/atomic_sub.S
/*	$NetBSD: atomic_sub.S,v 1.1 2014/02/20 20:39:01 martin Exp $	*/

/*-
 * Copyright (c) 2007 The NetBSD Foundation, Inc.
 * All rights reserved.
 *
 * This code is derived from software contributed to The NetBSD Foundation
 * by Jason R. Thorpe.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *      
 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

#include "atomic_op_asm.h"

	.text
	.align	2

ENTRY(_atomic_sub_32)
	movl	4(%sp), %a0
	movl	8(%sp), %d0
	subl	%d0, (%a0)
	rts
END(_atomic_sub_32)
ATOMIC_OP_ALIAS(atomic_sub_32,_atomic_sub_32)
ATOMIC_OP_ALIAS(atomic_sub_int,_atomic_sub_32)
STRONG_ALIAS(_atomic_sub_int,_atomic_sub_32)
ATOMIC_OP_ALIAS(atomic_sub_long,_atomic_sub_32)
STRONG_ALIAS(_atomic_sub_long,_atomic_sub_32)
ATOMIC_OP_ALIAS(atomic_sub_ptr,_atomic_sub_32)
STRONG_ALIAS(_atomic_sub_ptr,_atomic_sub_32)

ENTRY(_atomic_sub_32_nv)
	movl	4(%sp), %a0
1:	movl	(%a0), %d0
	movl	%d0, %d1
	subl	8(%sp), %d0
	casl	%d1, %d0, (%a0)
	bne	1b
	movl	%d0, %a0	/* pointers return also in %a0 */
	rts
END(_atomic_sub_32_nv)

ATOMIC_OP_ALIAS(atomic_sub_32_nv,_atomic_sub_32_nv)
ATOMIC_OP_ALIAS(atomic_sub_int_nv,_atomic_sub_32_nv)
STRONG_ALIAS(_atomic_sub_int_nv,_atomic_sub_32_nv)
ATOMIC_OP_ALIAS(atomic_sub_long_nv,_atomic_sub_32_nv)
STRONG_ALIAS(_atomic_sub_long_nv,_atomic_sub_32_nv)
ATOMIC_OP_ALIAS(atomic_sub_ptr_nv,_atomic_sub_32_nv)
STRONG_ALIAS(_atomic_sub_ptr_nv,_atomic_sub_32_nv)
STRONG_ALIAS(__sync_sub_and_fetch_4,_atomic_sub_32_nv)

ENTRY(__sync_fetch_and_sub_4)
	movl	4(%sp), %a0
1:	movl	(%a0), %d0
	movl	%d0, %d1
	subl	8(%sp), %d1
	casl	%d0, %d1, (%a0)
	bne	1b
	movl	%d0, %a0	/* pointers return also in %a0 */
	rts
END(__sync_fetch_and_sub_4)

ENTRY(_atomic_sub_16_nv)
	movl	4(%sp), %a0
1:	movw	(%a0), %d0
	movw	%d0, %d1
	subw	8(%sp), %d0
	casw	%d1, %d0, (%a0)
	bne	1b
	rts
END(_atomic_sub_16_nv)

STRONG_ALIAS(__sync_sub_and_fetch_2,_atomic_sub_16_nv)

ENTRY(__sync_fetch_and_sub_2)
	movl	4(%sp), %a0
1:	movw	(%a0), %d0
	movw	%d0, %d1
	subw	8(%sp), %d1
	casw	%d0, %d1, (%a0)
	bne	1b
	rts
END(__sync_fetch_and_sub_2)

ENTRY(_atomic_sub_8_nv)
	movl	4(%sp), %a0
1:	movb	(%a0), %d0
	movb	%d0, %d1
	subb	8(%sp), %d0
	casb	%d1, %d0, (%a0)
	bne	1b
	rts
END(_atomic_sub_8_nv)

STRONG_ALIAS(__sync_sub_and_fetch_1,_atomic_sub_8_nv)

ENTRY(__sync_fetch_and_sub_1)
	movl	4(%sp), %a0
1:	movb	(%a0), %d0
	movb	%d0, %d1
	subb	8(%sp), %d1
	casb	%d0, %d1, (%a0)
	bne	1b
	rts
END(__sync_fetch_and_sub_1)
File Added: src/common/lib/libc/arch/m68k/atomic/atomic_xor.S
/*	$NetBSD: atomic_xor.S,v 1.1 2014/02/20 20:39:01 martin Exp $	*/

/*-
 * Copyright (c) 2007 The NetBSD Foundation, Inc.
 * All rights reserved.
 *
 * This code is derived from software contributed to The NetBSD Foundation
 * by Jason R. Thorpe.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *      
 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

#include "atomic_op_asm.h"

	.text

ENTRY(_atomic_xor_32)
	movl	4(%sp), %a0
	movl	8(%sp), %d0
	eorl	%d0, (%a0)
	rts
END(_atomic_xor_32)

ATOMIC_OP_ALIAS(atomic_xor_32,_atomic_xor_32)
ATOMIC_OP_ALIAS(atomic_xor_uint,_atomic_xor_32)
STRONG_ALIAS(_atomic_xor_uint,_atomic_xor_32)
ATOMIC_OP_ALIAS(atomic_xor_ulong,_atomic_xor_32)
STRONG_ALIAS(_atomic_xor_ulong,_atomic_xor_32)
ATOMIC_OP_ALIAS(atomic_xor_ptr,_atomic_xor_32)
STRONG_ALIAS(_atomic_xor_ptr,_atomic_xor_32)

ENTRY(_atomic_xor_32_nv)
	movl	4(%sp), %a0
1:	movl	(%a0), %d0
	movl	%d0, %d1
	movl	8(%sp), %d2
	eorl	%d2, %d0
	casl	%d1, %d0, (%a0)
	bne	1b
	movl	%d0, %a0
	rts
END(_atomic_xor_32_nv)

ATOMIC_OP_ALIAS(atomic_xor_32_nv,_atomic_xor_32_nv)
ATOMIC_OP_ALIAS(atomic_xor_uint_nv,_atomic_xor_32_nv)
STRONG_ALIAS(_atomic_xor_uint_nv,_atomic_xor_32_nv)
ATOMIC_OP_ALIAS(atomic_xor_ulong_nv,_atomic_xor_32_nv)
STRONG_ALIAS(_atomic_xor_ulong_nv,_atomic_xor_32_nv)
ATOMIC_OP_ALIAS(atomic_xor_ptr_nv,_atomic_xor_32_nv)
STRONG_ALIAS(_atomic_xor_ptr_nv,_atomic_xor_32_nv)
STRONG_ALIAS(__sync_xor_and_fetch_4, _atomic_xor_32_nv)


ENTRY(__sync_fetch_and_xor_4)
	movl	4(%sp), %a0
1:	movl	(%a0), %d0
	movl	%d0, %d1
	movl	8(%sp), %d2
	eorl	%d2, %d1
	casl	%d0, %d1, (%a0)
	bne	1b
	movl	%d0, %a0
	rts
END(__sync_fetch_and_xor_4)


ENTRY(_atomic_xor_16_nv)
	movl	4(%sp), %a0
1:	movw	(%a0), %d0
	movw	%d0, %d1
	movw	8(%sp), %d2
	eorw	%d2, %d0
	casw	%d1, %d0, (%a0)
	bne	1b
	rts
END(_atomic_xor_16_nv)
STRONG_ALIAS(__sync_xor_and_fetch_2, _atomic_xor_16_nv)

ENTRY(__sync_fetch_and_xor_2)
	movl	4(%sp), %a0
1:	movw	(%a0), %d0
	movw	%d0, %d1
	movw	8(%sp), %d2
	eorw	%d2, %d1
	casw	%d0, %d1, (%a0)
	bne	1b
	rts
END(__sync_fetch_and_xor_2)


ENTRY(_atomic_xor_8_nv)
	movl	4(%sp), %a0
1:	movb	(%a0), %d0
	movb	%d0, %d1
	movb	8(%sp), %d2
	eorb	%d2, %d0
	casb	%d1, %d0, (%a0)
	bne	1b
	rts
END(_atomic_xor_8_nv)
STRONG_ALIAS(__sync_xor_and_fetch_1, _atomic_xor_8_nv)

ENTRY(__sync_fetch_and_xor_1)
	movl	4(%sp), %a0
1:	movb	(%a0), %d0
	movb	%d0, %d1
	movb	8(%sp), %d2
	eorb	%d2, %d1
	casb	%d0, %d1, (%a0)
	bne	1b
	rts
END(__sync_fetch_and_xor_1)