Fri Feb 21 12:23:30 2014 UTC ()
Add tsciic, a driver for the DECchip 21272 Core Logic chipset I2C controller.
Tested on DS20L.


(jdc)
diff -r1.185 -r1.186 src/sys/arch/alpha/conf/files.alpha
diff -r1.22 -r1.23 src/sys/arch/alpha/pci/tsc.c
diff -r0 -r1.1 src/sys/arch/alpha/pci/tsciic.c
diff -r1.6 -r1.7 src/sys/arch/alpha/pci/tsreg.h
diff -r1.11 -r1.12 src/sys/arch/alpha/pci/tsvar.h

cvs diff -r1.185 -r1.186 src/sys/arch/alpha/conf/files.alpha (expand / switch to unified diff)

--- src/sys/arch/alpha/conf/files.alpha 2012/10/02 23:54:51 1.185
+++ src/sys/arch/alpha/conf/files.alpha 2014/02/21 12:23:30 1.186
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1# $NetBSD: files.alpha,v 1.185 2012/10/02 23:54:51 christos Exp $ 1# $NetBSD: files.alpha,v 1.186 2014/02/21 12:23:30 jdc Exp $
2# 2#
3# alpha-specific configuration info 3# alpha-specific configuration info
4 4
5# maxpartitions must be first item in files.${ARCH}.newconf 5# maxpartitions must be first item in files.${ARCH}.newconf
6maxpartitions 8 6maxpartitions 8
7 7
8maxusers 8 16 64 8maxusers 8 16 64
9 9
10# CPU support option headers 10# CPU support option headers
11defflag DEC_2000_300 # "Jensen": 2000/300 (DECpc AXP 150) 11defflag DEC_2000_300 # "Jensen": 2000/300 (DECpc AXP 150)
12defflag DEC_2100_A50 # Avanti etc: AlphaStation 400, 200, etc. 12defflag DEC_2100_A50 # Avanti etc: AlphaStation 400, 200, etc.
13defflag DEC_2100_A500 # Sable etc: AlphaServer 2100 13defflag DEC_2100_A500 # Sable etc: AlphaServer 2100
14defflag DEC_2100A_A500 # Lynx etc: AlphaServer 2100A 14defflag DEC_2100A_A500 # Lynx etc: AlphaServer 2100A
@@ -265,26 +265,30 @@ file arch/alpha/pci/mcpcia_dma.c mcpcia @@ -265,26 +265,30 @@ file arch/alpha/pci/mcpcia_dma.c mcpcia
265file arch/alpha/pci/mcpcia_pci.c mcpcia 265file arch/alpha/pci/mcpcia_pci.c mcpcia
266 266
267device tsc { } 267device tsc { }
268attach tsc at mainbus 268attach tsc at mainbus
269file arch/alpha/pci/tsc.c dec_6600 269file arch/alpha/pci/tsc.c dec_6600
270 270
271device tsp: pcibus, alpha_sgmap, alpha_pci_sgmap_pte64 271device tsp: pcibus, alpha_sgmap, alpha_pci_sgmap_pte64
272attach tsp at tsc 272attach tsp at tsc
273file arch/alpha/pci/tsp_dma.c tsp 273file arch/alpha/pci/tsp_dma.c tsp
274file arch/alpha/pci/tsp_pci.c tsp 274file arch/alpha/pci/tsp_pci.c tsp
275file arch/alpha/pci/tsp_bus_io.c tsp 275file arch/alpha/pci/tsp_bus_io.c tsp
276file arch/alpha/pci/tsp_bus_mem.c tsp 276file arch/alpha/pci/tsp_bus_mem.c tsp
277 277
 278device tsciic: i2cbus, i2c_bitbang
 279attach tsciic at tsc
 280file arch/alpha/pci/tsciic.c tsciic
 281
278device ttwoga { hose = -1 } 282device ttwoga { hose = -1 }
279attach ttwoga at mainbus 283attach ttwoga at mainbus
280# identical to pcibus 284# identical to pcibus
281define sableiobus {[bus = -1]} 285define sableiobus {[bus = -1]}
282device ttwopci: pcibus, sableiobus, alpha_sgmap, alpha_pci_sgmap_pte64 286device ttwopci: pcibus, sableiobus, alpha_sgmap, alpha_pci_sgmap_pte64
283attach ttwopci at ttwoga 287attach ttwopci at ttwoga
284file arch/alpha/pci/ttwoga.c ttwoga 288file arch/alpha/pci/ttwoga.c ttwoga
285file arch/alpha/pci/ttwoga_bus_io.c ttwoga 289file arch/alpha/pci/ttwoga_bus_io.c ttwoga
286file arch/alpha/pci/ttwoga_bus_mem.c ttwoga 290file arch/alpha/pci/ttwoga_bus_mem.c ttwoga
287file arch/alpha/pci/ttwoga_dma.c ttwoga 291file arch/alpha/pci/ttwoga_dma.c ttwoga
288file arch/alpha/pci/ttwoga_pci.c ttwoga 292file arch/alpha/pci/ttwoga_pci.c ttwoga
289 293
290# 294#

cvs diff -r1.22 -r1.23 src/sys/arch/alpha/pci/tsc.c (expand / switch to unified diff)

--- src/sys/arch/alpha/pci/tsc.c 2013/09/23 16:50:12 1.22
+++ src/sys/arch/alpha/pci/tsc.c 2014/02/21 12:23:30 1.23
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: tsc.c,v 1.22 2013/09/23 16:50:12 tsutsui Exp $ */ 1/* $NetBSD: tsc.c,v 1.23 2014/02/21 12:23:30 jdc Exp $ */
2 2
3/*- 3/*-
4 * Copyright (c) 1999 by Ross Harvey. All rights reserved. 4 * Copyright (c) 1999 by Ross Harvey. All rights reserved.
5 * 5 *
6 * Redistribution and use in source and binary forms, with or without 6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions 7 * modification, are permitted provided that the following conditions
8 * are met: 8 * are met:
9 * 1. Redistributions of source code must retain the above copyright 9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer. 10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright 11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the 12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution. 13 * documentation and/or other materials provided with the distribution.
14 * 3. All advertising materials mentioning features or use of this software 14 * 3. All advertising materials mentioning features or use of this software
@@ -25,27 +25,27 @@ @@ -25,27 +25,27 @@
25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * SUCH DAMAGE. 30 * SUCH DAMAGE.
31 * 31 *
32 */ 32 */
33 33
34#include "opt_dec_6600.h" 34#include "opt_dec_6600.h"
35 35
36#include <sys/cdefs.h> 36#include <sys/cdefs.h>
37 37
38__KERNEL_RCSID(0, "$NetBSD: tsc.c,v 1.22 2013/09/23 16:50:12 tsutsui Exp $"); 38__KERNEL_RCSID(0, "$NetBSD: tsc.c,v 1.23 2014/02/21 12:23:30 jdc Exp $");
39 39
40#include <sys/param.h> 40#include <sys/param.h>
41#include <sys/systm.h> 41#include <sys/systm.h>
42#include <sys/device.h> 42#include <sys/device.h>
43#include <sys/malloc.h> 43#include <sys/malloc.h>
44 44
45#include <machine/autoconf.h> 45#include <machine/autoconf.h>
46#include <machine/rpb.h> 46#include <machine/rpb.h>
47#include <machine/sysarch.h> 47#include <machine/sysarch.h>
48 48
49#include <dev/isa/isareg.h> 49#include <dev/isa/isareg.h>
50#include <dev/isa/isavar.h> 50#include <dev/isa/isavar.h>
51#include <dev/pci/pcireg.h> 51#include <dev/pci/pcireg.h>
@@ -70,26 +70,36 @@ struct tsp_config tsp_configuration[4]; @@ -70,26 +70,36 @@ struct tsp_config tsp_configuration[4];
70 70
71static int tscprint(void *, const char *pnp); 71static int tscprint(void *, const char *pnp);
72 72
73static int tspmatch(device_t, cfdata_t, void *); 73static int tspmatch(device_t, cfdata_t, void *);
74static void tspattach(device_t, device_t, void *); 74static void tspattach(device_t, device_t, void *);
75 75
76CFATTACH_DECL_NEW(tsp, 0, tspmatch, tspattach, NULL, NULL); 76CFATTACH_DECL_NEW(tsp, 0, tspmatch, tspattach, NULL, NULL);
77 77
78extern struct cfdriver tsp_cd; 78extern struct cfdriver tsp_cd;
79 79
80static int tsp_bus_get_window(int, int, 80static int tsp_bus_get_window(int, int,
81 struct alpha_bus_space_translation *); 81 struct alpha_bus_space_translation *);
82 82
 83static int tsciicprint(void *, const char *pnp);
 84
 85static int tsciicmatch(device_t, cfdata_t, void *);
 86static void tsciicattach(device_t, device_t, void *);
 87
 88CFATTACH_DECL_NEW(tsciic, sizeof(struct tsciic_softc), tsciicmatch,
 89 tsciicattach, NULL, NULL);
 90
 91extern struct cfdriver tsciic_cd;
 92
83/* There can be only one */ 93/* There can be only one */
84static int tscfound; 94static int tscfound;
85 95
86/* Which hose is the display console connected to? */ 96/* Which hose is the display console connected to? */
87int tsp_console_hose; 97int tsp_console_hose;
88 98
89static int 99static int
90tscmatch(device_t parent, cfdata_t match, void *aux) 100tscmatch(device_t parent, cfdata_t match, void *aux)
91{ 101{
92 struct mainbus_attach_args *ma = aux; 102 struct mainbus_attach_args *ma = aux;
93 103
94 switch (cputype) { 104 switch (cputype) {
95 case ST_DEC_6600: 105 case ST_DEC_6600:
@@ -97,26 +107,27 @@ tscmatch(device_t parent, cfdata_t match @@ -97,26 +107,27 @@ tscmatch(device_t parent, cfdata_t match
97 return strcmp(ma->ma_name, tsc_cd.cd_name) == 0 && !tscfound; 107 return strcmp(ma->ma_name, tsc_cd.cd_name) == 0 && !tscfound;
98 default: 108 default:
99 return 0; 109 return 0;
100 } 110 }
101} 111}
102 112
103static void 113static void
104tscattach(device_t parent, device_t self, void * aux) 114tscattach(device_t parent, device_t self, void * aux)
105{ 115{
106 int i; 116 int i;
107 int nbus; 117 int nbus;
108 uint64_t csc, aar; 118 uint64_t csc, aar;
109 struct tsp_attach_args tsp; 119 struct tsp_attach_args tsp;
 120 struct tsciic_attach_args tsciic;
110 struct mainbus_attach_args *ma = aux; 121 struct mainbus_attach_args *ma = aux;
111 int titan = cputype == ST_DEC_TITAN; 122 int titan = cputype == ST_DEC_TITAN;
112 123
113 tscfound = 1; 124 tscfound = 1;
114 125
115 csc = LDQP(TS_C_CSC); 126 csc = LDQP(TS_C_CSC);
116 127
117 nbus = 1 + (CSC_BC(csc) >= 2); 128 nbus = 1 + (CSC_BC(csc) >= 2);
118 printf(": 2127%c Core Logic Chipset, Cchip rev %d\n" 129 printf(": 2127%c Core Logic Chipset, Cchip rev %d\n"
119 "%s%d: %c Dchips, %d memory bus%s of %d bytes\n", 130 "%s%d: %c Dchips, %d memory bus%s of %d bytes\n",
120 titan ? '4' : '2', (int)MISC_REV(LDQP(TS_C_MISC)), 131 titan ? '4' : '2', (int)MISC_REV(LDQP(TS_C_MISC)),
121 ma->ma_name, ma->ma_slot, "2448"[CSC_BC(csc)], 132 ma->ma_name, ma->ma_slot, "2448"[CSC_BC(csc)],
122 nbus, nbus > 1 ? "es" : "", 16 + 16 * ((csc & CSC_AW) != 0)); 133 nbus, nbus > 1 ? "es" : "", 16 + 16 * ((csc & CSC_AW) != 0));
@@ -136,38 +147,55 @@ tscattach(device_t parent, device_t self @@ -136,38 +147,55 @@ tscattach(device_t parent, device_t self
136 if (titan) { 147 if (titan) {
137 tsp.tsp_slot += 2; 148 tsp.tsp_slot += 2;
138 config_found(self, &tsp, tscprint); 149 config_found(self, &tsp, tscprint);
139 } 150 }
140 151
141 if (csc & CSC_P1P) { 152 if (csc & CSC_P1P) {
142 tsp.tsp_slot = 1; 153 tsp.tsp_slot = 1;
143 config_found(self, &tsp, tscprint); 154 config_found(self, &tsp, tscprint);
144 if (titan) { 155 if (titan) {
145 tsp.tsp_slot += 2; 156 tsp.tsp_slot += 2;
146 config_found(self, &tsp, tscprint); 157 config_found(self, &tsp, tscprint);
147 } 158 }
148 } 159 }
 160
 161 memset(&tsciic, 0, sizeof tsciic);
 162 tsciic.tsciic_name = "tsciic";
 163
 164 config_found(self, &tsciic, tsciicprint);
149} 165}
150 166
151static int 167static int
152tscprint(void *aux, const char *p) 168tscprint(void *aux, const char *p)
153{ 169{
154 struct tsp_attach_args *tsp = aux; 170 struct tsp_attach_args *tsp = aux;
155 171
156 if (p) 172 if (p)
157 aprint_normal("%s%d at %s", tsp->tsp_name, tsp->tsp_slot, p); 173 aprint_normal("%s%d at %s", tsp->tsp_name, tsp->tsp_slot, p);
158 return UNCONF; 174 return UNCONF;
159} 175}
160 176
 177static int
 178tsciicprint(void *aux, const char *p)
 179{
 180 struct tsciic_attach_args *tsciic = aux;
 181
 182 if (p)
 183 aprint_normal("%s at %s\n", tsciic->tsciic_name, p);
 184 else
 185 aprint_normal("\n");
 186 return UNCONF;
 187}
 188
161#define tsp() { Generate ctags(1) key. } 189#define tsp() { Generate ctags(1) key. }
162 190
163static int 191static int
164tspmatch(device_t parent, cfdata_t match, void *aux) 192tspmatch(device_t parent, cfdata_t match, void *aux)
165{ 193{
166 struct tsp_attach_args *t = aux; 194 struct tsp_attach_args *t = aux;
167 195
168 switch (cputype) { 196 switch (cputype) {
169 case ST_DEC_6600: 197 case ST_DEC_6600:
170 case ST_DEC_TITAN: 198 case ST_DEC_TITAN:
171 return strcmp(t->tsp_name, tsp_cd.cd_name) == 0; 199 return strcmp(t->tsp_name, tsp_cd.cd_name) == 0;
172 default: 200 default:
173 return 0; 201 return 0;
@@ -267,26 +295,48 @@ tsp_bus_get_window(int type, int window, @@ -267,26 +295,48 @@ tsp_bus_get_window(int type, int window,
267 panic("tsp_bus_get_window"); 295 panic("tsp_bus_get_window");
268 } 296 }
269 297
270 error = alpha_bus_space_get_window(st, window, abst); 298 error = alpha_bus_space_get_window(st, window, abst);
271 if (error) 299 if (error)
272 return error; 300 return error;
273 301
274 abst->abst_sys_start = TS_PHYSADDR(abst->abst_sys_start); 302 abst->abst_sys_start = TS_PHYSADDR(abst->abst_sys_start);
275 abst->abst_sys_end = TS_PHYSADDR(abst->abst_sys_end); 303 abst->abst_sys_end = TS_PHYSADDR(abst->abst_sys_end);
276 304
277 return 0; 305 return 0;
278} 306}
279 307
 308#define tsciic() { Generate ctags(1) key. }
 309
 310static int
 311tsciicmatch(device_t parent, cfdata_t match, void *aux)
 312{
 313 struct tsciic_attach_args *t = aux;
 314
 315 switch (cputype) {
 316 case ST_DEC_6600:
 317 case ST_DEC_TITAN:
 318 return strcmp(t->tsciic_name, tsciic_cd.cd_name) == 0;
 319 default:
 320 return 0;
 321 }
 322}
 323
 324static void
 325tsciicattach(device_t parent, device_t self, void *aux)
 326{
 327 tsciic_init(self);
 328}
 329
280void 330void
281tsc_print_dir(unsigned int indent, unsigned long dir) 331tsc_print_dir(unsigned int indent, unsigned long dir)
282{ 332{
283 char buf[60]; 333 char buf[60];
284 334
285 snprintb(buf, 60, 335 snprintb(buf, 60,
286 "\177\20" 336 "\177\20"
287 "b\77Internal Cchip asynchronous error\0" 337 "b\77Internal Cchip asynchronous error\0"
288 "b\76Pchip 0 error\0" 338 "b\76Pchip 0 error\0"
289 "b\75Pchip 1 error\0" 339 "b\75Pchip 1 error\0"
290 "b\74Pchip 2 error\0" 340 "b\74Pchip 2 error\0"
291 "b\73Pchip 3 error\0", 341 "b\73Pchip 3 error\0",
292 dir); 342 dir);

File Added: src/sys/arch/alpha/pci/tsciic.c
/*	$NetBSD: tsciic.c,v 1.1 2014/02/21 12:23:30 jdc Exp $	*/

/*
 * Copyright (c) 2013 The NetBSD Foundation, Inc.
 * All rights reserved.
 *
 * This code is derived from software contributed to The NetBSD Foundation
 * by Julian Coleman.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

#include <sys/cdefs.h>

__KERNEL_RCSID(0, "$NetBSD: tsciic.c,v 1.1 2014/02/21 12:23:30 jdc Exp $");

#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>

#include <alpha/pci/tsreg.h>
#include <alpha/pci/tsvar.h>

#include <dev/i2c/i2cvar.h>
#include <dev/i2c/i2c_bitbang.h>
#include <dev/i2c/ddcvar.h>

/* I2C glue */
static int tsciic_acquire_bus(void *, int);
static void tsciic_release_bus(void *, int);
static int tsciic_send_start(void *, int);
static int tsciic_send_stop(void *, int);
static int tsciic_initiate_xfer(void *, i2c_addr_t, int);
static int tsciic_read_byte(void *, uint8_t *, int);
static int tsciic_write_byte(void *, uint8_t, int);

/* I2C bitbang glue */
static void tsciicbb_set_bits(void *, uint32_t);
static void tsciicbb_set_dir(void *, uint32_t);
static uint32_t tsciicbb_read(void *);

#define MPD_BIT_SDA 0x01
#define MPD_BIT_SCL 0x02
static const struct i2c_bitbang_ops tsciicbb_ops = {
	tsciicbb_set_bits,
	tsciicbb_set_dir,
	tsciicbb_read,
	{
		MPD_BIT_SDA,
		MPD_BIT_SCL,
		0,
		0
	}
};

void
tsciic_init(device_t self) {
	struct tsciic_softc *sc = device_private(self);
	struct i2cbus_attach_args iba;

	mutex_init(&sc->sc_buslock, MUTEX_DEFAULT, IPL_NONE);

	sc->sc_i2c.ic_cookie = sc;
	sc->sc_i2c.ic_acquire_bus = tsciic_acquire_bus;
	sc->sc_i2c.ic_release_bus = tsciic_release_bus;
	sc->sc_i2c.ic_send_start = tsciic_send_start;
	sc->sc_i2c.ic_send_stop = tsciic_send_stop;
	sc->sc_i2c.ic_initiate_xfer = tsciic_initiate_xfer;
	sc->sc_i2c.ic_read_byte = tsciic_read_byte;
	sc->sc_i2c.ic_write_byte = tsciic_write_byte;
	sc->sc_i2c.ic_exec = NULL;

	memset(&iba, 0, sizeof(iba));
	iba.iba_tag = &sc->sc_i2c;

	config_found_ia(self, "i2cbus", &iba, iicbus_print);

}

/* I2C bitbanging */
static void
tsciicbb_set_bits(void *cookie, uint32_t bits)
{
	uint64_t val;

	val = (bits & MPD_BIT_SDA ? MPD_DS : 0) |
	    (bits & MPD_BIT_SCL ? MPD_CKS : 0);
	alpha_mb();
	STQP(TS_C_MPD) = val;
	alpha_mb();
}

static void
tsciicbb_set_dir(void *cookie, uint32_t dir)
{
	/* Nothing to do */
}

static uint32_t
tsciicbb_read(void *cookie)
{
	uint64_t val;
	uint32_t bits;

	val = LDQP(TS_C_MPD);
	bits = (val & MPD_DR ? MPD_BIT_SDA : 0) |
	    (val & MPD_CKR ? MPD_BIT_SCL : 0);
	return bits;
}

/* higher level I2C stuff */
static int
tsciic_acquire_bus(void *cookie, int flags)
{
	struct tsciic_softc *sc = cookie;

	mutex_enter(&sc->sc_buslock);
	return 0;
}

static void
tsciic_release_bus(void *cookie, int flags)
{
	struct tsciic_softc *sc = cookie;

	mutex_exit(&sc->sc_buslock);
}

static int
tsciic_send_start(void *cookie, int flags)
{
	return (i2c_bitbang_send_start(cookie, flags, &tsciicbb_ops));
}

static int
tsciic_send_stop(void *cookie, int flags)
{
	return (i2c_bitbang_send_stop(cookie, flags, &tsciicbb_ops));
}

static int
tsciic_initiate_xfer(void *cookie, i2c_addr_t addr, int flags)
{
	return (i2c_bitbang_initiate_xfer(cookie, addr, flags, 
	    &tsciicbb_ops));
}

static int
tsciic_read_byte(void *cookie, uint8_t *valp, int flags)
{
	return (i2c_bitbang_read_byte(cookie, valp, flags, &tsciicbb_ops));
}

static int
tsciic_write_byte(void *cookie, uint8_t val, int flags)
{
	return (i2c_bitbang_write_byte(cookie, val, flags, &tsciicbb_ops));
}

cvs diff -r1.6 -r1.7 src/sys/arch/alpha/pci/tsreg.h (expand / switch to unified diff)

--- src/sys/arch/alpha/pci/tsreg.h 2013/09/23 16:41:57 1.6
+++ src/sys/arch/alpha/pci/tsreg.h 2014/02/21 12:23:30 1.7
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: tsreg.h,v 1.6 2013/09/23 16:41:57 tsutsui Exp $ */ 1/* $NetBSD: tsreg.h,v 1.7 2014/02/21 12:23:30 jdc Exp $ */
2 2
3/*- 3/*-
4 * Copyright (c) 1999 by Ross Harvey. All rights reserved. 4 * Copyright (c) 1999 by Ross Harvey. All rights reserved.
5 * 5 *
6 * Redistribution and use in source and binary forms, with or without 6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions 7 * modification, are permitted provided that the following conditions
8 * are met: 8 * are met:
9 * 1. Redistributions of source code must retain the above copyright 9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer. 10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright 11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the 12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution. 13 * documentation and/or other materials provided with the distribution.
14 * 3. All advertising materials mentioning features or use of this software 14 * 3. All advertising materials mentioning features or use of this software
@@ -85,26 +85,31 @@ @@ -85,26 +85,31 @@
85# define CSC_BC(r) TSFIELD((r), 0, 2) 85# define CSC_BC(r) TSFIELD((r), 0, 2)
86# define CSC_AW (1L << 8) 86# define CSC_AW (1L << 8)
87 87
88#define TS_C_MTR 0x101##a000##0040UL 88#define TS_C_MTR 0x101##a000##0040UL
89 89
90#define TS_C_MISC 0x101##a000##0080UL /* Miscellaneous Register */ 90#define TS_C_MISC 0x101##a000##0080UL /* Miscellaneous Register */
91 91
92# define MISC_NXM(r) TSFIELD((r), 28, 1) 92# define MISC_NXM(r) TSFIELD((r), 28, 1)
93# define MISC_NXM_SRC(r) TSFIELD((r), 29, 3) 93# define MISC_NXM_SRC(r) TSFIELD((r), 29, 3)
94# define MISC_REV(r) TSFIELD((r), 39, 8) 94# define MISC_REV(r) TSFIELD((r), 39, 8)
95 95
96#define TS_C_MPD 0x101##a000##00c0UL 96#define TS_C_MPD 0x101##a000##00c0UL
97 97
 98# define MPD_DR 0x08 /* RO: Data receive */
 99# define MPD_CKR 0x04 /* RO: Clock receive */
 100# define MPD_DS 0x02 /* WO: Data send - Must be a 1 to receive */
 101# define MPD_CKS 0x01 /* WO: Clock send */
 102
98#define TS_C_AAR0 0x101##a000##0100UL 103#define TS_C_AAR0 0x101##a000##0100UL
99#define TS_C_AAR1 0x101##a000##0140UL 104#define TS_C_AAR1 0x101##a000##0140UL
100#define TS_C_AAR2 0x101##a000##0180UL 105#define TS_C_AAR2 0x101##a000##0180UL
101#define TS_C_AAR3 0x101##a000##01c0UL 106#define TS_C_AAR3 0x101##a000##01c0UL
102 107
103# define AAR_ASIZ(r) TSFIELD((r), 12, 4) 108# define AAR_ASIZ(r) TSFIELD((r), 12, 4)
104# define AAR_SPLIT (1L << 8) 109# define AAR_SPLIT (1L << 8)
105 110
106#define TS_C_DIM0 0x101##a000##0200UL 111#define TS_C_DIM0 0x101##a000##0200UL
107#define TS_C_DIM1 0x101##a000##0240UL 112#define TS_C_DIM1 0x101##a000##0240UL
108#define TS_C_DIR0 0x101##a000##0280UL 113#define TS_C_DIR0 0x101##a000##0280UL
109#define TS_C_DIR1 0x101##a000##02c0UL 114#define TS_C_DIR1 0x101##a000##02c0UL
110#define TS_C_DRIR 0x101##a000##0300UL 115#define TS_C_DRIR 0x101##a000##0300UL

cvs diff -r1.11 -r1.12 src/sys/arch/alpha/pci/tsvar.h (expand / switch to unified diff)

--- src/sys/arch/alpha/pci/tsvar.h 2013/09/23 16:41:57 1.11
+++ src/sys/arch/alpha/pci/tsvar.h 2014/02/21 12:23:30 1.12
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: tsvar.h,v 1.11 2013/09/23 16:41:57 tsutsui Exp $ */ 1/* $NetBSD: tsvar.h,v 1.12 2014/02/21 12:23:30 jdc Exp $ */
2 2
3/*- 3/*-
4 * Copyright (c) 1999 by Ross Harvey. All rights reserved. 4 * Copyright (c) 1999 by Ross Harvey. All rights reserved.
5 * 5 *
6 * Redistribution and use in source and binary forms, with or without 6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions 7 * modification, are permitted provided that the following conditions
8 * are met: 8 * are met:
9 * 1. Redistributions of source code must retain the above copyright 9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer. 10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright 11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the 12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution. 13 * documentation and/or other materials provided with the distribution.
14 * 3. All advertising materials mentioning features or use of this software 14 * 3. All advertising materials mentioning features or use of this software
@@ -23,26 +23,27 @@ @@ -23,26 +23,27 @@
23 * ARE DISCLAIMED. IN NO EVENT SHALL ROSS HARVEY BE LIABLE FOR ANY 23 * ARE DISCLAIMED. IN NO EVENT SHALL ROSS HARVEY BE LIABLE FOR ANY
24 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 24 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * SUCH DAMAGE. 30 * SUCH DAMAGE.
31 * 31 *
32 */ 32 */
33 33
34#include <dev/isa/isavar.h> 34#include <dev/isa/isavar.h>
35#include <dev/pci/pcivar.h> 35#include <dev/pci/pcivar.h>
 36#include <dev/i2c/i2cvar.h>
36#include <alpha/pci/pci_sgmap_pte64.h> 37#include <alpha/pci/pci_sgmap_pte64.h>
37 38
38#define _FSTORE (EXTENT_FIXED_STORAGE_SIZE(8) / sizeof(long)) 39#define _FSTORE (EXTENT_FIXED_STORAGE_SIZE(8) / sizeof(long))
39 40
40#define tsvar() { Generate ctags(1) key. } 41#define tsvar() { Generate ctags(1) key. }
41 42
42struct tsp_config { 43struct tsp_config {
43 int pc_pslot; /* Pchip 0 or 1 */ 44 int pc_pslot; /* Pchip 0 or 1 */
44 int pc_initted; /* Initialized */ 45 int pc_initted; /* Initialized */
45 uint64_t pc_iobase; /* All Pchip space starts here */ 46 uint64_t pc_iobase; /* All Pchip space starts here */
46 struct ts_pchip *pc_csr; /* Pchip CSR space starts here */ 47 struct ts_pchip *pc_csr; /* Pchip CSR space starts here */
47 volatile uint64_t *pc_tlbia; /* Pchip TLBIA register address */  48 volatile uint64_t *pc_tlbia; /* Pchip TLBIA register address */
48 49
@@ -58,29 +59,41 @@ struct tsp_config { @@ -58,29 +59,41 @@ struct tsp_config {
58 uint32_t pc_hae_io; 59 uint32_t pc_hae_io;
59 60
60 long pc_io_exstorage[_FSTORE]; 61 long pc_io_exstorage[_FSTORE];
61 long pc_mem_exstorage[_FSTORE]; 62 long pc_mem_exstorage[_FSTORE];
62 struct extent *pc_io_ex, *pc_mem_ex; 63 struct extent *pc_io_ex, *pc_mem_ex;
63 int pc_mallocsafe; 64 int pc_mallocsafe;
64}; 65};
65 66
66struct tsp_attach_args { 67struct tsp_attach_args {
67 const char *tsp_name; 68 const char *tsp_name;
68 int tsp_slot; 69 int tsp_slot;
69}; 70};
70 71
 72struct tsciic_softc {
 73 device_t sc_dev;
 74 struct i2c_controller sc_i2c;
 75 kmutex_t sc_buslock;
 76};
 77
 78struct tsciic_attach_args {
 79 const char *tsciic_name;
 80};
 81
71extern int tsp_console_hose; 82extern int tsp_console_hose;
72 83
73struct tsp_config *tsp_init(int, int); 84struct tsp_config *tsp_init(int, int);
74void tsp_pci_init(pci_chipset_tag_t, void *); 85void tsp_pci_init(pci_chipset_tag_t, void *);
75void tsp_dma_init(struct tsp_config *); 86void tsp_dma_init(struct tsp_config *);
76 87
77void tsp_bus_io_init(bus_space_tag_t, void *); 88void tsp_bus_io_init(bus_space_tag_t, void *);
78void tsp_bus_mem_init(bus_space_tag_t, void *); 89void tsp_bus_mem_init(bus_space_tag_t, void *);
79 90
80void tsp_bus_mem_init2(bus_space_tag_t, void *); 91void tsp_bus_mem_init2(bus_space_tag_t, void *);
81 92
 93void tsciic_init(device_t);
 94
82void tsp_print_error(unsigned int, unsigned long); 95void tsp_print_error(unsigned int, unsigned long);
83void tsc_print_misc(unsigned int, unsigned long); 96void tsc_print_misc(unsigned int, unsigned long);
84void tsc_print_dir(unsigned int, unsigned long); 97void tsc_print_dir(unsigned int, unsigned long);
85 98
86#define IPRINTF(i, f, ...) printf("%*s" f, i * 4, "", ##__VA_ARGS__) 99#define IPRINTF(i, f, ...) printf("%*s" f, i * 4, "", ##__VA_ARGS__)