 @@ -1,14 +1,14 @@
-/*	$NetBSD: disassem.c,v 1.23 2014/01/10 23:52:53 matt Exp $	*/
+/*	$NetBSD: disassem.c,v 1.24 2014/03/03 08:51:39 matt Exp $	*/
 /*
  * Copyright (c) 1996 Mark Brinicombe.
  * Copyright (c) 1996 Brini.
+ *
  * All rights reserved.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
 @@ -39,27 +39,27 @@
+ *
  * Kernel disassembler
+ *
  * Created      : 10/02/96
+ *
  * Structured after the sparc/sparc/db_disasm.c by David S. Miller &
  * Paul Kranenburg
+ *
  * This code is not complete. Not all instructions are disassembled.
  */
 #include <sys/param.h>
-__KERNEL_RCSID(0, "$NetBSD: disassem.c,v 1.23 2014/01/10 23:52:53 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: disassem.c,v 1.24 2014/03/03 08:51:39 matt Exp $");
 #include <sys/systm.h>
 #include <arch/arm/arm/disassem.h>
 #include <arm/armreg.h>
 #ifndef _KERNEL
 #include <stdio.h>
 #endif
 /*
  * General instruction format
+ *
 @@ -112,48 +112,61 @@ __KERNEL_RCSID(0, "$NetBSD: disassem.c,v
  * # - co-processor number
  */
 struct arm32_insn {
 	u_int mask;
 	u_int pattern;
 	const char* name;
 	const char* format;
 };
 static const struct arm32_insn arm32_i[] = {
     { 0x0fffffff, 0x0ff00000, "imb",	"c" },		/* Before swi */
     { 0x0fffffff, 0x0ff00001, "imbrange",	"c" },	/* Before swi */
     { 0x0fffffff, 0x0320f003, "yield",	"" },	/* Before swi */
     { 0x0fffffff, 0x0320f002, "wfe",	"" },	/* Before swi */
     { 0x0fffffff, 0x0320f003, "wfi",	"" },	/* Before swi */
     { 0x0f000000, 0x0f000000, "swi",	"c" },
     { 0xfe000000, 0xfa000000, "blx",	"t" },		/* Before b and bl */
     { 0x0f000000, 0x0a000000, "b",	"b" },
     { 0x0f000000, 0x0b000000, "bl",	"b" },
     { 0x0fe000f0, 0x00000090, "mul",	"Snms" },
     { 0x0fe000f0, 0x00200090, "mla",	"Snmsd" },
     { 0x0fe000f0, 0x00800090, "umull",	"Sdnms" },
     { 0x0fe000f0, 0x00c00090, "smull",	"Sdnms" },
     { 0x0fe000f0, 0x00a00090, "umlal",	"Sdnms" },
     { 0x0fe000f0, 0x00e00090, "smlal",	"Sdnms" },
     { 0x0d700000, 0x04200000, "strt",	"daW" },
     { 0x0d700000, 0x04300000, "ldrt",	"daW" },
     { 0x0d700000, 0x04600000, "strbt",	"daW" },
     { 0x0d700000, 0x04700000, "ldrbt",	"daW" },
     { 0x0c500000, 0x04000000, "str",	"daW" },
     { 0x0c500000, 0x04100000, "ldr",	"daW" },
     { 0x0c500000, 0x04400000, "strb",	"daW" },
     { 0x0c500000, 0x04500000, "ldrb",	"daW" },
     { 0x0fff0000, 0x092d0000, "push",	"l" },	/* separate out r13 base */
     { 0x0fff0000, 0x08bd0000, "pop",	"l" },	/* separate out r13 base */
     { 0x0e1f0000, 0x080d0000, "stm",	"YnWl" },/* separate out r13 base */
     { 0x0e1f0000, 0x081d0000, "ldm",	"YnWl" },/* separate out r13 base */
     { 0x0e100000, 0x08000000, "stm",	"XnWl" },
     { 0x0e100000, 0x08100000, "ldm",	"XnWl" },
     { 0x0ff00fff, 0x01900f9f, "ldrex",	"da" },
     { 0x0ff00fff, 0x01b00f9f, "ldrexd",	"da" },
     { 0x0ff00fff, 0x01d00f9f, "ldrexb",	"da" },
     { 0x0ff00fff, 0x01f00f9f, "ldrexh",	"da" },
     { 0x0ff00ff0, 0x01800f90, "strex",	"dma" },
     { 0x0ff00ff0, 0x01a00f90, "strexd",	"dma" },
     { 0x0ff00ff0, 0x01c00f90, "strexb",	"dma" },
     { 0x0ff00ff0, 0x01e00f90, "strexh",	"dma" },
     { 0x0e1000f0, 0x00100090, "ldrb",	"de" },
     { 0x0e1000f0, 0x00000090, "strb",	"de" },
     { 0x0e1000f0, 0x001000d0, "ldrsb",	"de" },
     { 0x0e1000f0, 0x001000b0, "ldrh",	"de" },
     { 0x0e1000f0, 0x000000b0, "strh",	"de" },
     { 0x0e1000f0, 0x001000f0, "ldrsh",	"de" },
     { 0x0f200090, 0x00200090, "und",	"x" },	/* Before data processing */
     { 0x0e1000d0, 0x000000d0, "und",	"x" },	/* Before data processing */
     { 0x0ff00ff0, 0x01000090, "swp",	"dmo" },
     { 0x0ff00ff0, 0x01400090, "swpb",	"dmo" },
     { 0x0fbf0fff, 0x010f0000, "mrs",	"dp" },	/* Before data processing */
     { 0x0fb0fff0, 0x0120f000, "msr",	"pFm" },/* Before data processing */
     { 0x0fe0f000, 0x0320f000, "msr",	"pF2" },/* Before data processing */
 @@ -657,27 +670,28 @@ disasm_insn_ldrstr(const disasm_interfac
+{
 	int offset;
 	offset = insn & 0xfff;
 	if ((insn & 0x032f0000) == 0x010f0000) {
 		/* rA = pc, immediate index */
 		if (insn & 0x00800000)
 			loc += offset;
 		else
 			loc -= offset;
 		di->di_printaddr(loc + 8);
  	} else {
 		di->di_printf("[r%d", (insn >> 16) & 0x0f);
-		if ((insn & 0x03000fff) != 0x01000000) {
+		if ((insn & 0x03000fff) != 0x01000000
 		    && (insn & 0x0f800ff0) != 0x01800f90) {
 			di->di_printf("%s, ", (insn & (1 << 24)) ? "" : "]");
 			if (!(insn & 0x00800000))
 				di->di_printf("-");
 			if (insn & (1 << 25))
 				disasm_register_shift(di, insn);
 			else
 				di->di_printf("#0x%03x", offset);
+		}
 		if (insn & (1 << 24))
 			di->di_printf("]");
+	}
+}