Fri Mar 7 05:27:33 2014 UTC ()
Avoid a gcc4.8 bogon.


(matt)
diff -r1.91 -r1.92 src/sys/arch/arm/include/armreg.h
cvs diff -r1.91 -r1.92 src/sys/arch/arm/include/armreg.h (expand / switch to unified diff)

--- src/sys/arch/arm/include/armreg.h 2014/03/05 16:33:33 1.91
+++ src/sys/arch/arm/include/armreg.h 2014/03/07 05:27:33 1.92
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: armreg.h,v 1.91 2014/03/05 16:33:33 matt Exp $ */ 1/* $NetBSD: armreg.h,v 1.92 2014/03/07 05:27:33 matt Exp $ */
2 2
3/* 3/*
4 * Copyright (c) 1998, 2001 Ben Harris 4 * Copyright (c) 1998, 2001 Ben Harris
5 * Copyright (c) 1994-1996 Mark Brinicombe. 5 * Copyright (c) 1994-1996 Mark Brinicombe.
6 * Copyright (c) 1994 Brini. 6 * Copyright (c) 1994 Brini.
7 * All rights reserved. 7 * All rights reserved.
8 * 8 *
9 * This code is derived from software written for Brini by Mark Brinicombe 9 * This code is derived from software written for Brini by Mark Brinicombe
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions 12 * modification, are permitted provided that the following conditions
13 * are met: 13 * are met:
14 * 1. Redistributions of source code must retain the above copyright 14 * 1. Redistributions of source code must retain the above copyright
@@ -793,27 +793,27 @@ arm_cond_ok_p(uint32_t insn, uint32_t ps @@ -793,27 +793,27 @@ arm_cond_ok_p(uint32_t insn, uint32_t ps
793 break; 793 break;
794 case INSN_COND_VS: // V == 1 794 case INSN_COND_VS: // V == 1
795 __ok = __v; 795 __ok = __v;
796 break; 796 break;
797 case INSN_COND_HI: // C == 1 && Z == 0 797 case INSN_COND_HI: // C == 1 && Z == 0
798 __ok = __c && !__z; 798 __ok = __c && !__z;
799 break; 799 break;
800 case INSN_COND_GE: // N == V 800 case INSN_COND_GE: // N == V
801 __ok = __n == __v; 801 __ok = __n == __v;
802 break; 802 break;
803 case INSN_COND_GT: // N == V && Z == 0 803 case INSN_COND_GT: // N == V && Z == 0
804 __ok = __n == __v && !__z; 804 __ok = __n == __v && !__z;
805 break; 805 break;
806 case INSN_COND_AL: 806 default: /* INSN_COND_AL or unconditional */
807 return true; 807 return true;
808 } 808 }
809 809
810 return (__cond & 1) ? !__ok : __ok; 810 return (__cond & 1) ? !__ok : __ok;
811} 811}
812#endif 812#endif
813 813
814#if !defined(__ASSEMBLER__) && !defined(_RUMPKERNEL) 814#if !defined(__ASSEMBLER__) && !defined(_RUMPKERNEL)
815#define ARMREG_READ_INLINE(name, __insnstring) \ 815#define ARMREG_READ_INLINE(name, __insnstring) \
816static inline uint32_t armreg_##name##_read(void) \ 816static inline uint32_t armreg_##name##_read(void) \
817{ \ 817{ \
818 uint32_t __rv; \ 818 uint32_t __rv; \
819 __asm __volatile("mrc " __insnstring : "=r"(__rv)); \ 819 __asm __volatile("mrc " __insnstring : "=r"(__rv)); \