| @@ -1,14 +1,14 @@ | | | @@ -1,14 +1,14 @@ |
1 | /* $NetBSD: machdep.c,v 1.74 2011/07/19 15:44:52 dyoung Exp $ */ | | 1 | /* $NetBSD: machdep.c,v 1.75 2014/06/19 13:20:13 msaitoh Exp $ */ |
2 | | | 2 | |
3 | /*- | | 3 | /*- |
4 | * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc. | | 4 | * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc. |
5 | * All rights reserved. | | 5 | * All rights reserved. |
6 | * | | 6 | * |
7 | * This code is derived from software contributed to The NetBSD Foundation | | 7 | * This code is derived from software contributed to The NetBSD Foundation |
8 | * by Charles M. Hannum and by Jason R. Thorpe of the Numerical Aerospace | | 8 | * by Charles M. Hannum and by Jason R. Thorpe of the Numerical Aerospace |
9 | * Simulation Facility, NASA Ames Research Center. | | 9 | * Simulation Facility, NASA Ames Research Center. |
10 | * | | 10 | * |
11 | * Redistribution and use in source and binary forms, with or without | | 11 | * Redistribution and use in source and binary forms, with or without |
12 | * modification, are permitted provided that the following conditions | | 12 | * modification, are permitted provided that the following conditions |
13 | * are met: | | 13 | * are met: |
14 | * 1. Redistributions of source code must retain the above copyright | | 14 | * 1. Redistributions of source code must retain the above copyright |
| @@ -55,27 +55,27 @@ | | | @@ -55,27 +55,27 @@ |
55 | * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE | | 55 | * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE |
56 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL | | 56 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
57 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS | | 57 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
58 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) | | 58 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
59 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT | | 59 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
60 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY | | 60 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
61 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF | | 61 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
62 | * SUCH DAMAGE. | | 62 | * SUCH DAMAGE. |
63 | * | | 63 | * |
64 | * @(#)machdep.c 7.4 (Berkeley) 6/3/91 | | 64 | * @(#)machdep.c 7.4 (Berkeley) 6/3/91 |
65 | */ | | 65 | */ |
66 | | | 66 | |
67 | #include <sys/cdefs.h> | | 67 | #include <sys/cdefs.h> |
68 | __KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.74 2011/07/19 15:44:52 dyoung Exp $"); | | 68 | __KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.75 2014/06/19 13:20:13 msaitoh Exp $"); |
69 | | | 69 | |
70 | #include "opt_ddb.h" | | 70 | #include "opt_ddb.h" |
71 | #include "opt_kgdb.h" | | 71 | #include "opt_kgdb.h" |
72 | #include "opt_memsize.h" | | 72 | #include "opt_memsize.h" |
73 | #include "opt_initbsc.h" | | 73 | #include "opt_initbsc.h" |
74 | #include "opt_kloader.h" | | 74 | #include "opt_kloader.h" |
75 | #include "opt_kloader_kernel_path.h" | | 75 | #include "opt_kloader_kernel_path.h" |
76 | | | 76 | |
77 | #include <sys/param.h> | | 77 | #include <sys/param.h> |
78 | #include <sys/systm.h> | | 78 | #include <sys/systm.h> |
79 | #include <sys/kernel.h> | | 79 | #include <sys/kernel.h> |
80 | #include <sys/mount.h> | | 80 | #include <sys/mount.h> |
81 | #include <sys/reboot.h> | | 81 | #include <sys/reboot.h> |
| @@ -519,27 +519,27 @@ LoadAndReset(const char *osimage) | | | @@ -519,27 +519,27 @@ LoadAndReset(const char *osimage) |
519 | printf("LoadAndReset: copy end[%lx,%lx]\n", csum, csum2); | | 519 | printf("LoadAndReset: copy end[%lx,%lx]\n", csum, csum2); |
520 | printf("start XLoadAndReset\n"); | | 520 | printf("start XLoadAndReset\n"); |
521 | | | 521 | |
522 | /* mask all externel interrupt (XXX) */ | | 522 | /* mask all externel interrupt (XXX) */ |
523 | | | 523 | |
524 | XLoadAndReset(buf_addr); | | 524 | XLoadAndReset(buf_addr); |
525 | } | | 525 | } |
526 | | | 526 | |
527 | void | | 527 | void |
528 | intc_intr(int ssr, int spc, int ssp) | | 528 | intc_intr(int ssr, int spc, int ssp) |
529 | { | | 529 | { |
530 | struct intc_intrhand *ih; | | 530 | struct intc_intrhand *ih; |
531 | struct clockframe cf; | | 531 | struct clockframe cf; |
532 | int s, evtcode; | | 532 | int evtcode; |
533 | | | 533 | |
534 | curcpu()->ci_data.cpu_nintr++; | | 534 | curcpu()->ci_data.cpu_nintr++; |
535 | | | 535 | |
536 | switch (cpu_product) { | | 536 | switch (cpu_product) { |
537 | case CPU_PRODUCT_7708: | | 537 | case CPU_PRODUCT_7708: |
538 | case CPU_PRODUCT_7708S: | | 538 | case CPU_PRODUCT_7708S: |
539 | case CPU_PRODUCT_7708R: | | 539 | case CPU_PRODUCT_7708R: |
540 | evtcode = _reg_read_4(SH3_INTEVT); | | 540 | evtcode = _reg_read_4(SH3_INTEVT); |
541 | break; | | 541 | break; |
542 | case CPU_PRODUCT_7709: | | 542 | case CPU_PRODUCT_7709: |
543 | case CPU_PRODUCT_7709A: | | 543 | case CPU_PRODUCT_7709A: |
544 | case CPU_PRODUCT_7706: | | 544 | case CPU_PRODUCT_7706: |
545 | evtcode = _reg_read_4(SH7709_INTEVT2); | | 545 | evtcode = _reg_read_4(SH7709_INTEVT2); |
| @@ -556,27 +556,27 @@ intc_intr(int ssr, int spc, int ssp) | | | @@ -556,27 +556,27 @@ intc_intr(int ssr, int spc, int ssp) |
556 | panic("intr_intc: cpu_product %d unhandled!", cpu_product); | | 556 | panic("intr_intc: cpu_product %d unhandled!", cpu_product); |
557 | #endif | | 557 | #endif |
558 | return; | | 558 | return; |
559 | } | | 559 | } |
560 | | | 560 | |
561 | ih = EVTCODE_IH(evtcode); | | 561 | ih = EVTCODE_IH(evtcode); |
562 | KDASSERT(ih->ih_func); | | 562 | KDASSERT(ih->ih_func); |
563 | /* | | 563 | /* |
564 | * On entry, all interrrupts are disabled, | | 564 | * On entry, all interrrupts are disabled, |
565 | * and exception is enabled for P3 access. (kernel stack is P3, | | 565 | * and exception is enabled for P3 access. (kernel stack is P3, |
566 | * SH3 may or may not cause TLB miss when access stack.) | | 566 | * SH3 may or may not cause TLB miss when access stack.) |
567 | * Enable higher level interrupt here. | | 567 | * Enable higher level interrupt here. |
568 | */ | | 568 | */ |
569 | s = _cpu_intr_resume(ih->ih_level); | | 569 | _cpu_intr_resume(ih->ih_level); |
570 | | | 570 | |
571 | switch (evtcode) { | | 571 | switch (evtcode) { |
572 | default: | | 572 | default: |
573 | (*ih->ih_func)(ih->ih_arg); | | 573 | (*ih->ih_func)(ih->ih_arg); |
574 | break; | | 574 | break; |
575 | case SH_INTEVT_TMU0_TUNI0: | | 575 | case SH_INTEVT_TMU0_TUNI0: |
576 | cf.spc = spc; | | 576 | cf.spc = spc; |
577 | cf.ssr = ssr; | | 577 | cf.ssr = ssr; |
578 | cf.ssp = ssp; | | 578 | cf.ssp = ssp; |
579 | (*ih->ih_func)(&cf); | | 579 | (*ih->ih_func)(&cf); |
580 | break; | | 580 | break; |
581 | case SH_INTEVT_NMI: | | 581 | case SH_INTEVT_NMI: |
582 | printf("NMI ignored.\n"); | | 582 | printf("NMI ignored.\n"); |