Thu Jul 24 14:09:09 2014 UTC ()
Add consistent prefix to a softc member name.


(tsutsui)
diff -r1.33 -r1.34 src/sys/arch/luna68k/dev/lunafb.c

cvs diff -r1.33 -r1.34 src/sys/arch/luna68k/dev/lunafb.c (switch to unified diff)

--- src/sys/arch/luna68k/dev/lunafb.c 2014/07/18 18:17:54 1.33
+++ src/sys/arch/luna68k/dev/lunafb.c 2014/07/24 14:09:09 1.34
@@ -1,528 +1,528 @@ @@ -1,528 +1,528 @@
1/* $NetBSD: lunafb.c,v 1.33 2014/07/18 18:17:54 tsutsui Exp $ */ 1/* $NetBSD: lunafb.c,v 1.34 2014/07/24 14:09:09 tsutsui Exp $ */
2 2
3/*- 3/*-
4 * Copyright (c) 2000 The NetBSD Foundation, Inc. 4 * Copyright (c) 2000 The NetBSD Foundation, Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * This code is derived from software contributed to The NetBSD Foundation 7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Tohru Nishimura. 8 * by Tohru Nishimura.
9 * 9 *
10 * Redistribution and use in source and binary forms, with or without 10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions 11 * modification, are permitted provided that the following conditions
12 * are met: 12 * are met:
13 * 1. Redistributions of source code must retain the above copyright 13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer. 14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright 15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the 16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution. 17 * documentation and/or other materials provided with the distribution.
18 * 18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE. 29 * POSSIBILITY OF SUCH DAMAGE.
30 */ 30 */
31 31
32#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 32#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
33 33
34__KERNEL_RCSID(0, "$NetBSD: lunafb.c,v 1.33 2014/07/18 18:17:54 tsutsui Exp $"); 34__KERNEL_RCSID(0, "$NetBSD: lunafb.c,v 1.34 2014/07/24 14:09:09 tsutsui Exp $");
35 35
36#include <sys/param.h> 36#include <sys/param.h>
37#include <sys/systm.h> 37#include <sys/systm.h>
38#include <sys/conf.h> 38#include <sys/conf.h>
39#include <sys/device.h> 39#include <sys/device.h>
40#include <sys/ioctl.h> 40#include <sys/ioctl.h>
41#include <sys/kmem.h> 41#include <sys/kmem.h>
42#include <sys/mman.h> 42#include <sys/mman.h>
43#include <sys/proc.h> 43#include <sys/proc.h>
44#include <sys/tty.h> 44#include <sys/tty.h>
45#include <sys/errno.h> 45#include <sys/errno.h>
46#include <sys/buf.h> 46#include <sys/buf.h>
47 47
48#include <uvm/uvm_extern.h> 48#include <uvm/uvm_extern.h>
49 49
50#include <dev/wscons/wsconsio.h> 50#include <dev/wscons/wsconsio.h>
51#include <dev/wscons/wsdisplayvar.h> 51#include <dev/wscons/wsdisplayvar.h>
52#include <dev/rasops/rasops.h> 52#include <dev/rasops/rasops.h>
53 53
54#include <machine/cpu.h> 54#include <machine/cpu.h>
55#include <machine/autoconf.h> 55#include <machine/autoconf.h>
56 56
57#include <arch/luna68k/dev/omrasopsvar.h> 57#include <arch/luna68k/dev/omrasopsvar.h>
58 58
59#include "ioconf.h" 59#include "ioconf.h"
60 60
61struct bt454 { 61struct bt454 {
62 volatile uint8_t bt_addr; /* map address register */ 62 volatile uint8_t bt_addr; /* map address register */
63 volatile uint8_t bt_cmap; /* colormap data register */ 63 volatile uint8_t bt_cmap; /* colormap data register */
64}; 64};
65 65
66struct bt458 { 66struct bt458 {
67 volatile uint8_t bt_addr; /* map address register */ 67 volatile uint8_t bt_addr; /* map address register */
68 uint8_t pad0[3]; 68 uint8_t pad0[3];
69 volatile uint8_t bt_cmap; /* colormap data register */ 69 volatile uint8_t bt_cmap; /* colormap data register */
70 uint8_t pad1[3]; 70 uint8_t pad1[3];
71 volatile uint8_t bt_ctrl; /* control register */ 71 volatile uint8_t bt_ctrl; /* control register */
72 uint8_t pad2[3]; 72 uint8_t pad2[3];
73 volatile uint8_t bt_omap; /* overlay (cursor) map register */ 73 volatile uint8_t bt_omap; /* overlay (cursor) map register */
74 uint8_t pad3[3]; 74 uint8_t pad3[3];
75}; 75};
76 76
77#define OMFB_RFCNT 0xB1000000 /* video h-origin/v-origin */ 77#define OMFB_RFCNT 0xB1000000 /* video h-origin/v-origin */
78#define OMFB_PLANEMASK 0xB1040000 /* planemask register */ 78#define OMFB_PLANEMASK 0xB1040000 /* planemask register */
79#define OMFB_FB_WADDR 0xB1080008 /* common plane */ 79#define OMFB_FB_WADDR 0xB1080008 /* common plane */
80#define OMFB_FB_RADDR 0xB10C0008 /* plane #0 */ 80#define OMFB_FB_RADDR 0xB10C0008 /* plane #0 */
81#define OMFB_ROPFUNC 0xB12C0000 /* ROP function code */ 81#define OMFB_ROPFUNC 0xB12C0000 /* ROP function code */
82#define OMFB_RAMDAC 0xC1100000 /* Bt454/Bt458 RAMDAC */ 82#define OMFB_RAMDAC 0xC1100000 /* Bt454/Bt458 RAMDAC */
83#define OMFB_SIZE (0xB1300000 - 0xB1080000 + PAGE_SIZE) 83#define OMFB_SIZE (0xB1300000 - 0xB1080000 + PAGE_SIZE)
84 84
85struct hwcmap { 85struct hwcmap {
86#define CMAP_SIZE 256 86#define CMAP_SIZE 256
87 uint8_t r[CMAP_SIZE]; 87 uint8_t r[CMAP_SIZE];
88 uint8_t g[CMAP_SIZE]; 88 uint8_t g[CMAP_SIZE];
89 uint8_t b[CMAP_SIZE]; 89 uint8_t b[CMAP_SIZE];
90}; 90};
91 91
92static const struct { 92static const struct {
93 uint8_t r; 93 uint8_t r;
94 uint8_t g; 94 uint8_t g;
95 uint8_t b; 95 uint8_t b;
96} ansicmap[16] = { 96} ansicmap[16] = {
97 { 0, 0, 0}, 97 { 0, 0, 0},
98 { 0x80, 0, 0}, 98 { 0x80, 0, 0},
99 { 0, 0x80, 0}, 99 { 0, 0x80, 0},
100 { 0x80, 0x80, 0}, 100 { 0x80, 0x80, 0},
101 { 0, 0, 0x80}, 101 { 0, 0, 0x80},
102 { 0x80, 0, 0x80}, 102 { 0x80, 0, 0x80},
103 { 0, 0x80, 0x80}, 103 { 0, 0x80, 0x80},
104 { 0xc0, 0xc0, 0xc0}, 104 { 0xc0, 0xc0, 0xc0},
105 { 0x80, 0x80, 0x80}, 105 { 0x80, 0x80, 0x80},
106 { 0xff, 0, 0}, 106 { 0xff, 0, 0},
107 { 0, 0xff, 0}, 107 { 0, 0xff, 0},
108 { 0xff, 0xff, 0}, 108 { 0xff, 0xff, 0},
109 { 0, 0, 0xff}, 109 { 0, 0, 0xff},
110 { 0xff, 0, 0xff}, 110 { 0xff, 0, 0xff},
111 { 0, 0xff, 0xff}, 111 { 0, 0xff, 0xff},
112 { 0xff, 0xff, 0xff}, 112 { 0xff, 0xff, 0xff},
113}; 113};
114 114
115struct om_hwdevconfig { 115struct om_hwdevconfig {
116 int dc_wid; /* width of frame buffer */ 116 int dc_wid; /* width of frame buffer */
117 int dc_ht; /* height of frame buffer */ 117 int dc_ht; /* height of frame buffer */
118 int dc_depth; /* depth, bits per pixel */ 118 int dc_depth; /* depth, bits per pixel */
119 int dc_rowbytes; /* bytes in a FB scan line */ 119 int dc_rowbytes; /* bytes in a FB scan line */
120 int dc_cmsize; /* colormap size */ 120 int dc_cmsize; /* colormap size */
121 struct hwcmap dc_cmap; /* software copy of colormap */ 121 struct hwcmap dc_cmap; /* software copy of colormap */
122 vaddr_t dc_videobase; /* base of flat frame buffer */ 122 vaddr_t dc_videobase; /* base of flat frame buffer */
123 struct rasops_info dc_ri; /* raster blitter variables */ 123 struct rasops_info dc_ri; /* raster blitter variables */
124}; 124};
125 125
126struct omfb_softc { 126struct omfb_softc {
127 device_t sc_dev; /* base device */ 127 device_t sc_dev; /* base device */
128 struct om_hwdevconfig *sc_dc; /* device configuration */ 128 struct om_hwdevconfig *sc_dc; /* device configuration */
129 int nscreens; 129 int sc_nscreens;
130}; 130};
131 131
132static int omgetcmap(struct omfb_softc *, struct wsdisplay_cmap *); 132static int omgetcmap(struct omfb_softc *, struct wsdisplay_cmap *);
133static int omsetcmap(struct omfb_softc *, struct wsdisplay_cmap *); 133static int omsetcmap(struct omfb_softc *, struct wsdisplay_cmap *);
134 134
135static struct om_hwdevconfig omfb_console_dc; 135static struct om_hwdevconfig omfb_console_dc;
136static void omfb_getdevconfig(paddr_t, struct om_hwdevconfig *); 136static void omfb_getdevconfig(paddr_t, struct om_hwdevconfig *);
137 137
138static struct wsscreen_descr omfb_stdscreen = { 138static struct wsscreen_descr omfb_stdscreen = {
139 .name = "std" 139 .name = "std"
140}; 140};
141 141
142static const struct wsscreen_descr *_omfb_scrlist[] = { 142static const struct wsscreen_descr *_omfb_scrlist[] = {
143 &omfb_stdscreen, 143 &omfb_stdscreen,
144}; 144};
145 145
146static const struct wsscreen_list omfb_screenlist = { 146static const struct wsscreen_list omfb_screenlist = {
147 sizeof(_omfb_scrlist) / sizeof(struct wsscreen_descr *), _omfb_scrlist 147 sizeof(_omfb_scrlist) / sizeof(struct wsscreen_descr *), _omfb_scrlist
148}; 148};
149 149
150static int omfbioctl(void *, void *, u_long, void *, int, struct lwp *); 150static int omfbioctl(void *, void *, u_long, void *, int, struct lwp *);
151static paddr_t omfbmmap(void *, void *, off_t, int); 151static paddr_t omfbmmap(void *, void *, off_t, int);
152static int omfb_alloc_screen(void *, const struct wsscreen_descr *, 152static int omfb_alloc_screen(void *, const struct wsscreen_descr *,
153 void **, int *, int *, long *); 153 void **, int *, int *, long *);
154static void omfb_free_screen(void *, void *); 154static void omfb_free_screen(void *, void *);
155static int omfb_show_screen(void *, void *, int, 155static int omfb_show_screen(void *, void *, int,
156 void (*) (void *, int, int), void *); 156 void (*) (void *, int, int), void *);
157 157
158static const struct wsdisplay_accessops omfb_accessops = { 158static const struct wsdisplay_accessops omfb_accessops = {
159 .ioctl = omfbioctl, 159 .ioctl = omfbioctl,
160 .mmap = omfbmmap, 160 .mmap = omfbmmap,
161 .alloc_screen = omfb_alloc_screen, 161 .alloc_screen = omfb_alloc_screen,
162 .free_screen = omfb_free_screen, 162 .free_screen = omfb_free_screen,
163 .show_screen = omfb_show_screen, 163 .show_screen = omfb_show_screen,
164 .load_font = NULL, 164 .load_font = NULL,
165 .pollc = NULL, 165 .pollc = NULL,
166 .scroll = NULL 166 .scroll = NULL
167}; 167};
168 168
169static int omfbmatch(device_t, cfdata_t, void *); 169static int omfbmatch(device_t, cfdata_t, void *);
170static void omfbattach(device_t, device_t, void *); 170static void omfbattach(device_t, device_t, void *);
171 171
172CFATTACH_DECL_NEW(fb, sizeof(struct omfb_softc), 172CFATTACH_DECL_NEW(fb, sizeof(struct omfb_softc),
173 omfbmatch, omfbattach, NULL, NULL); 173 omfbmatch, omfbattach, NULL, NULL);
174 174
175extern int hwplanemask; /* hardware planemask; retrieved at boot */ 175extern int hwplanemask; /* hardware planemask; retrieved at boot */
176 176
177static int omfb_console; 177static int omfb_console;
178int omfb_cnattach(void); 178int omfb_cnattach(void);
179 179
180static int 180static int
181omfbmatch(device_t parent, cfdata_t cf, void *aux) 181omfbmatch(device_t parent, cfdata_t cf, void *aux)
182{ 182{
183 struct mainbus_attach_args *ma = aux; 183 struct mainbus_attach_args *ma = aux;
184 184
185 if (strcmp(ma->ma_name, fb_cd.cd_name)) 185 if (strcmp(ma->ma_name, fb_cd.cd_name))
186 return 0; 186 return 0;
187#if 0 /* XXX badaddr() bombs if no framebuffer is installed */ 187#if 0 /* XXX badaddr() bombs if no framebuffer is installed */
188 if (badaddr((void *)ma->ma_addr, 4)) 188 if (badaddr((void *)ma->ma_addr, 4))
189 return 0; 189 return 0;
190#else 190#else
191 if (hwplanemask == 0) 191 if (hwplanemask == 0)
192 return 0; 192 return 0;
193#endif 193#endif
194 return 1; 194 return 1;
195} 195}
196 196
197static void 197static void
198omfbattach(device_t parent, device_t self, void *args) 198omfbattach(device_t parent, device_t self, void *args)
199{ 199{
200 struct omfb_softc *sc = device_private(self); 200 struct omfb_softc *sc = device_private(self);
201 struct wsemuldisplaydev_attach_args waa; 201 struct wsemuldisplaydev_attach_args waa;
202 202
203 sc->sc_dev = self; 203 sc->sc_dev = self;
204 204
205 if (omfb_console) { 205 if (omfb_console) {
206 sc->sc_dc = &omfb_console_dc; 206 sc->sc_dc = &omfb_console_dc;
207 sc->nscreens = 1; 207 sc->sc_nscreens = 1;
208 } else { 208 } else {
209 sc->sc_dc = kmem_zalloc(sizeof(struct om_hwdevconfig), 209 sc->sc_dc = kmem_zalloc(sizeof(struct om_hwdevconfig),
210 KM_SLEEP); 210 KM_SLEEP);
211 omfb_getdevconfig(OMFB_FB_WADDR, sc->sc_dc); 211 omfb_getdevconfig(OMFB_FB_WADDR, sc->sc_dc);
212 } 212 }
213 aprint_normal(": %d x %d, %dbpp\n", sc->sc_dc->dc_wid, sc->sc_dc->dc_ht, 213 aprint_normal(": %d x %d, %dbpp\n", sc->sc_dc->dc_wid, sc->sc_dc->dc_ht,
214 sc->sc_dc->dc_depth); 214 sc->sc_dc->dc_depth);
215 215
216 waa.console = omfb_console; 216 waa.console = omfb_console;
217 waa.scrdata = &omfb_screenlist; 217 waa.scrdata = &omfb_screenlist;
218 waa.accessops = &omfb_accessops; 218 waa.accessops = &omfb_accessops;
219 waa.accesscookie = sc; 219 waa.accesscookie = sc;
220 220
221 config_found(self, &waa, wsemuldisplaydevprint); 221 config_found(self, &waa, wsemuldisplaydevprint);
222} 222}
223 223
224/* EXPORT */ int 224/* EXPORT */ int
225omfb_cnattach(void) 225omfb_cnattach(void)
226{ 226{
227 struct om_hwdevconfig *dc = &omfb_console_dc; 227 struct om_hwdevconfig *dc = &omfb_console_dc;
228 struct rasops_info *ri = &dc->dc_ri; 228 struct rasops_info *ri = &dc->dc_ri;
229 long defattr; 229 long defattr;
230 230
231 omfb_getdevconfig(OMFB_FB_WADDR, dc); 231 omfb_getdevconfig(OMFB_FB_WADDR, dc);
232 (*ri->ri_ops.allocattr)(ri, 0, 0, 0, &defattr); 232 (*ri->ri_ops.allocattr)(ri, 0, 0, 0, &defattr);
233 wsdisplay_cnattach(&omfb_stdscreen, ri, 0, 0, defattr); 233 wsdisplay_cnattach(&omfb_stdscreen, ri, 0, 0, defattr);
234 omfb_console = 1; 234 omfb_console = 1;
235 return 0; 235 return 0;
236} 236}
237 237
238static int 238static int
239omfbioctl(void *v, void *vs, u_long cmd, void *data, int flag, struct lwp *l) 239omfbioctl(void *v, void *vs, u_long cmd, void *data, int flag, struct lwp *l)
240{ 240{
241 struct omfb_softc *sc = v; 241 struct omfb_softc *sc = v;
242 struct om_hwdevconfig *dc = sc->sc_dc; 242 struct om_hwdevconfig *dc = sc->sc_dc;
243 243
244 switch (cmd) { 244 switch (cmd) {
245 case WSDISPLAYIO_GTYPE: 245 case WSDISPLAYIO_GTYPE:
246 *(u_int *)data = WSDISPLAY_TYPE_LUNA; 246 *(u_int *)data = WSDISPLAY_TYPE_LUNA;
247 return 0; 247 return 0;
248 248
249 case WSDISPLAYIO_GINFO: 249 case WSDISPLAYIO_GINFO:
250#define wsd_fbip ((struct wsdisplay_fbinfo *)data) 250#define wsd_fbip ((struct wsdisplay_fbinfo *)data)
251 wsd_fbip->height = dc->dc_ht; 251 wsd_fbip->height = dc->dc_ht;
252 wsd_fbip->width = dc->dc_wid; 252 wsd_fbip->width = dc->dc_wid;
253 wsd_fbip->depth = dc->dc_depth; 253 wsd_fbip->depth = dc->dc_depth;
254 wsd_fbip->cmsize = dc->dc_cmsize; 254 wsd_fbip->cmsize = dc->dc_cmsize;
255#undef fbt 255#undef fbt
256 return 0; 256 return 0;
257 257
258 case WSDISPLAYIO_LINEBYTES: 258 case WSDISPLAYIO_LINEBYTES:
259 *(u_int *)data = dc->dc_rowbytes; 259 *(u_int *)data = dc->dc_rowbytes;
260 return 0; 260 return 0;
261 261
262 case WSDISPLAYIO_GETCMAP: 262 case WSDISPLAYIO_GETCMAP:
263 return omgetcmap(sc, (struct wsdisplay_cmap *)data); 263 return omgetcmap(sc, (struct wsdisplay_cmap *)data);
264 264
265 case WSDISPLAYIO_PUTCMAP: 265 case WSDISPLAYIO_PUTCMAP:
266 return omsetcmap(sc, (struct wsdisplay_cmap *)data); 266 return omsetcmap(sc, (struct wsdisplay_cmap *)data);
267 267
268 case WSDISPLAYIO_SVIDEO: 268 case WSDISPLAYIO_SVIDEO:
269 case WSDISPLAYIO_GVIDEO: 269 case WSDISPLAYIO_GVIDEO:
270 case WSDISPLAYIO_GCURPOS: 270 case WSDISPLAYIO_GCURPOS:
271 case WSDISPLAYIO_SCURPOS: 271 case WSDISPLAYIO_SCURPOS:
272 case WSDISPLAYIO_GCURMAX: 272 case WSDISPLAYIO_GCURMAX:
273 case WSDISPLAYIO_GCURSOR: 273 case WSDISPLAYIO_GCURSOR:
274 case WSDISPLAYIO_SCURSOR: 274 case WSDISPLAYIO_SCURSOR:
275 break; 275 break;
276 } 276 }
277 return EPASSTHROUGH; 277 return EPASSTHROUGH;
278} 278}
279 279
280/* 280/*
281 * Return the address that would map the given device at the given 281 * Return the address that would map the given device at the given
282 * offset, allowing for the given protection, or return -1 for error. 282 * offset, allowing for the given protection, or return -1 for error.
283 */ 283 */
284static paddr_t 284static paddr_t
285omfbmmap(void *v, void *vs, off_t offset, int prot) 285omfbmmap(void *v, void *vs, off_t offset, int prot)
286{ 286{
287 struct omfb_softc *sc = v; 287 struct omfb_softc *sc = v;
288 struct om_hwdevconfig *dc = sc->sc_dc; 288 struct om_hwdevconfig *dc = sc->sc_dc;
289 paddr_t cookie = -1; 289 paddr_t cookie = -1;
290 290
291#if 0 /* XXX: quick workaround to make X.Org mono server work */ 291#if 0 /* XXX: quick workaround to make X.Org mono server work */
292 if (offset >= 0 && offset < OMFB_SIZE) 292 if (offset >= 0 && offset < OMFB_SIZE)
293 cookie = m68k_btop(m68k_trunc_page(dc->dc_videobase) + offset); 293 cookie = m68k_btop(m68k_trunc_page(dc->dc_videobase) + offset);
294#else 294#else
295 if (offset >= 0 && offset < dc->dc_rowbytes * dc->dc_ht * dc->dc_depth) 295 if (offset >= 0 && offset < dc->dc_rowbytes * dc->dc_ht * dc->dc_depth)
296 cookie = m68k_btop(m68k_trunc_page(OMFB_FB_RADDR) + offset); 296 cookie = m68k_btop(m68k_trunc_page(OMFB_FB_RADDR) + offset);
297#endif 297#endif
298 298
299 return cookie; 299 return cookie;
300} 300}
301 301
302static int 302static int
303omgetcmap(struct omfb_softc *sc, struct wsdisplay_cmap *p) 303omgetcmap(struct omfb_softc *sc, struct wsdisplay_cmap *p)
304{ 304{
305 u_int index = p->index, count = p->count; 305 u_int index = p->index, count = p->count;
306 int cmsize, error; 306 int cmsize, error;
307 307
308 cmsize = sc->sc_dc->dc_cmsize; 308 cmsize = sc->sc_dc->dc_cmsize;
309 if (index >= cmsize || count > cmsize - index) 309 if (index >= cmsize || count > cmsize - index)
310 return EINVAL; 310 return EINVAL;
311 311
312 error = copyout(&sc->sc_dc->dc_cmap.r[index], p->red, count); 312 error = copyout(&sc->sc_dc->dc_cmap.r[index], p->red, count);
313 if (error) 313 if (error)
314 return error; 314 return error;
315 error = copyout(&sc->sc_dc->dc_cmap.g[index], p->green, count); 315 error = copyout(&sc->sc_dc->dc_cmap.g[index], p->green, count);
316 if (error) 316 if (error)
317 return error; 317 return error;
318 error = copyout(&sc->sc_dc->dc_cmap.b[index], p->blue, count); 318 error = copyout(&sc->sc_dc->dc_cmap.b[index], p->blue, count);
319 return error; 319 return error;
320} 320}
321 321
322static int 322static int
323omsetcmap(struct omfb_softc *sc, struct wsdisplay_cmap *p) 323omsetcmap(struct omfb_softc *sc, struct wsdisplay_cmap *p)
324{ 324{
325 struct hwcmap cmap; 325 struct hwcmap cmap;
326 u_int index = p->index, count = p->count; 326 u_int index = p->index, count = p->count;
327 int cmsize, i, error; 327 int cmsize, i, error;
328 328
329 cmsize = sc->sc_dc->dc_cmsize; 329 cmsize = sc->sc_dc->dc_cmsize;
330 if (index >= cmsize || (index + count) > cmsize) 330 if (index >= cmsize || (index + count) > cmsize)
331 return (EINVAL); 331 return (EINVAL);
332 332
333 error = copyin(p->red, &cmap.r[index], count); 333 error = copyin(p->red, &cmap.r[index], count);
334 if (error) 334 if (error)
335 return error; 335 return error;
336 error = copyin(p->green, &cmap.g[index], count); 336 error = copyin(p->green, &cmap.g[index], count);
337 if (error) 337 if (error)
338 return error; 338 return error;
339 error = copyin(p->blue, &cmap.b[index], count); 339 error = copyin(p->blue, &cmap.b[index], count);
340 if (error) 340 if (error)
341 return error; 341 return error;
342 342
343 memcpy(&sc->sc_dc->dc_cmap.r[index], &cmap.r[index], count); 343 memcpy(&sc->sc_dc->dc_cmap.r[index], &cmap.r[index], count);
344 memcpy(&sc->sc_dc->dc_cmap.g[index], &cmap.g[index], count); 344 memcpy(&sc->sc_dc->dc_cmap.g[index], &cmap.g[index], count);
345 memcpy(&sc->sc_dc->dc_cmap.b[index], &cmap.b[index], count); 345 memcpy(&sc->sc_dc->dc_cmap.b[index], &cmap.b[index], count);
346 if (hwplanemask == 0x0f) { 346 if (hwplanemask == 0x0f) {
347 struct bt454 *odac = (struct bt454 *)OMFB_RAMDAC; 347 struct bt454 *odac = (struct bt454 *)OMFB_RAMDAC;
348 odac->bt_addr = index; 348 odac->bt_addr = index;
349 for (i = index; i < index + count; i++) { 349 for (i = index; i < index + count; i++) {
350 odac->bt_cmap = sc->sc_dc->dc_cmap.r[i]; 350 odac->bt_cmap = sc->sc_dc->dc_cmap.r[i];
351 odac->bt_cmap = sc->sc_dc->dc_cmap.g[i]; 351 odac->bt_cmap = sc->sc_dc->dc_cmap.g[i];
352 odac->bt_cmap = sc->sc_dc->dc_cmap.b[i]; 352 odac->bt_cmap = sc->sc_dc->dc_cmap.b[i];
353 } 353 }
354 } else if (hwplanemask == 0xff) { 354 } else if (hwplanemask == 0xff) {
355 struct bt458 *ndac = (struct bt458 *)OMFB_RAMDAC; 355 struct bt458 *ndac = (struct bt458 *)OMFB_RAMDAC;
356 ndac->bt_addr = index; 356 ndac->bt_addr = index;
357 for (i = index; i < index + count; i++) { 357 for (i = index; i < index + count; i++) {
358 ndac->bt_cmap = sc->sc_dc->dc_cmap.r[i]; 358 ndac->bt_cmap = sc->sc_dc->dc_cmap.r[i];
359 ndac->bt_cmap = sc->sc_dc->dc_cmap.g[i]; 359 ndac->bt_cmap = sc->sc_dc->dc_cmap.g[i];
360 ndac->bt_cmap = sc->sc_dc->dc_cmap.b[i]; 360 ndac->bt_cmap = sc->sc_dc->dc_cmap.b[i];
361 } 361 }
362 } 362 }
363 return 0; 363 return 0;
364} 364}
365 365
366static void 366static void
367omfb_getdevconfig(paddr_t paddr, struct om_hwdevconfig *dc) 367omfb_getdevconfig(paddr_t paddr, struct om_hwdevconfig *dc)
368{ 368{
369 int bpp, i; 369 int bpp, i;
370 struct rasops_info *ri; 370 struct rasops_info *ri;
371 union { 371 union {
372 struct { short h, v; } p; 372 struct { short h, v; } p;
373 uint32_t u; 373 uint32_t u;
374 } rfcnt; 374 } rfcnt;
375 375
376 switch (hwplanemask) { 376 switch (hwplanemask) {
377 case 0xff: 377 case 0xff:
378 bpp = 8; /* XXX check monochrome bit in DIPSW */ 378 bpp = 8; /* XXX check monochrome bit in DIPSW */
379 break; 379 break;
380 default: 380 default:
381 case 0x0f: 381 case 0x0f:
382 bpp = 4; /* XXX check monochrome bit in DIPSW */ 382 bpp = 4; /* XXX check monochrome bit in DIPSW */
383 break; 383 break;
384 case 1: 384 case 1:
385 bpp = 1; 385 bpp = 1;
386 break; 386 break;
387 } 387 }
388 dc->dc_wid = 1280; 388 dc->dc_wid = 1280;
389 dc->dc_ht = 1024; 389 dc->dc_ht = 1024;
390 dc->dc_depth = bpp; 390 dc->dc_depth = bpp;
391 dc->dc_rowbytes = 2048 / 8; 391 dc->dc_rowbytes = 2048 / 8;
392 dc->dc_cmsize = (bpp == 1) ? 0 : 1 << bpp; 392 dc->dc_cmsize = (bpp == 1) ? 0 : 1 << bpp;
393 dc->dc_videobase = paddr; 393 dc->dc_videobase = paddr;
394 394
395 /* WHITE on BLACK */ 395 /* WHITE on BLACK */
396 if (hwplanemask == 0x01) { 396 if (hwplanemask == 0x01) {
397 struct bt454 *odac = (struct bt454 *)OMFB_RAMDAC; 397 struct bt454 *odac = (struct bt454 *)OMFB_RAMDAC;
398 398
399 /* 399 /*
400 * On 1bpp framebuffer, only plane P0 has framebuffer memory 400 * On 1bpp framebuffer, only plane P0 has framebuffer memory
401 * and other planes seems pulled up, i.e. always 1. 401 * and other planes seems pulled up, i.e. always 1.
402 * Set white only for a palette (P0,P1,P2,P3) = (1,1,1,1). 402 * Set white only for a palette (P0,P1,P2,P3) = (1,1,1,1).
403 */ 403 */
404 odac->bt_addr = 0; 404 odac->bt_addr = 0;
405 for (i = 0; i < 15; i++) { 405 for (i = 0; i < 15; i++) {
406 odac->bt_cmap = dc->dc_cmap.r[i] = 0; 406 odac->bt_cmap = dc->dc_cmap.r[i] = 0;
407 odac->bt_cmap = dc->dc_cmap.g[i] = 0; 407 odac->bt_cmap = dc->dc_cmap.g[i] = 0;
408 odac->bt_cmap = dc->dc_cmap.b[i] = 0; 408 odac->bt_cmap = dc->dc_cmap.b[i] = 0;
409 } 409 }
410 /* 410 /*
411 * The B/W video connector is connected to IOG of Bt454, 411 * The B/W video connector is connected to IOG of Bt454,
412 * and IOR and IOB are unused. 412 * and IOR and IOB are unused.
413 */ 413 */
414 odac->bt_cmap = dc->dc_cmap.r[15] = 0; 414 odac->bt_cmap = dc->dc_cmap.r[15] = 0;
415 odac->bt_cmap = dc->dc_cmap.g[15] = 255; 415 odac->bt_cmap = dc->dc_cmap.g[15] = 255;
416 odac->bt_cmap = dc->dc_cmap.b[15] = 0; 416 odac->bt_cmap = dc->dc_cmap.b[15] = 0;
417 } else if (hwplanemask == 0x0f) { 417 } else if (hwplanemask == 0x0f) {
418 struct bt454 *odac = (struct bt454 *)OMFB_RAMDAC; 418 struct bt454 *odac = (struct bt454 *)OMFB_RAMDAC;
419 419
420 odac->bt_addr = 0; 420 odac->bt_addr = 0;
421 for (i = 0; i < 16; i++) { 421 for (i = 0; i < 16; i++) {
422 odac->bt_cmap = dc->dc_cmap.r[i] = ansicmap[i].r; 422 odac->bt_cmap = dc->dc_cmap.r[i] = ansicmap[i].r;
423 odac->bt_cmap = dc->dc_cmap.g[i] = ansicmap[i].g; 423 odac->bt_cmap = dc->dc_cmap.g[i] = ansicmap[i].g;
424 odac->bt_cmap = dc->dc_cmap.b[i] = ansicmap[i].b; 424 odac->bt_cmap = dc->dc_cmap.b[i] = ansicmap[i].b;
425 } 425 }
426 } else if (hwplanemask == 0xff) { 426 } else if (hwplanemask == 0xff) {
427 struct bt458 *ndac = (struct bt458 *)OMFB_RAMDAC; 427 struct bt458 *ndac = (struct bt458 *)OMFB_RAMDAC;
428 428
429 /* 429 /*
430 * Initialize the Bt458. When we write to control registers, 430 * Initialize the Bt458. When we write to control registers,
431 * the address is not incremented automatically. So we specify 431 * the address is not incremented automatically. So we specify
432 * it ourselves for each control register. 432 * it ourselves for each control register.
433 */ 433 */
434 ndac->bt_addr = 0x04; 434 ndac->bt_addr = 0x04;
435 ndac->bt_ctrl = 0xff; /* all planes will be read */ 435 ndac->bt_ctrl = 0xff; /* all planes will be read */
436 ndac->bt_addr = 0x05; 436 ndac->bt_addr = 0x05;
437 ndac->bt_ctrl = 0x00; /* all planes have non-blink */ 437 ndac->bt_ctrl = 0x00; /* all planes have non-blink */
438 ndac->bt_addr = 0x06; 438 ndac->bt_addr = 0x06;
439 ndac->bt_ctrl = 0x40; /* pallete enabled, ovly plane disabled */ 439 ndac->bt_ctrl = 0x40; /* pallete enabled, ovly plane disabled */
440 ndac->bt_addr = 0x07; 440 ndac->bt_addr = 0x07;
441 ndac->bt_ctrl = 0x00; /* no test mode */ 441 ndac->bt_ctrl = 0x00; /* no test mode */
442 442
443 /* 443 /*
444 * Set ANSI 16 colors. We only supports 4bpp console right 444 * Set ANSI 16 colors. We only supports 4bpp console right
445 * now, repeat 16 colors in 256 colormap. 445 * now, repeat 16 colors in 256 colormap.
446 */ 446 */
447 ndac->bt_addr = 0; 447 ndac->bt_addr = 0;
448 for (i = 0; i < 256; i++) { 448 for (i = 0; i < 256; i++) {
449 ndac->bt_cmap = dc->dc_cmap.r[i] = ansicmap[i % 16].r; 449 ndac->bt_cmap = dc->dc_cmap.r[i] = ansicmap[i % 16].r;
450 ndac->bt_cmap = dc->dc_cmap.g[i] = ansicmap[i % 16].g; 450 ndac->bt_cmap = dc->dc_cmap.g[i] = ansicmap[i % 16].g;
451 ndac->bt_cmap = dc->dc_cmap.b[i] = ansicmap[i % 16].b; 451 ndac->bt_cmap = dc->dc_cmap.b[i] = ansicmap[i % 16].b;
452 } 452 }
453 } 453 }
454 454
455 /* adjust h/v origin on screen */ 455 /* adjust h/v origin on screen */
456 rfcnt.p.h = 7; 456 rfcnt.p.h = 7;
457 rfcnt.p.v = -27; 457 rfcnt.p.v = -27;
458 /* single write of 0x007ffe6 */ 458 /* single write of 0x007ffe6 */
459 *(volatile uint32_t *)OMFB_RFCNT = rfcnt.u; 459 *(volatile uint32_t *)OMFB_RFCNT = rfcnt.u;
460 460
461 /* clear the screen */ 461 /* clear the screen */
462 *(volatile uint32_t *)OMFB_PLANEMASK = 0xff; 462 *(volatile uint32_t *)OMFB_PLANEMASK = 0xff;
463 ((volatile uint32_t *)OMFB_ROPFUNC)[5] = ~0; /* ROP copy */ 463 ((volatile uint32_t *)OMFB_ROPFUNC)[5] = ~0; /* ROP copy */
464 for (i = 0; i < dc->dc_ht * dc->dc_rowbytes / sizeof(uint32_t); i++) 464 for (i = 0; i < dc->dc_ht * dc->dc_rowbytes / sizeof(uint32_t); i++)
465 *((volatile uint32_t *)dc->dc_videobase + i) = 0; 465 *((volatile uint32_t *)dc->dc_videobase + i) = 0;
466 *(volatile uint32_t *)OMFB_PLANEMASK = 0x01; 466 *(volatile uint32_t *)OMFB_PLANEMASK = 0x01;
467 467
468 /* initialize the raster */ 468 /* initialize the raster */
469 ri = &dc->dc_ri; 469 ri = &dc->dc_ri;
470 ri->ri_width = dc->dc_wid; 470 ri->ri_width = dc->dc_wid;
471 ri->ri_height = dc->dc_ht; 471 ri->ri_height = dc->dc_ht;
472 ri->ri_depth = 1; /* since planes are independently addressed */ 472 ri->ri_depth = 1; /* since planes are independently addressed */
473 ri->ri_stride = dc->dc_rowbytes; 473 ri->ri_stride = dc->dc_rowbytes;
474 ri->ri_bits = (void *)dc->dc_videobase; 474 ri->ri_bits = (void *)dc->dc_videobase;
475 ri->ri_flg = RI_CENTER; 475 ri->ri_flg = RI_CENTER;
476 if (dc == &omfb_console_dc) 476 if (dc == &omfb_console_dc)
477 ri->ri_flg |= RI_NO_AUTO; 477 ri->ri_flg |= RI_NO_AUTO;
478 ri->ri_hw = dc; 478 ri->ri_hw = dc;
479 479
480 if (bpp == 4 || bpp == 8) 480 if (bpp == 4 || bpp == 8)
481 omrasops4_init(ri, 34, 80); 481 omrasops4_init(ri, 34, 80);
482 else 482 else
483 omrasops1_init(ri, 34, 80); 483 omrasops1_init(ri, 34, 80);
484 484
485 omfb_stdscreen.nrows = ri->ri_rows; 485 omfb_stdscreen.nrows = ri->ri_rows;
486 omfb_stdscreen.ncols = ri->ri_cols; 486 omfb_stdscreen.ncols = ri->ri_cols;
487 omfb_stdscreen.textops = &ri->ri_ops; 487 omfb_stdscreen.textops = &ri->ri_ops;
488 omfb_stdscreen.capabilities = ri->ri_caps; 488 omfb_stdscreen.capabilities = ri->ri_caps;
489 omfb_stdscreen.fontwidth = ri->ri_font->fontwidth; 489 omfb_stdscreen.fontwidth = ri->ri_font->fontwidth;
490 omfb_stdscreen.fontheight = ri->ri_font->fontheight; 490 omfb_stdscreen.fontheight = ri->ri_font->fontheight;
491} 491}
492 492
493static int 493static int
494omfb_alloc_screen(void *v, const struct wsscreen_descr *type, void **cookiep, 494omfb_alloc_screen(void *v, const struct wsscreen_descr *type, void **cookiep,
495 int *curxp, int *curyp, long *attrp) 495 int *curxp, int *curyp, long *attrp)
496{ 496{
497 struct omfb_softc *sc = v; 497 struct omfb_softc *sc = v;
498 struct rasops_info *ri = &sc->sc_dc->dc_ri; 498 struct rasops_info *ri = &sc->sc_dc->dc_ri;
499 499
500 if (sc->nscreens > 0) 500 if (sc->sc_nscreens > 0)
501 return ENOMEM; 501 return ENOMEM;
502 502
503 *cookiep = ri; 503 *cookiep = ri;
504 *curxp = 0; 504 *curxp = 0;
505 *curyp = 0; 505 *curyp = 0;
506 (*ri->ri_ops.allocattr)(ri, 0, 0, 0, attrp); 506 (*ri->ri_ops.allocattr)(ri, 0, 0, 0, attrp);
507 sc->nscreens++; 507 sc->sc_nscreens++;
508 return 0; 508 return 0;
509} 509}
510 510
511static void 511static void
512omfb_free_screen(void *v, void *cookie) 512omfb_free_screen(void *v, void *cookie)
513{ 513{
514 struct omfb_softc *sc = v; 514 struct omfb_softc *sc = v;
515 515
516 if (sc->sc_dc == &omfb_console_dc) 516 if (sc->sc_dc == &omfb_console_dc)
517 panic("omfb_free_screen: console"); 517 panic("omfb_free_screen: console");
518 518
519 sc->nscreens--; 519 sc->sc_nscreens--;
520} 520}
521 521
522static int 522static int
523omfb_show_screen(void *v, void *cookie, int waitok, 523omfb_show_screen(void *v, void *cookie, int waitok,
524 void (*cb)(void *, int, int), void *cbarg) 524 void (*cb)(void *, int, int), void *cbarg)
525{ 525{
526 526
527 return 0; 527 return 0;
528} 528}