 @@ -1,14 +1,14 @@
-/* $NetBSD: awin_debe.c,v 1.5 2014/11/12 23:12:27 jmcneill Exp $ */
+/* $NetBSD: awin_debe.c,v 1.6 2014/11/14 00:31:54 jmcneill Exp $ */
 /*-
  * Copyright (c) 2014 Jared D. McNeill <jmcneill@invisible.ca>
  * All rights reserved.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
 @@ -24,27 +24,27 @@
  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
  */
 #include "opt_allwinner.h"
 #include "genfb.h"
 #ifndef AWIN_DEBE_VIDEOMEM
 #define AWIN_DEBE_VIDEOMEM	(16 * 1024 * 1024)
 #endif
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: awin_debe.c,v 1.5 2014/11/12 23:12:27 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: awin_debe.c,v 1.6 2014/11/14 00:31:54 jmcneill Exp $");
 #include <sys/param.h>
 #include <sys/bus.h>
 #include <sys/device.h>
 #include <sys/intr.h>
 #include <sys/systm.h>
 #include <sys/kernel.h>
 #include <sys/mutex.h>
 #include <sys/condvar.h>
 #include <arm/allwinner/awin_reg.h>
 #include <arm/allwinner/awin_var.h>
 @@ -211,30 +211,31 @@ unmap:
 free:
 	bus_dmamem_free(sc->sc_dmat, sc->sc_dmasegs, nsegs);
 	sc->sc_dmasize = 0;
 	sc->sc_dmap = NULL;
 	return error;
+}
 static void
 awin_debe_setup_fbdev(struct awin_debe_softc *sc, const struct videomode *mode)
+{
 	if (mode && sc->sc_fbdev == NULL) {
 		const u_int interlace_p = !!(mode->flags & VID_INTERLACE);
 		struct awinfb_attach_args afb = {
 			.afb_fb = sc->sc_dmap,
 			.afb_width = mode->hdisplay,
-			.afb_height = mode->vdisplay,
+			.afb_height = (mode->vdisplay << interlace_p),
 			.afb_dmat = sc->sc_dmat,
 			.afb_dmasegs = sc->sc_dmasegs,
 			.afb_ndmasegs = 1
 		};
 		sc->sc_fbdev = config_found_ia(sc->sc_dev, "awindebe",
 		    &afb, NULL);
+	}
 #if NGENFB > 0
 	else if (sc->sc_fbdev != NULL) {
 		awin_fb_set_videomode(sc->sc_fbdev, mode);
+	}
 #endif
+}
 @@ -273,64 +274,71 @@ awin_debe_set_videomode(const struct vid
+{
 	struct awin_debe_softc *sc;
 	device_t dev;
 	uint32_t val;
 	dev = device_find_by_driver_unit("awindebe", 0);
 	if (dev == NULL) {
 		printf("DEBE: no driver found\n");
 		return;
+	}
 	sc = device_private(dev);
 	if (mode) {
-		uint32_t vmem = mode->vdisplay * mode->hdisplay * 4;
+		const u_int interlace_p = !!(mode->flags & VID_INTERLACE);
 		const u_int width = mode->hdisplay;
 		const u_int height = (mode->vdisplay << interlace_p);
 		uint32_t vmem = width * height * 4;
 		if (vmem > sc->sc_dmasize) {
 			device_printf(sc->sc_dev,
 			    "not enough memory for %ux%u fb (req %u have %u)\n",
-			    mode->hdisplay, mode->vdisplay,
+			    width, height, vmem, (unsigned int)sc->sc_dmasize);
 			    vmem, (unsigned int)sc->sc_dmasize);
 			return;
+		}
 		paddr_t pa = sc->sc_dmamap->dm_segs[0].ds_addr;
 		/*
 		 * On 2GB systems, we need to subtract AWIN_SDRAM_PBASE from
 		 * the phys addr.
 		 */
 		if (pa >= AWIN_SDRAM_PBASE)
 			pa -= AWIN_SDRAM_PBASE;
 		/* notify fb */
 		awin_debe_setup_fbdev(sc, mode);
 		DEBE_WRITE(sc, AWIN_DEBE_DISSIZE_REG,
-		    ((mode->vdisplay - 1) << 16) | (mode->hdisplay - 1));
+		    ((height - 1) << 16) | (width - 1));
 		DEBE_WRITE(sc, AWIN_DEBE_LAYSIZE_REG,
-		    ((mode->vdisplay - 1) << 16) | (mode->hdisplay - 1));
+		    ((height - 1) << 16) | (width - 1));
-		DEBE_WRITE(sc, AWIN_DEBE_LAYLINEWIDTH_REG, mode->hdisplay << 5);
+		DEBE_WRITE(sc, AWIN_DEBE_LAYLINEWIDTH_REG, (width << 5));
 		DEBE_WRITE(sc, AWIN_DEBE_LAYFB_L32ADD_REG, pa << 3);
 		DEBE_WRITE(sc, AWIN_DEBE_LAYFB_H4ADD_REG, pa >> 29);
 		val = DEBE_READ(sc, AWIN_DEBE_ATTCTL1_REG);
 		val &= ~AWIN_DEBE_ATTCTL1_LAY_FBFMT;
 		val |= __SHIFTIN(AWIN_DEBE_ATTCTL1_LAY_FBFMT_XRGB8888,
 				 AWIN_DEBE_ATTCTL1_LAY_FBFMT);
 		val &= ~AWIN_DEBE_ATTCTL1_LAY_BRSWAPEN;
 		val &= ~AWIN_DEBE_ATTCTL1_LAY_FBPS;
 		DEBE_WRITE(sc, AWIN_DEBE_ATTCTL1_REG, val);
 		val = DEBE_READ(sc, AWIN_DEBE_MODCTL_REG);
 		val |= AWIN_DEBE_MODCTL_LAY0_EN;
 		if (interlace_p) {
 			val |= AWIN_DEBE_MODCTL_ITLMOD_EN;
 		} else {
 			val &= ~AWIN_DEBE_MODCTL_ITLMOD_EN;
+		}
 		DEBE_WRITE(sc, AWIN_DEBE_MODCTL_REG, val);
 	} else {
 		/* disable */
 		val = DEBE_READ(sc, AWIN_DEBE_MODCTL_REG);
 		val &= ~AWIN_DEBE_MODCTL_LAY0_EN;
 		val &= ~AWIN_DEBE_MODCTL_START_CTL;
 		DEBE_WRITE(sc, AWIN_DEBE_MODCTL_REG, val);
 		/* notify fb */
 		awin_debe_setup_fbdev(sc, mode);
+	}
+}

 @@ -1,14 +1,14 @@
-/* $NetBSD: awin_fb.c,v 1.3 2014/11/10 17:55:25 jmcneill Exp $ */
+/* $NetBSD: awin_fb.c,v 1.4 2014/11/14 00:31:54 jmcneill Exp $ */
 /*-
  * Copyright (c) 2014 Jared D. McNeill <jmcneill@invisible.ca>
  * All rights reserved.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
 @@ -17,27 +17,27 @@
  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: awin_fb.c,v 1.3 2014/11/10 17:55:25 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: awin_fb.c,v 1.4 2014/11/14 00:31:54 jmcneill Exp $");
 #include <sys/param.h>
 #include <sys/bus.h>
 #include <sys/device.h>
 #include <sys/intr.h>
 #include <sys/systm.h>
 #include <sys/kernel.h>
 #include <sys/mutex.h>
 #include <sys/condvar.h>
 #include <arm/allwinner/awin_reg.h>
 #include <arm/allwinner/awin_var.h>
 @@ -179,19 +179,22 @@ awin_fb_ddb_trap_callback(int where)
 	} else {
 		genfb_disable_polling(awin_fb_consoledev);
+	}
+}
 void
 awin_fb_set_videomode(device_t dev, const struct videomode *mode)
+{
 	struct awin_fb_softc *sc = device_private(dev);
 	if (mode == NULL)
 		return;
-	if (sc->sc_gen.sc_width != mode->hdisplay ||
+	const u_int interlace_p = !!(mode->flags & VID_INTERLACE);
-	    sc->sc_gen.sc_height != mode->vdisplay) {
+	const u_int width = mode->hdisplay;
 	const u_int height = (mode->vdisplay << interlace_p);
 	if (sc->sc_gen.sc_width != width || sc->sc_gen.sc_height != height) {
 		device_printf(sc->sc_gen.sc_dev,
 		    "mode switching not yet supported\n");
+	}
+}

 @@ -1,14 +1,14 @@
-/* $NetBSD: awin_hdmi.c,v 1.10 2014/11/12 17:38:14 jmcneill Exp $ */
+/* $NetBSD: awin_hdmi.c,v 1.11 2014/11/14 00:31:54 jmcneill Exp $ */
 /*-
  * Copyright (c) 2014 Jared D. McNeill <jmcneill@invisible.ca>
  * All rights reserved.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
 @@ -22,27 +22,27 @@
  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
  */
 #include "opt_allwinner.h"
 #include "opt_ddb.h"
 #define AWIN_HDMI_PLL	3	/* PLL7 or PLL3 */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: awin_hdmi.c,v 1.10 2014/11/12 17:38:14 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: awin_hdmi.c,v 1.11 2014/11/14 00:31:54 jmcneill Exp $");
 #include <sys/param.h>
 #include <sys/bus.h>
 #include <sys/device.h>
 #include <sys/intr.h>
 #include <sys/systm.h>
 #include <sys/kernel.h>
 #include <sys/proc.h>
 #include <sys/mutex.h>
 #include <sys/kthread.h>
 #include <arm/allwinner/awin_reg.h>
 #include <arm/allwinner/awin_var.h>
 @@ -591,49 +591,41 @@ awin_hdmi_set_videomode(struct awin_hdmi
 	HDMI_WRITE(sc, AWIN_HDMI_PAD_CTRL0_REG, pad_ctrl0);
 	HDMI_WRITE(sc, AWIN_HDMI_PAD_CTRL1_REG, pad_ctrl1);
 	HDMI_WRITE(sc, AWIN_HDMI_PLL_CTRL_REG, pll_ctrl);
 #if AWIN_HDMI_PLL == 7
 	HDMI_WRITE(sc, AWIN_HDMI_PLL_DBG0_REG, (1<<21));
 #elif AWIN_HDMI_PLL == 3
 	HDMI_WRITE(sc, AWIN_HDMI_PLL_DBG0_REG, (0<<21));
 #endif
 	val = HDMI_READ(sc, AWIN_HDMI_VID_CTRL_REG);
 	val |= __SHIFTIN(AWIN_HDMI_VID_CTRL_HDMI_MODE_HDMI,
 			 AWIN_HDMI_VID_CTRL_HDMI_MODE);
 	val &= ~AWIN_HDMI_VID_CTRL_OUTPUT_FMT;
 	if (dblscan_p) {
 		val |= __SHIFTIN(AWIN_HDMI_VID_CTRL_REPEATER_SEL_2X,
 				 AWIN_HDMI_VID_CTRL_REPEATER_SEL);
 	} else {
 		val &= ~AWIN_HDMI_VID_CTRL_REPEATER_SEL;
+	}
 	if (interlace_p) {
 		val |= __SHIFTIN(AWIN_HDMI_VID_CTRL_OUTPUT_FMT_INTERLACE,
 				 AWIN_HDMI_VID_CTRL_OUTPUT_FMT);
 	} else {
 		val &= ~AWIN_HDMI_VID_CTRL_OUTPUT_FMT;
+	}
 	HDMI_WRITE(sc, AWIN_HDMI_VID_CTRL_REG, val);
 	val = __SHIFTIN((mode->hdisplay << dblscan_p) - 1,
 			AWIN_HDMI_VID_TIMING_0_ACT_H);
-	if (interlace_p) {
+	val |= __SHIFTIN(mode->vdisplay - 1,
-		val |= __SHIFTIN((mode->vdisplay / 2) - 1,
+			 AWIN_HDMI_VID_TIMING_0_ACT_V);
 				 AWIN_HDMI_VID_TIMING_0_ACT_V);
 	} else {
 		val |= __SHIFTIN(mode->vdisplay - 1,
 				 AWIN_HDMI_VID_TIMING_0_ACT_V);
 	HDMI_WRITE(sc, AWIN_HDMI_VID_TIMING_0_REG, val);
 	val = __SHIFTIN((hbp << dblscan_p) - 1,
 			AWIN_HDMI_VID_TIMING_1_HBP);
 	val |= __SHIFTIN(vbp - 1,
 			 AWIN_HDMI_VID_TIMING_1_VBP);
 	HDMI_WRITE(sc, AWIN_HDMI_VID_TIMING_1_REG, val);
 	val = __SHIFTIN((hfp << dblscan_p) - 1,
 			AWIN_HDMI_VID_TIMING_2_HFP);
 	val |= __SHIFTIN(vfp - 1,
 			 AWIN_HDMI_VID_TIMING_2_VFP);
 	HDMI_WRITE(sc, AWIN_HDMI_VID_TIMING_2_REG, val);

 @@ -1737,32 +1737,37 @@ struct awin_mmc_idma_descriptor {
 #define AWIN_TCON_CMAP_EVEN1_REG	0x019C
 #define AWIN_TCON_MUX_CTL_REG		0x0200
 #define AWIN_TCON_GCTL_EN		__BIT(31)
 #define AWIN_TCON_GCTL_GAMMA_EN		__BIT(30)
 #define AWIN_TCON_GCTL_IO_MAP_SEL	__BIT(0)
 #define AWIN_TCON_GCTL_IO_MAP_SEL_TCON0	0
 #define AWIN_TCON_GCTL_IO_MAP_SEL_TCON1	1
 #define AWIN_TCON_GINT1_TCON0_LINENO	__BITS(27,16)
 #define AWIN_TCON_GINT1_TCON1_LINENO	__BITS(11,0)
 #define AWIN_TCON_CTL_EN		__BIT(31)
 #define AWIN_TCON_CTL_INTERLACE_EN	__BIT(20)
 #define AWIN_TCON_CTL_START_DELAY	__BITS(8,4)
 #define AWIN_TCON_CTL_SRC_SEL		__BITS(1,0)
 #define AWIN_TCON_CTL_SRC_SEL_DE0	0
 #define AWIN_TCON_CTL_SRC_SEL_DE1	1
 #define AWIN_TCON_CTL_SRC_SEL_BLUEDATA	2
 #define AWIN_TCON_IO_POL_IO2_INV	__BIT(26)
 #define AWIN_TCON_IO_POL_PVSYNC		__BIT(25)
 #define AWIN_TCON_IO_POL_PHSYNC		__BIT(24)
 #define AWIN_TCON_IO_TRI_IO3		__BIT(27)
 #define AWIN_TCON_IO_TRI_IO2		__BIT(26)
 #define AWIN_TCON_IO_TRI_IO1		__BIT(25)
 #define AWIN_TCON_IO_TRI_IO0		__BIT(24)
 #define AWIN_TCON_IO_TRI_DATA		__BITS(23,0)
 #define AWIN_TCON_MUX_CTL_HDMI_OUTPUT_SRC __BITS(9,8)
 #define AWIN_TCON_MUX_CTL_HDMI_OUTPUT_SRC_LCDC0_TCON1	0
 #define AWIN_TCON_MUX_CTL_HDMI_OUTPUT_SRC_LCDC1_TCON1	1
 #define AWIN_TCON_MUX_CTL_HDMI_OUTPUT_SRC_CLOSE		2
 /* HDMI */
 #define AWIN_HDMI_VERSION_ID_REG	0x0000

 @@ -1,14 +1,14 @@
-/* $NetBSD: awin_tcon.c,v 1.4 2014/11/11 19:22:32 jmcneill Exp $ */
+/* $NetBSD: awin_tcon.c,v 1.5 2014/11/14 00:31:54 jmcneill Exp $ */
 /*-
  * Copyright (c) 2014 Jared D. McNeill <jmcneill@invisible.ca>
  * All rights reserved.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
 @@ -19,42 +19,44 @@
  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
  */
 #include "opt_allwinner.h"
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: awin_tcon.c,v 1.4 2014/11/11 19:22:32 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: awin_tcon.c,v 1.5 2014/11/14 00:31:54 jmcneill Exp $");
 #include <sys/param.h>
 #include <sys/bus.h>
 #include <sys/device.h>
 #include <sys/intr.h>
 #include <sys/systm.h>
 #include <sys/kernel.h>
 #include <sys/mutex.h>
 #include <sys/condvar.h>
 #include <arm/allwinner/awin_reg.h>
 #include <arm/allwinner/awin_var.h>
 #include <dev/videomode/videomode.h>
 #define DIVIDE(x,y)     (((x) + ((y) / 2)) / (y))
 struct awin_tcon_softc {
 	device_t sc_dev;
 	bus_space_tag_t sc_bst;
 	bus_space_handle_t sc_bsh;
 	bus_space_handle_t sc_ch1clk_bsh;
 	unsigned int sc_port;
 	unsigned int sc_clk_div;
 	bool sc_clk_dbl;
 };
 #define TCON_READ(sc, reg) \
     bus_space_read_4((sc)->sc_bst, (sc)->sc_bsh, (reg))
 #define TCON_WRITE(sc, reg, val) \
 @@ -224,65 +226,95 @@ awin_tcon_set_videomode(const struct vid
+{
 	struct awin_tcon_softc *sc;
 	device_t dev;
 	uint32_t val;
 	dev = device_find_by_driver_unit("awintcon", 0);
 	if (dev == NULL) {
 		printf("TCON: no driver found\n");
 		return;
+	}
 	sc = device_private(dev);
 	if (mode) {
 		const u_int interlace_p = !!(mode->flags & VID_INTERLACE);
 		const u_int phsync_p = !!(mode->flags & VID_PHSYNC);
 		const u_int pvsync_p = !!(mode->flags & VID_PVSYNC);
 		const u_int hspw = mode->hsync_end - mode->hsync_start;
 		const u_int hbp = mode->htotal - mode->hsync_start;
 		const u_int vspw = mode->vsync_end - mode->vsync_start;
 		const u_int vbp = mode->vtotal - mode->vsync_start;
 		const u_int vblank_len =
 		    ((mode->vtotal << interlace_p) >> 1) - mode->vdisplay - 2;
 		const u_int start_delay =
 		    vblank_len >= 32 ? 30 : vblank_len - 2;
 		val = TCON_READ(sc, AWIN_TCON_GCTL_REG);
 		val |= AWIN_TCON_GCTL_IO_MAP_SEL;
 		TCON_WRITE(sc, AWIN_TCON_GCTL_REG, val);
 		/* enable */
 		val = AWIN_TCON_CTL_EN;
-		val |= __SHIFTIN(0x1e, AWIN_TCON_CTL_START_DELAY);
+		if (interlace_p)
 			val |= AWIN_TCON_CTL_INTERLACE_EN;
 		val |= __SHIFTIN(start_delay, AWIN_TCON_CTL_START_DELAY);
 #ifdef AWIN_TCON_BLUEDATA
 		val |= __SHIFTIN(AWIN_TCON_CTL_SRC_SEL_BLUEDATA,
 				 AWIN_TCON_CTL_SRC_SEL);
 #else
 		val |= __SHIFTIN(AWIN_TCON_CTL_SRC_SEL_DE0,
 				 AWIN_TCON_CTL_SRC_SEL);
 #endif
 		TCON_WRITE(sc, AWIN_TCON1_CTL_REG, val);
 		/* Source width/height */
 		TCON_WRITE(sc, AWIN_TCON1_BASIC0_REG,
 		    ((mode->hdisplay - 1) << 16) | (mode->vdisplay - 1));
 		/* Scaler width/height */
 		TCON_WRITE(sc, AWIN_TCON1_BASIC1_REG,
 		    ((mode->hdisplay - 1) << 16) | (mode->vdisplay - 1));
 		/* Output width/height */
 		TCON_WRITE(sc, AWIN_TCON1_BASIC2_REG,
 		    ((mode->hdisplay - 1) << 16) | (mode->vdisplay - 1));
 		/* Horizontal total + back porch */
 		TCON_WRITE(sc, AWIN_TCON1_BASIC3_REG,
 		    ((mode->htotal - 1) << 16) | (hbp - 1));
 		/* Vertical total + back porch */
 		u_int vtotal = mode->vtotal * 2;
 		if (interlace_p) {
 			u_int framerate =
 			    DIVIDE(DIVIDE(mode->dot_clock * 1000, mode->htotal),
 			    mode->vtotal);
 			u_int clk = mode->htotal * (mode->vtotal * 2 + 1) *
 			    framerate;
 			if ((clk / 2) == mode->dot_clock * 1000)
 				vtotal += 1;
+		}
 		TCON_WRITE(sc, AWIN_TCON1_BASIC4_REG,
-		    ((mode->vtotal * 2) << 16) | (vbp - 1));
+		    (vtotal << 16) | (vbp - 1));
 		/* Sync */
 		TCON_WRITE(sc, AWIN_TCON1_BASIC5_REG,
 		    ((hspw - 1) << 16) | (vspw - 1));
 		/* Polarity */
 		val = AWIN_TCON_IO_POL_IO2_INV;
 		if (phsync_p)
 			val |= AWIN_TCON_IO_POL_PHSYNC;
 		if (pvsync_p)
 			val |= AWIN_TCON_IO_POL_PVSYNC;
 		TCON_WRITE(sc, AWIN_TCON1_IO_POL_REG, val);
 		TCON_WRITE(sc, AWIN_TCON_GINT1_REG,
 		    __SHIFTIN(start_delay + 2, AWIN_TCON_GINT1_TCON1_LINENO));
 		/* Setup LCDx CH1 PLL */
 		awin_tcon_set_pll(sc, mode);
 	} else {
 		/* disable */
 		val = TCON_READ(sc, AWIN_TCON1_CTL_REG);
 		val &= ~AWIN_TCON_CTL_EN;
 		TCON_WRITE(sc, AWIN_TCON1_CTL_REG, val);
+	}
+}
 unsigned int
 awin_tcon_get_clk_div(void)