 @@ -1,14 +1,14 @@
-/* $NetBSD: rockchip_board.c,v 1.4 2014/12/27 16:18:50 jmcneill Exp $ */
+/* $NetBSD: rockchip_board.c,v 1.5 2014/12/27 19:14:05 jmcneill Exp $ */
 /*-
  * Copyright (c) 2014 Jared D. McNeill <jmcneill@invisible.ca>
  * All rights reserved.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
 @@ -19,27 +19,27 @@
  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
  */
 #include "opt_rockchip.h"
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: rockchip_board.c,v 1.4 2014/12/27 16:18:50 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: rockchip_board.c,v 1.5 2014/12/27 19:14:05 jmcneill Exp $");
 #include <sys/param.h>
 #include <sys/bus.h>
 #include <sys/cpu.h>
 #include <sys/device.h>
 #include <arm/rockchip/rockchip_reg.h>
 #include <arm/rockchip/rockchip_crureg.h>
 #include <arm/rockchip/rockchip_var.h>
 bus_space_handle_t rockchip_core0_bsh;
 bus_space_handle_t rockchip_core1_bsh;
 @@ -189,15 +189,51 @@ rockchip_mmc0_get_rate(void)
+{
 	bus_space_tag_t bst = &rockchip_bs_tag;
 	bus_space_handle_t bsh;
 	uint32_t clksel_con11;
 	uint32_t mmc0_div_con;
 	rockchip_get_cru_bsh(&bsh);
 	clksel_con11 = bus_space_read_4(bst, bsh, CRU_CLKSEL_CON_REG(11));
 	mmc0_div_con = __SHIFTOUT(clksel_con11,
 				  CRU_CLKSEL_CON11_MMC0_DIV_CON);
-	return rockchip_gpll_get_rate() / (mmc0_div_con + 1);
+	return rockchip_ahb_get_rate() / (mmc0_div_con + 1);
+}
 u_int
 rockchip_mmc0_set_div(u_int div)
+{
 	bus_space_tag_t bst = &rockchip_bs_tag;
 	bus_space_handle_t bsh;
 	uint32_t clksel_con11;
 	if (div == 0 || div > 0x40)
 		return EINVAL;
 	rockchip_get_cru_bsh(&bsh);
 	clksel_con11 = CRU_CLKSEL_CON11_MMC0_PLL_SEL_MASK |
 		       CRU_CLKSEL_CON11_MMC0_DIV_CON_MASK;
 	//clksel_con11 |= CRU_CLKSEL_CON11_MMC0_PLL_SEL;	/* GPLL */
 	clksel_con11 |= __SHIFTIN(div - 1, CRU_CLKSEL_CON11_MMC0_DIV_CON);
 #ifdef ROCKCHIP_CLOCK_DEBUG
 	const u_int old_rate = rockchip_mmc0_get_rate();
 #endif
 	bus_space_write_4(bst, bsh, CRU_CLKSEL_CON_REG(11), clksel_con11);
 #ifdef ROCKCHIP_CLOCK_DEBUG
 	const u_int new_rate = rockchip_mmc0_get_rate();
 	printf("%s: update %u Hz -> %u Hz\n", __func__, old_rate, new_rate);
 	const uint32_t clkgate2 = bus_space_read_4(bst, bsh,
 	    CRU_CLKGATE_CON_REG(2));
 	printf("%s: clkgate2 = %#x\n", __func__, clkgate2);
 #endif
 	return 0;
+}

 @@ -1,14 +1,14 @@
-/* $NetBSD: rockchip_var.h,v 1.5 2014/12/27 16:18:50 jmcneill Exp $ */
+/* $NetBSD: rockchip_var.h,v 1.6 2014/12/27 19:14:05 jmcneill Exp $ */
 /*-
  * Copyright (c) 2014 The NetBSD Foundation, Inc.
  * All rights reserved.
+ *
  * This code is derived from software contributed to The NetBSD Foundation
  * by Hiroshi Tokuda
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
 @@ -54,15 +54,16 @@ extern struct bus_space rockchip_bs_tag;
 extern struct bus_space rockchip_a4x_bs_tag;
 extern struct arm32_bus_dma_tag	rockchip_bus_dma_tag;
 extern bus_space_handle_t rockchip_core0_bsh;
 extern bus_space_handle_t rockchip_core1_bsh;
 void rockchip_bootstrap(void);
 u_int rockchip_apll_get_rate(void);
 u_int rockchip_gpll_get_rate(void);
 u_int rockchip_cpu_get_rate(void);
 u_int rockchip_ahb_get_rate(void);
 u_int rockchip_a9periph_get_rate(void);
 u_int rockchip_mmc0_get_rate(void);
 u_int rockchip_mmc0_set_div(u_int);
 #endif /* _ARM_ROCKCHIP_ROCKCHIP_VAR_H_ */