 @@ -1,14 +1,14 @@
-/*	$NetBSD: rockchip_machdep.c,v 1.13 2015/01/02 00:50:56 jmcneill Exp $ */
+/*	$NetBSD: rockchip_machdep.c,v 1.14 2015/01/02 22:00:02 jmcneill Exp $ */
 /*
  * Machine dependent functions for kernel setup for TI OSK5912 board.
  * Based on lubbock_machdep.c which in turn was based on iq80310_machhdep.c
+ *
  * Copyright (c) 2002, 2003, 2005  Genetec Corporation.  All rights reserved.
  * Written by Hiroyuki Bessho for Genetec Corporation.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
 @@ -115,27 +115,27 @@
  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTERS BE LIABLE FOR ANY DIRECT,
  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: rockchip_machdep.c,v 1.13 2015/01/02 00:50:56 jmcneill Exp $");
+__KERNEL_RCSID(0, "$NetBSD: rockchip_machdep.c,v 1.14 2015/01/02 22:00:02 jmcneill Exp $");
 #include "opt_machdep.h"
 #include "opt_ddb.h"
 #include "opt_kgdb.h"
 #include "opt_ipkdb.h"
 #include "opt_md.h"
 #include "opt_com.h"
 #include "opt_rockchip.h"
 #include "opt_arm_debug.h"
 #include "com.h"
 #if 0
 #include "prcm.h"
 @@ -458,27 +458,26 @@ rockchip_parse_atag(u_int atag_base)
  * It should be responsible for setting up everything that must be
  * in place when main is called.
  * This includes
  *   Taking a copy of the boot configuration structure.
  *   Initialising the physical console so characters can be printed.
  *   Setting up page tables for the kernel
  *   Relocating the kernel to the bottom of physical memory
  */
 u_int
 initarm(void *arg)
+{
 	psize_t ram_size = 0;
 	char *ptr;
 	u_int cpufreq;
 	*(volatile int *)CONSADDR_VA  = 0x40;	/* output '@' */
 #if 1
 	rockchip_putchar('d');
 #endif
 	pmap_devmap_register(devmap);
 	rockchip_bootstrap();
 #ifdef MULTIPROCESSOR
 	uint32_t scu_cfg = bus_space_read_4(&rockchip_bs_tag,
 	    rockchip_core0_bsh, ROCKCHIP_SCU_OFFSET + SCU_CFG);
 	arm_cpu_max = (scu_cfg & SCU_CFG_CPUMAX) + 1;
 	membar_producer();
 @@ -590,31 +589,26 @@ initarm(void *arg)
 	boot_args = bootargs;
 	parse_mi_bootargs(boot_args);
 	/* we've a specific device_register routine */
 	evbarm_device_register = rockchip_device_register;
 	db_trap_callback = rockchip_db_trap;
 	if (get_bootconf_option(boot_args, "console",
 		    BOOTOPT_TYPE_STRING, &ptr) && strncmp(ptr, "fb", 2) == 0) {
 		use_fb_console = true;
+	}
 	if (get_bootconf_option(boot_args, "cpu.frequency",
 		    BOOTOPT_TYPE_INT, &cpufreq)) {
 		rockchip_apll_set_rate(cpufreq * 1000000);
 	curcpu()->ci_data.cpu_cc_freq = rockchip_cpu_get_rate();
 	return initarm_common(KERNEL_VM_BASE, KERNEL_VM_SIZE, NULL, 0);
+}
 static void
 init_clocks(void)
+{
 	/* NOT YET */
+}
 #if NCOM > 0
 @@ -726,26 +720,30 @@ rockchip_device_register(device_t self,
 	if (device_is_a(self, "armperiph")
 	    && device_is_a(device_parent(self), "mainbus")) {
 		/*
 		 * XXX KLUDGE ALERT XXX
 		 * The iot mainbus supplies is completely wrong since it scales
 		 * addresses by 2.  The simpliest remedy is to replace with our
 		 * bus space used for the armcore regisers (which armperiph uses).
 		 */
 		struct mainbus_attach_args * const mb = aux;
 		mb->mb_iot = &rockchip_bs_tag;
 		return;
+	}
 	if (device_is_a(self, "cpu") && device_unit(self) == 0) {
 		rockchip_cpufreq_init();
+	}
 #ifdef CPU_CORTEXA9
 	/*
 	 * We need to tell the A9 Global/Watchdog Timer
 	 * what frequency it runs at.
 	 */
 	if (device_is_a(self, "a9tmr") || device_is_a(self, "a9wdt")) {
                 prop_dictionary_set_uint32(dict, "frequency",
 		    rockchip_a9periph_get_rate());
 		return;
+	}
 	if (device_is_a(self, "arml2cc")) {