Mon Jan 5 22:58:44 2015 UTC ()
Pullup the following revision (requested by he in ticket #349):

	src/external/bsd/bind/include/isc/platform.h	rev. 1.18

What ISC wraps under ISC_PLATFORM_HAVEXADD appears to be 32-bit
atomic adds, and I beleive all our platforms can do that.  Therefore,
no need to conditionalize that definition under __HAVE_ATOMIC64_OPS.


(msaitoh)
diff -r1.16.2.1 -r1.16.2.2 src/external/bsd/bind/include/isc/platform.h
cvs diff -r1.16.2.1 -r1.16.2.2 src/external/bsd/bind/include/isc/Attic/platform.h (expand / switch to unified diff)

--- src/external/bsd/bind/include/isc/Attic/platform.h 2014/12/22 03:28:48 1.16.2.1
+++ src/external/bsd/bind/include/isc/Attic/platform.h 2015/01/05 22:58:44 1.16.2.2
@@ -260,29 +260,27 @@ @@ -260,29 +260,27 @@
260 * Used to control how extern data is linked; needed for Win32 platforms. 260 * Used to control how extern data is linked; needed for Win32 platforms.
261 */ 261 */
262#undef ISC_PLATFORM_USEDECLSPEC 262#undef ISC_PLATFORM_USEDECLSPEC
263 263
264/* 264/*
265 * Define if the platform has <sys/un.h>. 265 * Define if the platform has <sys/un.h>.
266 */ 266 */
267#define ISC_PLATFORM_HAVESYSUNH 1 267#define ISC_PLATFORM_HAVESYSUNH 1
268 268
269/* 269/*
270 * If the "xadd" operation is available on this architecture, 270 * If the "xadd" operation is available on this architecture,
271 * ISC_PLATFORM_HAVEXADD will be defined. 271 * ISC_PLATFORM_HAVEXADD will be defined.
272 */ 272 */
273#ifdef __HAVE_ATOMIC64_OPS 
274#define ISC_PLATFORM_HAVEXADD 1 273#define ISC_PLATFORM_HAVEXADD 1
275#endif 
276 274
277/* 275/*
278 * If the "xaddq" operation (64bit xadd) is available on this architecture, 276 * If the "xaddq" operation (64bit xadd) is available on this architecture,
279 * ISC_PLATFORM_HAVEXADDQ will be defined. 277 * ISC_PLATFORM_HAVEXADDQ will be defined.
280 */ 278 */
281#ifdef __HAVE_ATOMIC64_OPS 279#ifdef __HAVE_ATOMIC64_OPS
282#define ISC_PLATFORM_HAVEXADDQ 1 280#define ISC_PLATFORM_HAVEXADDQ 1
283#endif 281#endif
284 282
285/* 283/*
286 * If the "atomic swap" operation is available on this architecture, 284 * If the "atomic swap" operation is available on this architecture,
287 * ISC_PLATFORM_HAVEATOMICSTORE" will be defined. 285 * ISC_PLATFORM_HAVEATOMICSTORE" will be defined.
288 */ 286 */