Mon Mar 2 11:37:25 2015 UTC ()
sc_gic_lines is the total number of valid lines but pic_sources[] is sparse; when initializing mpsafe targets make sure to go all the way to the end (sc_pic.pic_maxsources) instead


(jmcneill)
diff -r1.12 -r1.13 src/sys/arch/arm/cortex/gic.c
cvs diff -r1.12 -r1.13 src/sys/arch/arm/cortex/gic.c (expand / switch to unified diff)

--- src/sys/arch/arm/cortex/gic.c 2014/10/29 19:27:36 1.12
+++ src/sys/arch/arm/cortex/gic.c 2015/03/02 11:37:25 1.13
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: gic.c,v 1.12 2014/10/29 19:27:36 skrll Exp $ */ 1/* $NetBSD: gic.c,v 1.13 2015/03/02 11:37:25 jmcneill Exp $ */
2/*- 2/*-
3 * Copyright (c) 2012 The NetBSD Foundation, Inc. 3 * Copyright (c) 2012 The NetBSD Foundation, Inc.
4 * All rights reserved. 4 * All rights reserved.
5 * 5 *
6 * This code is derived from software contributed to The NetBSD Foundation 6 * This code is derived from software contributed to The NetBSD Foundation
7 * by Matt Thomas of 3am Software Foundry. 7 * by Matt Thomas of 3am Software Foundry.
8 * 8 *
9 * Redistribution and use in source and binary forms, with or without 9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions 10 * modification, are permitted provided that the following conditions
11 * are met: 11 * are met:
12 * 1. Redistributions of source code must retain the above copyright 12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer. 13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright 14 * 2. Redistributions in binary form must reproduce the above copyright
@@ -24,27 +24,27 @@ @@ -24,27 +24,27 @@
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE. 28 * POSSIBILITY OF SUCH DAMAGE.
29 */ 29 */
30 30
31#include "opt_ddb.h" 31#include "opt_ddb.h"
32#include "opt_multiprocessor.h" 32#include "opt_multiprocessor.h"
33 33
34#define _INTR_PRIVATE 34#define _INTR_PRIVATE
35 35
36#include <sys/cdefs.h> 36#include <sys/cdefs.h>
37__KERNEL_RCSID(0, "$NetBSD: gic.c,v 1.12 2014/10/29 19:27:36 skrll Exp $"); 37__KERNEL_RCSID(0, "$NetBSD: gic.c,v 1.13 2015/03/02 11:37:25 jmcneill Exp $");
38 38
39#include <sys/param.h> 39#include <sys/param.h>
40#include <sys/bus.h> 40#include <sys/bus.h>
41#include <sys/device.h> 41#include <sys/device.h>
42#include <sys/evcnt.h> 42#include <sys/evcnt.h>
43#include <sys/intr.h> 43#include <sys/intr.h>
44#include <sys/cpu.h> 44#include <sys/cpu.h>
45#include <sys/proc.h> 45#include <sys/proc.h>
46 46
47#include <arm/armreg.h> 47#include <arm/armreg.h>
48#include <arm/cpufunc.h> 48#include <arm/cpufunc.h>
49#include <arm/atomic.h> 49#include <arm/atomic.h>
50 50
@@ -431,27 +431,27 @@ armgic_cpu_init_priorities(struct armgic @@ -431,27 +431,27 @@ armgic_cpu_init_priorities(struct armgic
431 priority &= ~byte_mask; 431 priority &= ~byte_mask;
432 priority |= armgic_ipl_to_priority(is->is_ipl) << byte_shift; 432 priority |= armgic_ipl_to_priority(is->is_ipl) << byte_shift;
433 } 433 }
434 gicd_write(sc, priority_reg, priority); 434 gicd_write(sc, priority_reg, priority);
435 } 435 }
436} 436}
437 437
438static void 438static void
439armgic_cpu_init_targets(struct armgic_softc *sc) 439armgic_cpu_init_targets(struct armgic_softc *sc)
440{ 440{
441 /* 441 /*
442 * Update the mpsafe targets  442 * Update the mpsafe targets
443 */ 443 */
444 for (size_t irq = 32; irq < sc->sc_gic_lines; irq++) { 444 for (size_t irq = 32; irq < sc->sc_pic.pic_maxsources; irq++) {
445 struct intrsource * const is = sc->sc_pic.pic_sources[irq]; 445 struct intrsource * const is = sc->sc_pic.pic_sources[irq];
446 const bus_size_t targets_reg = GICD_ITARGETSRn(irq / 4); 446 const bus_size_t targets_reg = GICD_ITARGETSRn(irq / 4);
447 if (is != NULL && is->is_mpsafe) { 447 if (is != NULL && is->is_mpsafe) {
448 const u_int byte_shift = 8 * (irq & 3); 448 const u_int byte_shift = 8 * (irq & 3);
449 uint32_t targets = gicd_read(sc, targets_reg); 449 uint32_t targets = gicd_read(sc, targets_reg);
450 targets |= sc->sc_mptargets << byte_shift; 450 targets |= sc->sc_mptargets << byte_shift;
451 gicd_write(sc, targets_reg, targets); 451 gicd_write(sc, targets_reg, targets);
452 } 452 }
453 } 453 }
454} 454}
455 455
456void 456void
457armgic_cpu_init(struct pic_softc *pic, struct cpu_info *ci) 457armgic_cpu_init(struct pic_softc *pic, struct cpu_info *ci)