Wed Mar 4 23:18:21 2015 UTC ()
print "A5" instead of "A9" at attach time if running on a Cortex-A5


(jmcneill)
diff -r1.11 -r1.12 src/sys/arch/arm/cortex/a9tmr.c
diff -r1.3 -r1.4 src/sys/arch/arm/cortex/a9wdt.c
cvs diff -r1.11 -r1.12 src/sys/arch/arm/cortex/a9tmr.c (expand / switch to unified diff)

--- src/sys/arch/arm/cortex/a9tmr.c 2015/02/27 18:26:49 1.11
+++ src/sys/arch/arm/cortex/a9tmr.c 2015/03/04 23:18:21 1.12
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: a9tmr.c,v 1.11 2015/02/27 18:26:49 jmcneill Exp $ */ 1/* $NetBSD: a9tmr.c,v 1.12 2015/03/04 23:18:21 jmcneill Exp $ */
2 2
3/*- 3/*-
4 * Copyright (c) 2012 The NetBSD Foundation, Inc. 4 * Copyright (c) 2012 The NetBSD Foundation, Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * This code is derived from software contributed to The NetBSD Foundation 7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Matt Thomas 8 * by Matt Thomas
9 * 9 *
10 * Redistribution and use in source and binary forms, with or without 10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions 11 * modification, are permitted provided that the following conditions
12 * are met: 12 * are met:
13 * 1. Redistributions of source code must retain the above copyright 13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer. 14 * notice, this list of conditions and the following disclaimer.
@@ -20,27 +20,27 @@ @@ -20,27 +20,27 @@
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE. 29 * POSSIBILITY OF SUCH DAMAGE.
30 */ 30 */
31 31
32#include <sys/cdefs.h> 32#include <sys/cdefs.h>
33__KERNEL_RCSID(0, "$NetBSD: a9tmr.c,v 1.11 2015/02/27 18:26:49 jmcneill Exp $"); 33__KERNEL_RCSID(0, "$NetBSD: a9tmr.c,v 1.12 2015/03/04 23:18:21 jmcneill Exp $");
34 34
35#include <sys/param.h> 35#include <sys/param.h>
36#include <sys/bus.h> 36#include <sys/bus.h>
37#include <sys/device.h> 37#include <sys/device.h>
38#include <sys/intr.h> 38#include <sys/intr.h>
39#include <sys/kernel.h> 39#include <sys/kernel.h>
40#include <sys/proc.h> 40#include <sys/proc.h>
41#include <sys/systm.h> 41#include <sys/systm.h>
42#include <sys/timetc.h> 42#include <sys/timetc.h>
43#include <sys/xcall.h> 43#include <sys/xcall.h>
44 44
45#include <prop/proplib.h> 45#include <prop/proplib.h>
46 46
@@ -110,37 +110,43 @@ a9tmr_match(device_t parent, cfdata_t cf @@ -110,37 +110,43 @@ a9tmr_match(device_t parent, cfdata_t cf
110 if (mpidr == 0 || (mpidr & MPIDR_U)) 110 if (mpidr == 0 || (mpidr & MPIDR_U))
111 return 0; 111 return 0;
112 112
113 return 1; 113 return 1;
114} 114}
115 115
116static void 116static void
117a9tmr_attach(device_t parent, device_t self, void *aux) 117a9tmr_attach(device_t parent, device_t self, void *aux)
118{ 118{
119 struct a9tmr_softc *sc = &a9tmr_sc; 119 struct a9tmr_softc *sc = &a9tmr_sc;
120 struct mpcore_attach_args * const mpcaa = aux; 120 struct mpcore_attach_args * const mpcaa = aux;
121 prop_dictionary_t dict = device_properties(self); 121 prop_dictionary_t dict = device_properties(self);
122 char freqbuf[sizeof("XXX SHz")]; 122 char freqbuf[sizeof("XXX SHz")];
 123 const char *cpu_type;
123 124
124 /* 125 /*
125 * This runs at the ARM PERIPHCLOCK which should be 1/2 of the CPU clock. 126 * This runs at the ARM PERIPHCLOCK which should be 1/2 of the CPU clock.
126 * The MD code should have setup our frequency for us. 127 * The MD code should have setup our frequency for us.
127 */ 128 */
128 prop_dictionary_get_uint32(dict, "frequency", &sc->sc_freq); 129 prop_dictionary_get_uint32(dict, "frequency", &sc->sc_freq);
129 130
130 humanize_number(freqbuf, sizeof(freqbuf), sc->sc_freq, "Hz", 1000); 131 humanize_number(freqbuf, sizeof(freqbuf), sc->sc_freq, "Hz", 1000);
131 132
132 aprint_naive("\n"); 133 aprint_naive("\n");
133 aprint_normal(": A9 Global 64-bit Timer (%s)\n", freqbuf); 134 if (CPU_ID_CORTEX_A5_P(curcpu()->ci_arm_cpuid)) {
 135 cpu_type = "A5";
 136 } else {
 137 cpu_type = "A9";
 138 }
 139 aprint_normal(": %s Global 64-bit Timer (%s)\n", cpu_type, freqbuf);
134 140
135 self->dv_private = sc; 141 self->dv_private = sc;
136 sc->sc_dev = self; 142 sc->sc_dev = self;
137 sc->sc_memt = mpcaa->mpcaa_memt; 143 sc->sc_memt = mpcaa->mpcaa_memt;
138 sc->sc_memh = mpcaa->mpcaa_memh; 144 sc->sc_memh = mpcaa->mpcaa_memh;
139 145
140 evcnt_attach_dynamic(&sc->sc_ev_missing_ticks, EVCNT_TYPE_MISC, NULL, 146 evcnt_attach_dynamic(&sc->sc_ev_missing_ticks, EVCNT_TYPE_MISC, NULL,
141 device_xname(self), "missing interrupts"); 147 device_xname(self), "missing interrupts");
142 148
143 bus_space_subregion(sc->sc_memt, sc->sc_memh,  149 bus_space_subregion(sc->sc_memt, sc->sc_memh,
144 TMR_GLOBAL_BASE, TMR_GLOBAL_SIZE, &sc->sc_global_memh); 150 TMR_GLOBAL_BASE, TMR_GLOBAL_SIZE, &sc->sc_global_memh);
145 bus_space_subregion(sc->sc_memt, sc->sc_memh,  151 bus_space_subregion(sc->sc_memt, sc->sc_memh,
146 TMR_PRIVATE_BASE, TMR_PRIVATE_SIZE, &sc->sc_private_memh); 152 TMR_PRIVATE_BASE, TMR_PRIVATE_SIZE, &sc->sc_private_memh);
cvs diff -r1.3 -r1.4 src/sys/arch/arm/cortex/a9wdt.c (expand / switch to unified diff)

--- src/sys/arch/arm/cortex/a9wdt.c 2015/02/27 18:43:28 1.3
+++ src/sys/arch/arm/cortex/a9wdt.c 2015/03/04 23:18:21 1.4
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: a9wdt.c,v 1.3 2015/02/27 18:43:28 jmcneill Exp $ */ 1/* $NetBSD: a9wdt.c,v 1.4 2015/03/04 23:18:21 jmcneill Exp $ */
2 2
3/*- 3/*-
4 * Copyright (c) 2012 The NetBSD Foundation, Inc. 4 * Copyright (c) 2012 The NetBSD Foundation, Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * This code is derived from software contributed to The NetBSD Foundation 7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Matt Thomas 8 * by Matt Thomas
9 * 9 *
10 * Redistribution and use in source and binary forms, with or without 10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions 11 * modification, are permitted provided that the following conditions
12 * are met: 12 * are met:
13 * 1. Redistributions of source code must retain the above copyright 13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer. 14 * notice, this list of conditions and the following disclaimer.
@@ -20,27 +20,27 @@ @@ -20,27 +20,27 @@
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE. 29 * POSSIBILITY OF SUCH DAMAGE.
30 */ 30 */
31 31
32#include <sys/cdefs.h> 32#include <sys/cdefs.h>
33__KERNEL_RCSID(0, "$NetBSD: a9wdt.c,v 1.3 2015/02/27 18:43:28 jmcneill Exp $"); 33__KERNEL_RCSID(0, "$NetBSD: a9wdt.c,v 1.4 2015/03/04 23:18:21 jmcneill Exp $");
34 34
35#include <sys/param.h> 35#include <sys/param.h>
36#include <sys/bus.h> 36#include <sys/bus.h>
37#include <sys/cpu.h> 37#include <sys/cpu.h>
38#include <sys/device.h> 38#include <sys/device.h>
39#include <sys/wdog.h> 39#include <sys/wdog.h>
40 40
41#include <prop/proplib.h> 41#include <prop/proplib.h>
42 42
43#include <dev/sysmon/sysmonvar.h> 43#include <dev/sysmon/sysmonvar.h>
44 44
45#include <arm/cortex/a9tmr_reg.h> 45#include <arm/cortex/a9tmr_reg.h>
46 46
@@ -176,26 +176,27 @@ a9wdt_setmode(struct sysmon_wdog *smw) @@ -176,26 +176,27 @@ a9wdt_setmode(struct sysmon_wdog *smw)
176 a9wdt_wdog_write(sc, TMR_CTL, sc->sc_wdog_ctl); 176 a9wdt_wdog_write(sc, TMR_CTL, sc->sc_wdog_ctl);
177 177
178 aprint_debug_dev(sc->sc_dev, "setmode enable\n"); 178 aprint_debug_dev(sc->sc_dev, "setmode enable\n");
179 return 0; 179 return 0;
180} 180}
181 181
182 182
183static void 183static void
184a9wdt_attach(device_t parent, device_t self, void *aux) 184a9wdt_attach(device_t parent, device_t self, void *aux)
185{ 185{
186 struct a9wdt_softc * const sc = device_private(self); 186 struct a9wdt_softc * const sc = device_private(self);
187 struct mpcore_attach_args * const mpcaa = aux; 187 struct mpcore_attach_args * const mpcaa = aux;
188 prop_dictionary_t dict = device_properties(self); 188 prop_dictionary_t dict = device_properties(self);
 189 const char *cpu_type;
189 190
190 sc->sc_dev = self; 191 sc->sc_dev = self;
191 sc->sc_memt = mpcaa->mpcaa_memt; 192 sc->sc_memt = mpcaa->mpcaa_memt;
192 193
193 bus_space_subregion(sc->sc_memt, mpcaa->mpcaa_memh,  194 bus_space_subregion(sc->sc_memt, mpcaa->mpcaa_memh,
194 TMR_WDOG_BASE, TMR_WDOG_SIZE, &sc->sc_wdog_memh); 195 TMR_WDOG_BASE, TMR_WDOG_SIZE, &sc->sc_wdog_memh);
195 196
196 /* 197 /*
197 * This runs at the ARM PERIPHCLOCK which should be 1/2 of the 198 * This runs at the ARM PERIPHCLOCK which should be 1/2 of the
198 * CPU clock. The MD code should have setup our frequency for us. 199 * CPU clock. The MD code should have setup our frequency for us.
199 */ 200 */
200 prop_dictionary_get_uint32(dict, "frequency", &sc->sc_freq); 201 prop_dictionary_get_uint32(dict, "frequency", &sc->sc_freq);
201 202
@@ -220,28 +221,33 @@ a9wdt_attach(device_t parent, device_t s @@ -220,28 +221,33 @@ a9wdt_attach(device_t parent, device_t s
220 } 221 }
221 } 222 }
222 sc->sc_freq /= sc->sc_wdog_prescaler; 223 sc->sc_freq /= sc->sc_wdog_prescaler;
223 } 224 }
224 sc->sc_wdog_max_period = UINT32_MAX / sc->sc_freq; 225 sc->sc_wdog_max_period = UINT32_MAX / sc->sc_freq;
225 226
226 /* 227 /*
227 * Does the config file tell us to turn on the watchdog? 228 * Does the config file tell us to turn on the watchdog?
228 */ 229 */
229 if (device_cfdata(self)->cf_flags & 1) 230 if (device_cfdata(self)->cf_flags & 1)
230 sc->sc_wdog_armed = true; 231 sc->sc_wdog_armed = true;
231 232
232 aprint_naive("\n"); 233 aprint_naive("\n");
233 aprint_normal(": A9 Watchdog Timer, default period is %u seconds%s\n", 234 if (CPU_ID_CORTEX_A5_P(curcpu()->ci_arm_cpuid)) {
234 sc->sc_wdog_period, 235 cpu_type = "A5";
 236 } else {
 237 cpu_type = "A9";
 238 }
 239 aprint_normal(": %s Watchdog Timer, default period is %u seconds%s\n",
 240 cpu_type, sc->sc_wdog_period,
235 sc->sc_wdog_armed ? " (armed)" : ""); 241 sc->sc_wdog_armed ? " (armed)" : "");
236 242
237 sc->sc_smw.smw_name = device_xname(self); 243 sc->sc_smw.smw_name = device_xname(self);
238 sc->sc_smw.smw_cookie = sc; 244 sc->sc_smw.smw_cookie = sc;
239 sc->sc_smw.smw_setmode = a9wdt_setmode; 245 sc->sc_smw.smw_setmode = a9wdt_setmode;
240 sc->sc_smw.smw_tickle = a9wdt_tickle; 246 sc->sc_smw.smw_tickle = a9wdt_tickle;
241 sc->sc_smw.smw_period = sc->sc_wdog_period; 247 sc->sc_smw.smw_period = sc->sc_wdog_period;
242 248
243 if (sc->sc_wdog_armed) { 249 if (sc->sc_wdog_armed) {
244 int error = sysmon_wdog_setmode(&sc->sc_smw, WDOG_MODE_KTICKLE, 250 int error = sysmon_wdog_setmode(&sc->sc_smw, WDOG_MODE_KTICKLE,
245 sc->sc_wdog_period); 251 sc->sc_wdog_period);
246 if (error) 252 if (error)
247 aprint_error_dev(self, 253 aprint_error_dev(self,