 @@ -1,14 +1,14 @@
-/*	$NetBSD: cpuswitch.S,v 1.84 2014/06/15 02:27:15 ozaki-r Exp $	*/
+/*	$NetBSD: cpuswitch.S,v 1.84.2.1 2015/03/27 11:27:39 martin Exp $	*/
 /*
  * Copyright 2003 Wasabi Systems, Inc.
  * All rights reserved.
+ *
  * Written by Steve C. Woodford for Wasabi Systems, Inc.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
 @@ -77,27 +77,27 @@
  * Created      : 15/10/94
  */
 #include "opt_armfpe.h"
 #include "opt_arm32_pmap.h"
 #include "opt_multiprocessor.h"
 #include "opt_cpuoptions.h"
 #include "opt_lockdebug.h"
 #include "assym.h"
 #include <arm/asm.h>
 #include <arm/locore.h>
-	RCSID("$NetBSD: cpuswitch.S,v 1.84 2014/06/15 02:27:15 ozaki-r Exp $")
+	RCSID("$NetBSD: cpuswitch.S,v 1.84.2.1 2015/03/27 11:27:39 martin Exp $")
 /* LINTSTUB: include <sys/param.h> */
 #undef IRQdisable
 #undef IRQenable
 /*
  * New experimental definitions of IRQdisable and IRQenable
  * These keep FIQ's enabled since FIQ's are special.
  */
 #ifdef _ARM_ARCH_6
 #define	IRQdisable	cpsid	i
 @@ -127,210 +127,211 @@
  *	r0	'struct lwp *' of the current LWP (or NULL if exiting)
  *	r1	'struct lwp *' of the LWP to switch to
  *	r2	returning
  */
 ENTRY(cpu_switchto)
 	mov	ip, sp
 	push	{r4-r7, ip, lr}
 	/* move lwps into caller saved registers */
 	mov	r6, r1
 	mov	r4, r0
 #ifdef TPIDRPRW_IS_CURCPU
-	GET_CURCPU(r3)
+	GET_CURCPU(r5)
 #elif defined(TPIDRPRW_IS_CURLWP)
 	mrc	p15, 0, r0, c13, c0, 4		/* get old lwp (r4 maybe 0) */
-	ldr	r3, [r0, #(L_CPU)]		/* get cpu from old lwp */
+	ldr	r5, [r0, #(L_CPU)]		/* get cpu from old lwp */
 #elif !defined(MULTIPROCESSOR)
-	ldr	r3, [r6, #L_CPU]		/* get cpu from new lwp */
+	ldr	r5, [r6, #L_CPU]		/* get cpu from new lwp */
 #else
 #error curcpu() method not defined
 #endif
 	/* rem: r3 = curcpu() */
 	/* rem: r4 = old lwp */
 	/* rem: r5 = curcpu() */
 	/* rem: r6 = new lwp */
 #ifndef __HAVE_UNNESTED_INTRS
 	IRQdisable
 #endif
 #ifdef MULTIPROCESSOR
-	str	r3, [r6, #(L_CPU)]
+	str	r5, [r6, #(L_CPU)]
 #else
 	/* l->l_cpu initialized in fork1() for single-processor */
 #endif
 #if defined(TPIDRPRW_IS_CURLWP)
 	mcr	p15, 0, r6, c13, c0, 4		/* set current lwp */
 #endif
 	/* We have a new curlwp now so make a note it */
-	str	r6, [r3, #(CI_CURLWP)]
+	str	r6, [r5, #(CI_CURLWP)]
 	/* Get the new pcb */
 	ldr	r7, [r6, #(L_PCB)]
 	/* At this point we can allow IRQ's again. */
 #ifndef __HAVE_UNNESTED_INTRS
 	IRQenable
 #endif
 	/* rem: r3 = curcpu() */
 	/* rem: r4 = old lwp */
 	/* rem: r5 = curcpu() */
 	/* rem: r6 = new lwp */
 	/* rem: r7 = new pcb */
 	/* rem: interrupts are enabled */
 	/*
 	 * If the old lwp on entry to cpu_switchto was zero then the
 	 * process that called it was exiting. This means that we do
 	 * not need to save the current context. Instead we can jump
 	 * straight to restoring the context for the new process.
 	 */
 	teq	r4, #0
 	beq	.Ldo_switch
 	/* rem: r3 = curcpu() */
 	/* rem: r4 = old lwp */
 	/* rem: r5 = curcpu() */
 	/* rem: r6 = new lwp */
 	/* rem: r7 = new pcb */
 	/* rem: interrupts are enabled */
 	/* Save old context */
 	/* Get the user structure for the old lwp. */
-	ldr	r5, [r4, #(L_PCB)]
+	ldr	r7, [r4, #(L_PCB)]
 	/* Save all the registers in the old lwp's pcb */
 #if defined(_ARM_ARCH_DWORD_OK)
-	strd	r8, r9, [r5, #(PCB_R8)]
+	strd	r8, r9, [r7, #(PCB_R8)]
-	strd	r10, r11, [r5, #(PCB_R10)]
+	strd	r10, r11, [r7, #(PCB_R10)]
-	strd	r12, r13, [r5, #(PCB_R12)]
+	strd	r12, r13, [r7, #(PCB_R12)]
 #else
-	add	r0, r5, #(PCB_R8)
+	add	r0, r7, #(PCB_R8)
 	stmia	r0, {r8-r13}
 #endif
 #ifdef _ARM_ARCH_6
 	/*
 	 * Save user read/write thread/process id register
 	 */
 	mrc	p15, 0, r0, c13, c0, 2
-	str	r0, [r5, #(PCB_USER_PID_RW)]
+	str	r0, [r7, #(PCB_USER_PID_RW)]
 #endif
 	/*
 	 * NOTE: We can now use r8-r13 until it is time to restore
 	 * them for the new process.
 	 */
 	/* rem: r3 = curcpu() */
 	/* rem: r4 = old lwp */
-	/* rem: r5 = old pcb */
+	/* rem: r5 = curcpu() */
 	/* rem: r6 = new lwp */
 	/* rem: r7 = new pcb */
 	/* rem: interrupts are enabled */
 	/* Restore saved context */
 .Ldo_switch:
-	/* rem: r3 = curcpu() */
+	/* Get the new pcb */
 	ldr	r7, [r6, #(L_PCB)]
 	/* rem: r4 = old lwp */
 	/* rem: r5 = curcpu() */
 	/* rem: r6 = new lwp */
 	/* rem: r7 = new pcb */
 	/* rem: interrupts are enabled */
 	/*
 	 * If we are switching to a system lwp, don't bother restoring
 	 * thread or vfp registers and skip the ras check.
 	 */
 	ldr	r0, [r6, #(L_FLAG)]
 	tst	r0, #(LW_SYSTEM)
 	bne	.Lswitch_do_restore
 #ifdef _ARM_ARCH_6
 	/*
 	 * Restore user thread/process id registers
 	 */
 	ldr	r0, [r7, #(PCB_USER_PID_RW)]
 	mcr	p15, 0, r0, c13, c0, 2
 	ldr	r0, [r6, #(L_PRIVATE)]
 	mcr	p15, 0, r0, c13, c0, 3
 #endif
 #ifdef FPU_VFP
 	/*
 	 * If we have a VFP, we need to load FPEXC.
 	 */
-	ldr	r0, [r3, #(CI_VFP_ID)]
+	ldr	r0, [r5, #(CI_VFP_ID)]
 	cmp	r0, #0
 	ldrne	r0, [r7, #(PCB_VFP_FPEXC)]
 	vmsrne	fpexc, r0
 #endif
-	ldr	r5, [r6, #(L_PROC)]	/* fetch the proc for below */
+	/*
 	 * Check for restartable atomic sequences (RAS).
 	 */
 	ldr	r0, [r6, #(L_PROC)]	/* fetch the proc for ras_lookup */
 	ldr	r2, [r0, #(P_RASLIST)]
 	cmp	r2, #0			/* p->p_nras == 0? */
 	beq	.Lswitch_do_restore
 	/* we can use r8 since we haven't restored saved registers yet. */
 	ldr	r8, [r6, #(L_MD_TF)]	/* r1 = trapframe (used below) */
 	ldr	r1, [r8, #(TF_PC)]	/* second ras_lookup() arg */
 	bl	_C_LABEL(ras_lookup)
 	cmn	r0, #1			/* -1 means "not in a RAS" */
 	strne	r0, [r8, #(TF_PC)]
 	/* rem: r4 = old lwp */
 	/* rem: r5 = curcpu() */
 	/* rem: r6 = new lwp */
 	/* rem: r7 = new pcb */
 .Lswitch_do_restore:
 	/* Restore all the saved registers */
 #ifdef __XSCALE__
 	ldr	r8, [r7, #(PCB_R8)]
 	ldr	r9, [r7, #(PCB_R9)]
 	ldr	r10, [r7, #(PCB_R10)]
 	ldr	r11, [r7, #(PCB_R11)]
 	ldr	r12, [r7, #(PCB_R12)]
 	ldr	r13, [r7, #(PCB_KSP)]	/* sp */
 #elif defined(_ARM_ARCH_DWORD_OK)
 	ldrd	r8, r9, [r7, #(PCB_R8)]
 	ldrd	r10, r11, [r7, #(PCB_R10)]
 	ldrd	r12, r13, [r7, #(PCB_R12)]	/* sp */
 #else
 	add	r0, r7, #PCB_R8
 	ldmia	r0, {r8-r13}
 #endif
 	/* Record the old lwp for pmap_activate()'s benefit */
 #ifndef ARM_MMU_EXTENDED
-	str	r4, [r3, #CI_LASTLWP]
+	str	r4, [r5, #CI_LASTLWP]
 #endif
 	/* rem: r4 = old lwp */
 	/* rem: r5 = new lwp's proc */
 	/* rem: r6 = new lwp */
 	/* rem: r7 = new pcb */
 	/*
 	 * Check for restartable atomic sequences (RAS).
 	 */
 	ldr	r2, [r5, #(P_RASLIST)]
 	ldr	r1, [r6, #(L_MD_TF)]	/* r1 = trapframe (used below) */
 	teq	r2, #0			/* p->p_nras == 0? */
 	bne	.Lswitch_do_ras		/* no, check for one */
 .Lswitch_return:
 	/* cpu_switchto returns the old lwp */
 	mov	r0, r4
 	/* lwp_trampoline expects new lwp as it's second argument */
 	mov	r1, r6
 #ifdef _ARM_ARCH_7
 	clrex				/* cause any subsequent STREX* to fail */
 #endif
 	/*
 	 * Pull the registers that got pushed when cpu_switchto() was called,
 	 * and return.
 	 */
 	pop	{r4-r7, ip, pc}
 .Lswitch_do_ras:
 	ldr	r1, [r1, #(TF_PC)]	/* second ras_lookup() arg */
 	mov	r0, r5			/* first ras_lookup() arg */
 	bl	_C_LABEL(ras_lookup)
 	cmn	r0, #1			/* -1 means "not in a RAS" */
 	ldrne	r1, [r6, #(L_MD_TF)]
 	strne	r0, [r1, #(TF_PC)]
 	b	.Lswitch_return
 END(cpu_switchto)
 ENTRY_NP(lwp_trampoline)
 	/*
 	 * cpu_switchto gives us:
 	 *	arg0(r0) = old lwp
 	 *	arg1(r1) = new lwp
 	 * setup by cpu_lwp_fork:
 	 *	r4 = func to call
 	 *	r5 = arg to func
 	 *	r6 = <unused>
 	 *	r7 = spsr mode
 	 */
 @@ -387,26 +388,35 @@ ENTRY_NP(softint_switch)
 	ldr	r2, [r4, #(L_PCB)]		/* get old lwp's pcb */
 	/* Save all the registers into the old lwp's pcb */
 #if defined(__XSCALE__) || defined(_ARM_ARCH_6)
 	strd	r8, r9, [r2, #(PCB_R8)]
 	strd	r10, r11, [r2, #(PCB_R10)]
 	strd	r12, r13, [r2, #(PCB_R12)]
 #else
 	add	r3, r2, #(PCB_R8)
 	stmia	r3, {r8-r13}
 #endif
 #ifdef _ARM_ARCH_6
 	/*
 	 * Save user read/write thread/process id register in cause it was
 	 * set in userland.
 	 */
 	mrc	p15, 0, r0, c13, c0, 2
 	str	r0, [r2, #(PCB_USER_PID_RW)]
 #endif
 	/* this is an invariant so load before disabling intrs */
 	ldr	r2, [r5, #(L_PCB)]	/* get new lwp's pcb */
 #ifndef __HAVE_UNNESTED_INTRS
 	IRQdisable
 #endif
 	/*
 	 * We're switching to a bound LWP so its l_cpu is already correct.
 	 */
 #if defined(TPIDRPRW_IS_CURLWP)
 	mcr	p15, 0, r5, c13, c0, 4		/* save new lwp */
 #endif
 	str	r5, [r7, #(CI_CURLWP)]		/* save new lwp */

 @@ -1,14 +1,14 @@
-#	$NetBSD: genassym.cf,v 1.69 2014/04/10 02:48:40 matt Exp $
+#	$NetBSD: genassym.cf,v 1.69.2.1 2015/03/27 11:27:39 martin Exp $
 # Copyright (c) 1982, 1990 The Regents of the University of California.
 # All rights reserved.
+#
 # This code is derived from software contributed to Berkeley by
 # William Jolitz.
+#
 # Redistribution and use in source and binary forms, with or without
 # modification, are permitted provided that the following conditions
 # are met:
 # 1. Redistributions of source code must retain the above copyright
 #    notice, this list of conditions and the following disclaimer.
 # 2. Redistributions in binary form must reproduce the above copyright
 @@ -146,30 +146,33 @@ define	PAGE_MASK		PAGE_MASK
 define	PAGE_SIZE		PAGE_SIZE
 define	UPAGES			UPAGES
 define	PGSHIFT			PGSHIFT
 # Important offsets into the lwp and proc structs & associated constants
 define	L_PCB			offsetof(struct lwp, l_addr)
 define	L_CPU			offsetof(struct lwp, l_cpu)
 define	L_PRIORITY		offsetof(struct lwp, l_priority)
 define	L_WCHAN			offsetof(struct lwp, l_wchan)
 define	L_STAT			offsetof(struct lwp, l_stat)
 define	L_PROC			offsetof(struct lwp, l_proc)
 define	L_CTXSWTCH		offsetof(struct lwp, l_ctxswtch)
 define	L_PRIVATE		offsetof(struct lwp, l_private)
 define	L_FLAG			offsetof(struct lwp, l_flag)
 define	L_MD_FLAGS		offsetof(struct lwp, l_md.md_flags)
 define	L_MD_TF			offsetof(struct lwp, l_md.md_tf)
 define	MDLWP_NOALIGNFLT	MDLWP_NOALIGNFLT
 define	LW_SYSTEM		LW_SYSTEM
 define	P_RASLIST		offsetof(struct proc, p_raslist)
 define	PCB_R8			offsetof(struct pcb, pcb_un.un_32.pcb32_r8)
 define	PCB_R9			offsetof(struct pcb, pcb_un.un_32.pcb32_r9)
 define	PCB_R10			offsetof(struct pcb, pcb_un.un_32.pcb32_r10)
 define	PCB_R11			offsetof(struct pcb, pcb_un.un_32.pcb32_r11)
 define	PCB_R12			offsetof(struct pcb, pcb_un.un_32.pcb32_r12)
 define	PCB_KSP			offsetof(struct pcb, pcb_un.un_32.pcb32_sp)
 define	PCB_LR			offsetof(struct pcb, pcb_un.un_32.pcb32_lr)
 define	PCB_PC			offsetof(struct pcb, pcb_un.un_32.pcb32_pc)
 define	PCB_USER_PID_RW		offsetof(struct pcb, pcb_un.un_32.pcb32_user_pid_rw)
 define	PCB_ONFAULT		offsetof(struct pcb, pcb_onfault)
 define	PCB_VFP_FPEXC		offsetof(struct pcb, pcb_vfp.vfp_fpexc)