Tue Apr 14 22:36:54 2015 UTC ()
__HAVE_PREEEMPTION -> __HAVE_PREEMPTION


(jmcneill)
diff -r1.1 -r1.2 src/sys/arch/aarch64/aarch64/cpu_machdep.c
diff -r1.26 -r1.27 src/sys/arch/arm/arm/ast.c
diff -r1.88 -r1.89 src/sys/arch/arm/include/cpu.h
diff -r1.32 -r1.33 src/sys/arch/arm/pic/pic.c
diff -r1.7 -r1.8 src/sys/arch/mips/mips/ipifuncs.c
diff -r1.32 -r1.33 src/sys/arch/powerpc/booke/e500_intr.c

cvs diff -r1.1 -r1.2 src/sys/arch/aarch64/aarch64/cpu_machdep.c (expand / switch to unified diff)

--- src/sys/arch/aarch64/aarch64/cpu_machdep.c 2014/08/10 05:47:37 1.1
+++ src/sys/arch/aarch64/aarch64/cpu_machdep.c 2015/04/14 22:36:54 1.2
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: cpu_machdep.c,v 1.1 2014/08/10 05:47:37 matt Exp $ */ 1/* $NetBSD: cpu_machdep.c,v 1.2 2015/04/14 22:36:54 jmcneill Exp $ */
2 2
3/*- 3/*-
4 * Copyright (c) 2014 The NetBSD Foundation, Inc. 4 * Copyright (c) 2014 The NetBSD Foundation, Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * This code is derived from software contributed to The NetBSD Foundation 7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Matt Thomas of 3am Software Foundry. 8 * by Matt Thomas of 3am Software Foundry.
9 * 9 *
10 * Redistribution and use in source and binary forms, with or without 10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions 11 * modification, are permitted provided that the following conditions
12 * are met: 12 * are met:
13 * 1. Redistributions of source code must retain the above copyright 13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer. 14 * notice, this list of conditions and the following disclaimer.
@@ -21,27 +21,27 @@ @@ -21,27 +21,27 @@
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE. 29 * POSSIBILITY OF SUCH DAMAGE.
30 */ 30 */
31 31
32#include <sys/cdefs.h> 32#include <sys/cdefs.h>
33 33
34__KERNEL_RCSID(1, "$NetBSD: cpu_machdep.c,v 1.1 2014/08/10 05:47:37 matt Exp $"); 34__KERNEL_RCSID(1, "$NetBSD: cpu_machdep.c,v 1.2 2015/04/14 22:36:54 jmcneill Exp $");
35 35
36#include "opt_pic.h" 36#include "opt_pic.h"
37 37
38#include <sys/param.h> 38#include <sys/param.h>
39#include <sys/types.h> 39#include <sys/types.h>
40#include <sys/atomic.h> 40#include <sys/atomic.h>
41#include <sys/cpu.h> 41#include <sys/cpu.h>
42#include <sys/intr.h> 42#include <sys/intr.h>
43#include <sys/kmem.h> 43#include <sys/kmem.h>
44#include <sys/xcall.h> 44#include <sys/xcall.h>
45 45
46#include <aarch64/locore.h> 46#include <aarch64/locore.h>
47#include <aarch64/pcb.h> 47#include <aarch64/pcb.h>
@@ -102,27 +102,27 @@ softint_init_md(lwp_t *l, u_int level, u @@ -102,27 +102,27 @@ softint_init_md(lwp_t *l, u_int level, u
102void 102void
103dosoftints(void) 103dosoftints(void)
104{ 104{
105 struct cpu_info * const ci = curcpu(); 105 struct cpu_info * const ci = curcpu();
106 const int opl = ci->ci_cpl; 106 const int opl = ci->ci_cpl;
107 const uint32_t softiplmask = SOFTIPLMASK(opl); 107 const uint32_t softiplmask = SOFTIPLMASK(opl);
108 108
109 splhigh(); 109 splhigh();
110 for (;;) { 110 for (;;) {
111 u_int softints = ci->ci_softints & softiplmask; 111 u_int softints = ci->ci_softints & softiplmask;
112 KASSERT((softints != 0) == ((ci->ci_softints >> opl) != 0)); 112 KASSERT((softints != 0) == ((ci->ci_softints >> opl) != 0));
113 KASSERT(opl == IPL_NONE || (softints & (1 << (opl - IPL_SOFTCLOCK))) == 0); 113 KASSERT(opl == IPL_NONE || (softints & (1 << (opl - IPL_SOFTCLOCK))) == 0);
114 if (softints == 0) { 114 if (softints == 0) {
115#ifdef __HAVE_PREEEMPTION 115#ifdef __HAVE_PREEMPTION
116 if (ci->ci_want_resched & RESCHED_KPREEMPT) { 116 if (ci->ci_want_resched & RESCHED_KPREEMPT) {
117 ci->ci_want_resched &= ~RESCHED_KPREEMPT; 117 ci->ci_want_resched &= ~RESCHED_KPREEMPT;
118 splsched(); 118 splsched();
119 kpreempt(-2); 119 kpreempt(-2);
120 } 120 }
121#endif 121#endif
122 splx(opl); 122 splx(opl);
123 return; 123 return;
124 } 124 }
125#define DOSOFTINT(n) \ 125#define DOSOFTINT(n) \
126 if (ci->ci_softints & (1 << (IPL_SOFT ## n - IPL_SOFTCLOCK))) { \ 126 if (ci->ci_softints & (1 << (IPL_SOFT ## n - IPL_SOFTCLOCK))) { \
127 ci->ci_softints &= \ 127 ci->ci_softints &= \
128 ~(1 << (IPL_SOFT ## n - IPL_SOFTCLOCK)); \ 128 ~(1 << (IPL_SOFT ## n - IPL_SOFTCLOCK)); \
@@ -322,27 +322,27 @@ cpu_kpreempt_enter(uintptr_t where, int  @@ -322,27 +322,27 @@ cpu_kpreempt_enter(uintptr_t where, int
322 * IPL_NONE so of course we call be preempted). 322 * IPL_NONE so of course we call be preempted).
323 */ 323 */
324 return true; 324 return true;
325 } 325 }
326 /* 326 /*
327 * We are called from KPREEMPT_ENABLE(). If we are at IPL_NONE, 327 * We are called from KPREEMPT_ENABLE(). If we are at IPL_NONE,
328 * of course we can be preempted. If we aren't, ask for a 328 * of course we can be preempted. If we aren't, ask for a
329 * softint so that kern_intr can call kpreempt. 329 * softint so that kern_intr can call kpreempt.
330 */ 330 */
331 if (s == IPL_NONE) { 331 if (s == IPL_NONE) {
332 KASSERT(curcpu()->ci_mtx_count == 0); 332 KASSERT(curcpu()->ci_mtx_count == 0);
333 return true; 333 return true;
334 } 334 }
335 atomic_or_uint(curcpu()->ci_want_resched, RESCHED_KPREEEMPT); 335 atomic_or_uint(curcpu()->ci_want_resched, RESCHED_KPREEMPT);
336#endif 336#endif
337 return false; 337 return false;
338} 338}
339 339
340void 340void
341cpu_kpreempt_exit(uintptr_t where) 341cpu_kpreempt_exit(uintptr_t where)
342{ 342{
343 343
344 /* do nothing */ 344 /* do nothing */
345} 345}
346 346
347/* 347/*
348 * Return true if preemption is disabled for MD reasons. Must be called 348 * Return true if preemption is disabled for MD reasons. Must be called

cvs diff -r1.26 -r1.27 src/sys/arch/arm/arm/ast.c (expand / switch to unified diff)

--- src/sys/arch/arm/arm/ast.c 2015/04/08 18:10:08 1.26
+++ src/sys/arch/arm/arm/ast.c 2015/04/14 22:36:53 1.27
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: ast.c,v 1.26 2015/04/08 18:10:08 matt Exp $ */ 1/* $NetBSD: ast.c,v 1.27 2015/04/14 22:36:53 jmcneill Exp $ */
2 2
3/* 3/*
4 * Copyright (c) 1994,1995 Mark Brinicombe 4 * Copyright (c) 1994,1995 Mark Brinicombe
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * Redistribution and use in source and binary forms, with or without 7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions 8 * modification, are permitted provided that the following conditions
9 * are met: 9 * are met:
10 * 1. Redistributions of source code must retain the above copyright 10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer. 11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright 12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the 13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution. 14 * documentation and/or other materials provided with the distribution.
@@ -31,27 +31,27 @@ @@ -31,27 +31,27 @@
31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 * SUCH DAMAGE. 32 * SUCH DAMAGE.
33 * 33 *
34 * RiscBSD kernel project 34 * RiscBSD kernel project
35 * 35 *
36 * ast.c 36 * ast.c
37 * 37 *
38 * Code to handle ast's and returns to user mode 38 * Code to handle ast's and returns to user mode
39 * 39 *
40 * Created : 11/10/94 40 * Created : 11/10/94
41 */ 41 */
42 42
43#include <sys/cdefs.h> 43#include <sys/cdefs.h>
44__KERNEL_RCSID(0, "$NetBSD: ast.c,v 1.26 2015/04/08 18:10:08 matt Exp $"); 44__KERNEL_RCSID(0, "$NetBSD: ast.c,v 1.27 2015/04/14 22:36:53 jmcneill Exp $");
45 45
46#include "opt_ddb.h" 46#include "opt_ddb.h"
47 47
48#include <sys/param.h> 48#include <sys/param.h>
49#include <sys/cpu.h> 49#include <sys/cpu.h>
50#include <sys/proc.h> 50#include <sys/proc.h>
51#include <sys/acct.h> 51#include <sys/acct.h>
52#include <sys/systm.h> 52#include <sys/systm.h>
53#include <sys/atomic.h> 53#include <sys/atomic.h>
54#include <sys/kernel.h> 54#include <sys/kernel.h>
55#include <sys/signal.h> 55#include <sys/signal.h>
56#include <sys/userret.h> 56#include <sys/userret.h>
57#include <sys/vmmeter.h> 57#include <sys/vmmeter.h>
@@ -113,41 +113,41 @@ ast(struct trapframe *tf) @@ -113,41 +113,41 @@ ast(struct trapframe *tf)
113 113
114#ifdef acorn26 114#ifdef acorn26
115 /* Enable interrupts if they were enabled before the trap. */ 115 /* Enable interrupts if they were enabled before the trap. */
116 if ((tf->tf_r15 & R15_IRQ_DISABLE) == 0) 116 if ((tf->tf_r15 & R15_IRQ_DISABLE) == 0)
117 int_on(); 117 int_on();
118#else 118#else
119 /* Interrupts were restored by exception_exit. */ 119 /* Interrupts were restored by exception_exit. */
120#endif 120#endif
121 121
122#ifdef __PROG32 122#ifdef __PROG32
123 KASSERT(VALID_R15_PSR(tf->tf_pc, tf->tf_spsr)); 123 KASSERT(VALID_R15_PSR(tf->tf_pc, tf->tf_spsr));
124#endif 124#endif
125 125
126#ifdef __HAVE_PREEEMPTION 126#ifdef __HAVE_PREEMPTION
127 kpreempt_disable(); 127 kpreempt_disable();
128#endif 128#endif
129 struct cpu_info * const ci = curcpu(); 129 struct cpu_info * const ci = curcpu();
130 130
131 ci->ci_data.cpu_ntrap++; 131 ci->ci_data.cpu_ntrap++;
132 132
133 KDASSERT(ci->ci_cpl == IPL_NONE); 133 KDASSERT(ci->ci_cpl == IPL_NONE);
134#ifdef __HAVE_PREEEMPTION 134#ifdef __HAVE_PREEMPTION
135 atomic_and_uint(&ci->ci_astpending, ~__BIT(0)); 135 atomic_and_uint(&ci->ci_astpending, ~__BIT(0));
136#else 136#else
137 ci->ci_astpending = 0; 137 ci->ci_astpending = 0;
138#endif 138#endif
139 const int want_resched = ci->ci_want_resched; 139 const int want_resched = ci->ci_want_resched;
140#ifdef __HAVE_PREEEMPTION 140#ifdef __HAVE_PREEMPTION
141 kpreempt_enable(); 141 kpreempt_enable();
142#endif 142#endif
143 143
144 if (l->l_pflag & LP_OWEUPC) { 144 if (l->l_pflag & LP_OWEUPC) {
145 l->l_pflag &= ~LP_OWEUPC; 145 l->l_pflag &= ~LP_OWEUPC;
146 ADDUPROF(l); 146 ADDUPROF(l);
147 } 147 }
148 148
149 /* Allow a forced task switch. */ 149 /* Allow a forced task switch. */
150 if (want_resched) 150 if (want_resched)
151 preempt(); 151 preempt();
152 userret(l); 152 userret(l);
153} 153}

cvs diff -r1.88 -r1.89 src/sys/arch/arm/include/cpu.h (expand / switch to unified diff)

--- src/sys/arch/arm/include/cpu.h 2015/04/08 20:42:09 1.88
+++ src/sys/arch/arm/include/cpu.h 2015/04/14 22:36:54 1.89
@@ -209,27 +209,27 @@ static inline struct cpu_info *lwp_getcp @@ -209,27 +209,27 @@ static inline struct cpu_info *lwp_getcp
209// curcpu() expands into two instructions: a mrc and a ldr 209// curcpu() expands into two instructions: a mrc and a ldr
210#define curcpu() lwp_getcpu(_curlwp()) 210#define curcpu() lwp_getcpu(_curlwp())
211#elif defined(TPIDRPRW_IS_CURCPU) 211#elif defined(TPIDRPRW_IS_CURCPU)
212#ifdef __HAVE_PREEMPTION 212#ifdef __HAVE_PREEMPTION
213#error __HAVE_PREEMPTION requires TPIDRPRW_IS_CURLWP 213#error __HAVE_PREEMPTION requires TPIDRPRW_IS_CURLWP
214#endif 214#endif
215static inline struct cpu_info * 215static inline struct cpu_info *
216curcpu(void) 216curcpu(void)
217{ 217{
218 return (struct cpu_info *) armreg_tpidrprw_read(); 218 return (struct cpu_info *) armreg_tpidrprw_read();
219} 219}
220#elif !defined(MULTIPROCESSOR) 220#elif !defined(MULTIPROCESSOR)
221#define curcpu() (&cpu_info_store) 221#define curcpu() (&cpu_info_store)
222#elif !defined(__HAVE_PREEEMPTION) 222#elif !defined(__HAVE_PREEMPTION)
223#error MULTIPROCESSOR && !__HAVE_PREEMPTION requires TPIDRPRW_IS_CURCPU or TPIDRPRW_IS_CURLWP 223#error MULTIPROCESSOR && !__HAVE_PREEMPTION requires TPIDRPRW_IS_CURCPU or TPIDRPRW_IS_CURLWP
224#else 224#else
225#error MULTIPROCESSOR && __HAVE_PREEMPTION requires TPIDRPRW_IS_CURLWP 225#error MULTIPROCESSOR && __HAVE_PREEMPTION requires TPIDRPRW_IS_CURLWP
226#endif /* !TPIDRPRW_IS_CURCPU && !TPIDRPRW_IS_CURLWP */ 226#endif /* !TPIDRPRW_IS_CURCPU && !TPIDRPRW_IS_CURLWP */
227 227
228#ifndef curlwp 228#ifndef curlwp
229#define curlwp (curcpu()->ci_curlwp) 229#define curlwp (curcpu()->ci_curlwp)
230#endif 230#endif
231 231
232#define CPU_INFO_ITERATOR int 232#define CPU_INFO_ITERATOR int
233#if defined(MULTIPROCESSOR) 233#if defined(MULTIPROCESSOR)
234extern struct cpu_info *cpu_info[]; 234extern struct cpu_info *cpu_info[];
235#define cpu_number() (curcpu()->ci_index) 235#define cpu_number() (curcpu()->ci_index)

cvs diff -r1.32 -r1.33 src/sys/arch/arm/pic/pic.c (expand / switch to unified diff)

--- src/sys/arch/arm/pic/pic.c 2015/04/12 15:32:19 1.32
+++ src/sys/arch/arm/pic/pic.c 2015/04/14 22:36:54 1.33
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: pic.c,v 1.32 2015/04/12 15:32:19 matt Exp $ */ 1/* $NetBSD: pic.c,v 1.33 2015/04/14 22:36:54 jmcneill Exp $ */
2/*- 2/*-
3 * Copyright (c) 2008 The NetBSD Foundation, Inc. 3 * Copyright (c) 2008 The NetBSD Foundation, Inc.
4 * All rights reserved. 4 * All rights reserved.
5 * 5 *
6 * This code is derived from software contributed to The NetBSD Foundation 6 * This code is derived from software contributed to The NetBSD Foundation
7 * by Matt Thomas. 7 * by Matt Thomas.
8 * 8 *
9 * Redistribution and use in source and binary forms, with or without 9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions 10 * modification, are permitted provided that the following conditions
11 * are met: 11 * are met:
12 * 1. Redistributions of source code must retain the above copyright 12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer. 13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright 14 * 2. Redistributions in binary form must reproduce the above copyright
@@ -23,27 +23,27 @@ @@ -23,27 +23,27 @@
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE. 28 * POSSIBILITY OF SUCH DAMAGE.
29 */ 29 */
30 30
31#define _INTR_PRIVATE 31#define _INTR_PRIVATE
32#include "opt_ddb.h" 32#include "opt_ddb.h"
33#include "opt_multiprocessor.h" 33#include "opt_multiprocessor.h"
34 34
35#include <sys/cdefs.h> 35#include <sys/cdefs.h>
36__KERNEL_RCSID(0, "$NetBSD: pic.c,v 1.32 2015/04/12 15:32:19 matt Exp $"); 36__KERNEL_RCSID(0, "$NetBSD: pic.c,v 1.33 2015/04/14 22:36:54 jmcneill Exp $");
37 37
38#include <sys/param.h> 38#include <sys/param.h>
39#include <sys/atomic.h> 39#include <sys/atomic.h>
40#include <sys/cpu.h> 40#include <sys/cpu.h>
41#include <sys/evcnt.h> 41#include <sys/evcnt.h>
42#include <sys/intr.h> 42#include <sys/intr.h>
43#include <sys/kernel.h> 43#include <sys/kernel.h>
44#include <sys/kmem.h> 44#include <sys/kmem.h>
45#include <sys/xcall.h> 45#include <sys/xcall.h>
46#include <sys/ipi.h> 46#include <sys/ipi.h>
47 47
48#if defined(__arm__) 48#if defined(__arm__)
49#include <arm/armreg.h> 49#include <arm/armreg.h>
@@ -546,27 +546,27 @@ pic_do_pending_ints(register_t psw, int  @@ -546,27 +546,27 @@ pic_do_pending_ints(register_t psw, int
546 KASSERT(ipl < NIPL); 546 KASSERT(ipl < NIPL);
547 if (ipl <= newipl) 547 if (ipl <= newipl)
548 break; 548 break;
549 549
550 pic_set_priority(ci, ipl); 550 pic_set_priority(ci, ipl);
551 pic_list_deliver_irqs(pend, psw, ipl, frame); 551 pic_list_deliver_irqs(pend, psw, ipl, frame);
552 pic_list_unblock_irqs(pend); 552 pic_list_unblock_irqs(pend);
553 } 553 }
554 } 554 }
555#ifdef MULTIPROCESSOR 555#ifdef MULTIPROCESSOR
556 percpu_putref(pic_pending_percpu); 556 percpu_putref(pic_pending_percpu);
557#endif 557#endif
558#endif /* __HAVE_PIC_PENDING_INTRS */ 558#endif /* __HAVE_PIC_PENDING_INTRS */
559#ifdef __HAVE_PREEEMPTION 559#ifdef __HAVE_PREEMPTION
560 if (newipl == IPL_NONE && (ci->ci_astpending & __BIT(1))) { 560 if (newipl == IPL_NONE && (ci->ci_astpending & __BIT(1))) {
561 pic_set_priority(ci, IPL_SCHED); 561 pic_set_priority(ci, IPL_SCHED);
562 kpreempt(0); 562 kpreempt(0);
563 } 563 }
564#endif 564#endif
565 if (ci->ci_cpl != newipl) 565 if (ci->ci_cpl != newipl)
566 pic_set_priority(ci, newipl); 566 pic_set_priority(ci, newipl);
567} 567}
568 568
569static void 569static void
570pic_percpu_allocate(void *v0, void *v1, struct cpu_info *ci) 570pic_percpu_allocate(void *v0, void *v1, struct cpu_info *ci)
571{ 571{
572 struct pic_percpu * const pcpu = v0; 572 struct pic_percpu * const pcpu = v0;

cvs diff -r1.7 -r1.8 src/sys/arch/mips/mips/ipifuncs.c (expand / switch to unified diff)

--- src/sys/arch/mips/mips/ipifuncs.c 2014/05/19 22:47:53 1.7
+++ src/sys/arch/mips/mips/ipifuncs.c 2015/04/14 22:36:53 1.8
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: ipifuncs.c,v 1.7 2014/05/19 22:47:53 rmind Exp $ */ 1/* $NetBSD: ipifuncs.c,v 1.8 2015/04/14 22:36:53 jmcneill Exp $ */
2 2
3/*- 3/*-
4 * Copyright (c) 2010 The NetBSD Foundation, Inc. 4 * Copyright (c) 2010 The NetBSD Foundation, Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * This code is derived from software contributed to The NetBSD Foundation 7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Matt Thomas of 3am Software Foundry. 8 * by Matt Thomas of 3am Software Foundry.
9 * 9 *
10 * Redistribution and use in source and binary forms, with or without 10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions 11 * modification, are permitted provided that the following conditions
12 * are met: 12 * are met:
13 * 1. Redistributions of source code must retain the above copyright 13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer. 14 * notice, this list of conditions and the following disclaimer.
@@ -22,27 +22,27 @@ @@ -22,27 +22,27 @@
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE. 29 * POSSIBILITY OF SUCH DAMAGE.
30 */ 30 */
31 31
32#include "opt_ddb.h" 32#include "opt_ddb.h"
33 33
34#include <sys/cdefs.h> 34#include <sys/cdefs.h>
35__KERNEL_RCSID(0, "$NetBSD: ipifuncs.c,v 1.7 2014/05/19 22:47:53 rmind Exp $"); 35__KERNEL_RCSID(0, "$NetBSD: ipifuncs.c,v 1.8 2015/04/14 22:36:53 jmcneill Exp $");
36 36
37#include <sys/param.h> 37#include <sys/param.h>
38#include <sys/cpu.h> 38#include <sys/cpu.h>
39#include <sys/device.h> 39#include <sys/device.h>
40#include <sys/intr.h> 40#include <sys/intr.h>
41#include <sys/xcall.h> 41#include <sys/xcall.h>
42#include <sys/ipi.h> 42#include <sys/ipi.h>
43 43
44#include <uvm/uvm_extern.h> 44#include <uvm/uvm_extern.h>
45 45
46#include <mips/cache.h> 46#include <mips/cache.h>
47#include <mips/cpuset.h> 47#include <mips/cpuset.h>
48#ifdef DDB 48#ifdef DDB
@@ -74,27 +74,27 @@ ipi_nop(struct cpu_info *ci) @@ -74,27 +74,27 @@ ipi_nop(struct cpu_info *ci)
74 74
75static void 75static void
76ipi_shootdown(struct cpu_info *ci) 76ipi_shootdown(struct cpu_info *ci)
77{ 77{
78 pmap_tlb_shootdown_process(); 78 pmap_tlb_shootdown_process();
79} 79}
80 80
81static inline void 81static inline void
82ipi_syncicache(struct cpu_info *ci) 82ipi_syncicache(struct cpu_info *ci)
83{ 83{
84 pmap_tlb_syncicache_wanted(ci); 84 pmap_tlb_syncicache_wanted(ci);
85} 85}
86 86
87#ifdef __HAVE_PREEEMPTION 87#ifdef __HAVE_PREEMPTION
88static inline void 88static inline void
89ipi_kpreempt(struct cpu_info *ci) 89ipi_kpreempt(struct cpu_info *ci)
90{ 90{
91 softint_trigger(SOFTINT_KPREEMPT); 91 softint_trigger(SOFTINT_KPREEMPT);
92} 92}
93#endif 93#endif
94 94
95/* 95/*
96 * Process cpu stop-self event. 96 * Process cpu stop-self event.
97 * XXX could maybe add/use locoresw halt function? 97 * XXX could maybe add/use locoresw halt function?
98 */ 98 */
99static void 99static void
100ipi_halt(void) 100ipi_halt(void)

cvs diff -r1.32 -r1.33 src/sys/arch/powerpc/booke/e500_intr.c (expand / switch to unified diff)

--- src/sys/arch/powerpc/booke/e500_intr.c 2015/01/23 09:02:42 1.32
+++ src/sys/arch/powerpc/booke/e500_intr.c 2015/04/14 22:36:54 1.33
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: e500_intr.c,v 1.32 2015/01/23 09:02:42 nonaka Exp $ */ 1/* $NetBSD: e500_intr.c,v 1.33 2015/04/14 22:36:54 jmcneill Exp $ */
2/*- 2/*-
3 * Copyright (c) 2010, 2011 The NetBSD Foundation, Inc. 3 * Copyright (c) 2010, 2011 The NetBSD Foundation, Inc.
4 * All rights reserved. 4 * All rights reserved.
5 * 5 *
6 * This code is derived from software contributed to The NetBSD Foundation 6 * This code is derived from software contributed to The NetBSD Foundation
7 * by Raytheon BBN Technologies Corp and Defense Advanced Research Projects 7 * by Raytheon BBN Technologies Corp and Defense Advanced Research Projects
8 * Agency and which was developed by Matt Thomas of 3am Software Foundry. 8 * Agency and which was developed by Matt Thomas of 3am Software Foundry.
9 * 9 *
10 * This material is based upon work supported by the Defense Advanced Research 10 * This material is based upon work supported by the Defense Advanced Research
11 * Projects Agency and Space and Naval Warfare Systems Center, Pacific, under 11 * Projects Agency and Space and Naval Warfare Systems Center, Pacific, under
12 * Contract No. N66001-09-C-2073. 12 * Contract No. N66001-09-C-2073.
13 * Approved for Public Release, Distribution Unlimited 13 * Approved for Public Release, Distribution Unlimited
14 * 14 *
@@ -31,27 +31,27 @@ @@ -31,27 +31,27 @@
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 * POSSIBILITY OF SUCH DAMAGE. 34 * POSSIBILITY OF SUCH DAMAGE.
35 */ 35 */
36 36
37#include "opt_mpc85xx.h" 37#include "opt_mpc85xx.h"
38#include "opt_multiprocessor.h" 38#include "opt_multiprocessor.h"
39#include "opt_ddb.h" 39#include "opt_ddb.h"
40 40
41#define __INTR_PRIVATE 41#define __INTR_PRIVATE
42 42
43#include <sys/cdefs.h> 43#include <sys/cdefs.h>
44__KERNEL_RCSID(0, "$NetBSD: e500_intr.c,v 1.32 2015/01/23 09:02:42 nonaka Exp $"); 44__KERNEL_RCSID(0, "$NetBSD: e500_intr.c,v 1.33 2015/04/14 22:36:54 jmcneill Exp $");
45 45
46#include <sys/param.h> 46#include <sys/param.h>
47#include <sys/proc.h> 47#include <sys/proc.h>
48#include <sys/intr.h> 48#include <sys/intr.h>
49#include <sys/cpu.h> 49#include <sys/cpu.h>
50#include <sys/kmem.h> 50#include <sys/kmem.h>
51#include <sys/atomic.h> 51#include <sys/atomic.h>
52#include <sys/bus.h> 52#include <sys/bus.h>
53#include <sys/xcall.h> 53#include <sys/xcall.h>
54#include <sys/ipi.h> 54#include <sys/ipi.h>
55#include <sys/bitops.h> 55#include <sys/bitops.h>
56 56
57#include <uvm/uvm_extern.h> 57#include <uvm/uvm_extern.h>
@@ -1269,27 +1269,27 @@ e500_intr_cpu_send_ipi(cpuid_t target, u @@ -1269,27 +1269,27 @@ e500_intr_cpu_send_ipi(cpuid_t target, u
1269 KASSERTMSG(target == cpu_index(dst_ci), 1269 KASSERTMSG(target == cpu_index(dst_ci),
1270 "%s: target (%lu) != cpu_index(cpu%u)", 1270 "%s: target (%lu) != cpu_index(cpu%u)",
1271 __func__, target, cpu_index(dst_ci)); 1271 __func__, target, cpu_index(dst_ci));
1272 dstmask = (1 << target); 1272 dstmask = (1 << target);
1273 if (ipimsg) 1273 if (ipimsg)
1274 atomic_or_32(&dst_ci->ci_pending_ipis, ipimsg); 1274 atomic_or_32(&dst_ci->ci_pending_ipis, ipimsg);
1275 } 1275 }
1276 1276
1277 openpic_write(cpu, OPENPIC_IPIDR(0), dstmask); 1277 openpic_write(cpu, OPENPIC_IPIDR(0), dstmask);
1278} 1278}
1279 1279
1280typedef void (*ipifunc_t)(void); 1280typedef void (*ipifunc_t)(void);
1281 1281
1282#ifdef __HAVE_PREEEMPTION 1282#ifdef __HAVE_PREEMPTION
1283static void 1283static void
1284e500_ipi_kpreempt(void) 1284e500_ipi_kpreempt(void)
1285{ 1285{
1286 poowerpc_softint_trigger(1 << IPL_NONE); 1286 poowerpc_softint_trigger(1 << IPL_NONE);
1287} 1287}
1288#endif 1288#endif
1289 1289
1290static void 1290static void
1291e500_ipi_suspend(void) 1291e500_ipi_suspend(void)
1292{ 1292{
1293 1293
1294#ifdef MULTIPROCESSOR 1294#ifdef MULTIPROCESSOR
1295 cpu_pause(NULL); 1295 cpu_pause(NULL);