 @@ -1,14 +1,14 @@
-/*	$NetBSD: armadaxp_machdep.c,v 1.8 2014/03/29 15:00:07 matt Exp $	*/
+/*	$NetBSD: armadaxp_machdep.c,v 1.9 2015/04/15 10:15:40 hsuenaga Exp $	*/
 /*******************************************************************************
 Copyright (C) Marvell International Ltd. and its affiliates
 Developed by Semihalf
 ********************************************************************************
 Marvell BSD License
 If you received this File from Marvell, you may opt to use, redistribute and/or
 modify this File under the following licensing terms.
 Redistribution and use in source and binary forms, with or without modification,
 are permitted provided that the following conditions are met:
 @@ -27,27 +27,27 @@ THIS SOFTWARE IS PROVIDED BY THE COPYRIG
 ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
 WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
 DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
 ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
 LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
 ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
 SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *******************************************************************************/
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: armadaxp_machdep.c,v 1.8 2014/03/29 15:00:07 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: armadaxp_machdep.c,v 1.9 2015/04/15 10:15:40 hsuenaga Exp $");
 #include "opt_machdep.h"
 #include "opt_mvsoc.h"
 #include "opt_evbarm_boardtype.h"
 #include "opt_com.h"
 #include "opt_ddb.h"
 #include "opt_kgdb.h"
 #include "opt_pci.h"
 #include "opt_ipkdb.h"
 #include <sys/bus.h>
 #include <sys/param.h>
 #include <sys/device.h>
 @@ -90,36 +90,45 @@ __KERNEL_RCSID(0, "$NetBSD: armadaxp_mac
 #include <arm/marvell/mvsocvar.h>
 #include <arm/marvell/armadaxpreg.h>
 #include <evbarm/marvell/marvellreg.h>
 #include <evbarm/marvell/marvellvar.h>
 #include "mvpex.h"
 #include "com.h"
 #if NCOM > 0
 #include <dev/ic/comreg.h>
 #include <dev/ic/comvar.h>
 #endif
 #include <net/if_ether.h>
 /*
  * Address to call from cpu_reset() to reset the machine.
  * This is machine architecture dependent as it varies depending
  * on where the ROM appears when you turn the MMU off.
  */
 BootConfig bootconfig;		/* Boot config storage */
 char *boot_args = NULL;
 char *boot_file = NULL;
 /*
  * U-Boot argument buffer
  */
 extern unsigned int uboot_regs_pa[]; /* saved r0, r1, r2, r3 */
 unsigned int *uboot_regs_va;
 char boot_argbuf[MAX_BOOT_STRING];
 extern int KERNEL_BASE_phys[];
 /*
  * Put some bogus settings of the MEMSTART and MEMSIZE
  * if they are not defined in kernel configuration file.
  */
 #ifndef MEMSTART
 #define MEMSTART 0x00000000UL
 #endif
 #ifndef MEMSIZE
 #define MEMSIZE 0x40000000UL
 #endif
 @@ -383,26 +392,33 @@ initarm(void *arg)
 	bootconfig.dram[0].address = MEMSTART;
 	bootconfig.dram[0].pages = memsize / PAGE_SIZE;
         physical_start = bootconfig.dram[0].address;
         physical_end = physical_start + (bootconfig.dram[0].pages * PAGE_SIZE);
 	arm32_bootmem_init(0, physical_end, (uintptr_t) KERNEL_BASE_phys);
 	arm32_kernel_vm_init(KERNEL_VM_BASE, ARM_VECTORS_LOW, 0,
 	    devmap, mapallmem_p);
 	/* we've a specific device_register routine */
 	evbarm_device_register = axp_device_register;
 	/* copy U-Boot args from U-Boot heap to kernel memory */
 	uboot_regs_va = (int *)((unsigned int)uboot_regs_pa + KERNEL_BASE);
 	boot_args = (char *)(uboot_regs_va[3] + KERNEL_BASE);
 	strlcpy(boot_argbuf, (char *)boot_args, sizeof(boot_argbuf));
 	boot_args = boot_argbuf;
 	parse_mi_bootargs(boot_args);
 	return initarm_common(KERNEL_VM_BASE, KERNEL_VM_SIZE, NULL, 0);
+}
 #ifndef CONSADDR
 #error Specify the address of the UART with the CONSADDR option.
 #endif
 #ifndef CONSPEED
 #define	CONSPEED B115200
 #endif
 #ifndef CONMODE
 #define	CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
 #endif
 #ifndef CONSFREQ
 @@ -574,15 +590,40 @@ axp_device_register(device_t dev, void *
 		KASSERT(pc != NULL);
 		prop_dictionary_set(dict, "pci-chipset", pc);
 		prop_object_release(pc);
 		marvell_startend_by_tag(iotag, &start, &end);
 		prop_dictionary_set_uint64(dict, "iostart", start);
 		prop_dictionary_set_uint64(dict, "ioend", end);
 		marvell_startend_by_tag(memtag, &start, &end);
 		prop_dictionary_set_uint64(dict, "memstart", start);
 		prop_dictionary_set_uint64(dict, "memend", end);
 		prop_dictionary_set_uint32(dict,
 		    "cache-line-size", arm_dcache_align);
+	}
 	if (device_is_a(dev, "mvgbec")) {
 		uint8_t enaddr[ETHER_ADDR_LEN];
 		char optname[9];
 		int unit = device_unit(dev);
 		if (unit > 9)
 			return;
 		switch (unit) {
 		case 0:
 			strlcpy(optname, "ethaddr", sizeof(optname));
 			break;
 		default:
 			/* eth1addr ... eth9addr */
 			snprintf(optname, sizeof(optname),
 			    "eth%daddr", unit);
 			break;
+		}
 		if (get_bootconf_option(boot_args, optname,
 		    BOOTOPT_TYPE_MACADDR, enaddr)) {
 			prop_data_t pd =
 			    prop_data_create_data(enaddr, sizeof(enaddr));
 			prop_dictionary_set(dict, "mac-address", pd);
+		}
+	}
 #endif
+}

 @@ -1,14 +1,14 @@
-/*	$NetBSD: armadaxp_start.S,v 1.3 2014/03/29 14:53:57 matt Exp $	*/
+/*	$NetBSD: armadaxp_start.S,v 1.4 2015/04/15 10:15:40 hsuenaga Exp $	*/
 /*******************************************************************************
 Copyright (C) Marvell International Ltd. and its affiliates
 Developed by Semihalf
 ********************************************************************************
 Marvell BSD License
 If you received this File from Marvell, you may opt to use, redistribute and/or
 modify this File under the following licensing terms.
 Redistribution and use in source and binary forms, with or without modification,
 are permitted provided that the following conditions are met:
 @@ -34,27 +34,27 @@ ANY THEORY OF LIABILITY, WHETHER IN CONT
 (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
 SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *******************************************************************************/
 #include "opt_cputypes.h"
 #include <machine/asm.h>
 #include <arm/armreg.h>
 #include <evbarm/marvell/marvellreg.h>
 #include <evbarm/marvell/marvellvar.h>
 #include "assym.h"
-RCSID("$NetBSD: armadaxp_start.S,v 1.3 2014/03/29 14:53:57 matt Exp $")
+RCSID("$NetBSD: armadaxp_start.S,v 1.4 2015/04/15 10:15:40 hsuenaga Exp $")
 #ifdef KERNEL_BASES_EQUAL
 #error KERNEL_BASE_VIRT should not equal KERNEL_BASE_PHYS
 #endif
 /*
  * We don't want to hard-code some basic things like RAM start etc.
  * Hence, it is important to set the following options to resanoable values
  * in std.armadaxp configuration file.
  */
 #if !defined(STARTUP_PAGETABLE_ADDR)
 #error STARTUP_PAGETABLE_ADDR not defined. Please define it in std.armadaxp
 #elif !defined(MEMSTART)
 @@ -68,26 +68,30 @@ _C_LABEL(armadaxp_start):
 	/* Move into supervisor mode and disable IRQs/FIQs. */
 	cpsid	if, #PSR_SVC32_MODE
 	/* Disable MMU for a while */
 	mrc     p15, 0, r2, c1, c0, 0
 	movw	r1, #(CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_DC_ENABLE |\
 	    CPU_CONTROL_WBUF_ENABLE | CPU_CONTROL_IC_ENABLE |\
 	    CPU_CONTROL_BPRD_ENABLE)
 	bic	r2, r2, r1
 	mcr	p15, 0, r2, c1, c0, 0
 	dsb
 	isb
 	/* Save U-Boot arguments */
 	adr	r4, uboot_regs_pa
 	stmia	r4!, {r0, r1, r2, r3}
 	/* build page table from scratch */
 	movw	r0, #:lower16:STARTUP_PAGETABLE_ADDR
 	movt	r0, #:upper16:STARTUP_PAGETABLE_ADDR
 	adr	r4, mmu_init_table
 	b	3f
 :	str	r3, [r0, r2]
 	add	r2, r2, #4
 	add	r3, r3, #(L1_S_SIZE)
 	adds	r1, r1, #-1
 	bhi	2b
 :
 	ldmia	r4!, {r1,r2,r3}   /* # of sections, VA, PA|attr */
 @@ -123,26 +127,30 @@ _C_LABEL(armadaxp_start):
 #endif
 	orr	r0, r0, r1
 	mcr	p15, 0, r0, c1, c0, 0
 	isb
 	dsb
 	/* Jump to kernel code in TRUE VA */
 	movw	ip, #:lower16:start
 	movt	ip, #:upper16:start
 	bx	ip
 	/* NOTREACHED */
 	.global _C_LABEL(uboot_regs_pa)
 uboot_regs_pa:
 	.space	16 /* r0, r1, r2, r3 */
 #define MMU_INIT(va,pa,n_sec,attr) \
 	.word	n_sec					; \
 	.word	4*((va)>>L1_S_SHIFT)			; \
 	.word	(pa)|(attr)				;
 mmu_init_table:
 	/* fill all table VA==PA */
 	/* map SDRAM VA==PA, WT cacheable */
 	MMU_INIT(MEMSTART, MEMSTART, 64, L1_TYPE_S|L1_S_C|L1_S_AP_KRW)
 	/* map VA 0x80000000..0x83ffffff to PA */
 	MMU_INIT(KERNEL_BASE_EXT, MEMSTART, 64, L1_TYPE_S|L1_S_C|L1_S_AP_KRW)

 @@ -1,41 +1,41 @@
-/*	$NetBSD: if_mvgbe.c,v 1.40 2015/04/13 16:33:24 riastradh Exp $	*/
+/*	$NetBSD: if_mvgbe.c,v 1.41 2015/04/15 10:15:40 hsuenaga Exp $	*/
 /*
  * Copyright (c) 2007, 2008, 2013 KIYOHARA Takashi
  * All rights reserved.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
+ *
  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: if_mvgbe.c,v 1.40 2015/04/13 16:33:24 riastradh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_mvgbe.c,v 1.41 2015/04/15 10:15:40 hsuenaga Exp $");
 #include "opt_multiprocessor.h"
 #if defined MULTIPROCESSOR
 #warning Queue Management Method 'Counters' not support yet
 #endif
 #include <sys/param.h>
 #include <sys/bus.h>
 #include <sys/callout.h>
 #include <sys/device.h>
 #include <sys/endian.h>
 #include <sys/errno.h>
 @@ -664,56 +664,72 @@ mvgbec_wininit(struct mvgbec_softc *sc,
 	/* allow to access decode window */
 	MVGBE_WRITE(sc, MVGBE_EPAP, ac);
 	MVGBE_WRITE(sc, MVGBE_BARE, en);
+}
 /* ARGSUSED */
 static int
 mvgbe_match(device_t parent, cfdata_t match, void *aux)
+{
 	struct marvell_attach_args *mva = aux;
 	uint32_t pbase, maddrh, maddrl;
 	prop_dictionary_t dict;
 	dict = device_properties(parent);
 	if (dict) {
 		if (prop_dictionary_get(dict, "mac-address"))
 			return 1;
+	}
 	pbase = MVGBE_PORTR_BASE + mva->mva_unit * MVGBE_PORTR_SIZE;
 	maddrh =
 	    bus_space_read_4(mva->mva_iot, mva->mva_ioh, pbase + MVGBE_MACAH);
 	maddrl =
 	    bus_space_read_4(mva->mva_iot, mva->mva_ioh, pbase + MVGBE_MACAL);
 	if ((maddrh | maddrl) == 0)
 		return 0;
 	return 1;
+}
 /* ARGSUSED */
 static void
 mvgbe_attach(device_t parent, device_t self, void *aux)
+{
 	struct mvgbec_softc *csc = device_private(parent);
 	struct mvgbe_softc *sc = device_private(self);
 	struct marvell_attach_args *mva = aux;
 	struct mvgbe_txmap_entry *entry;
 	prop_dictionary_t dict;
 	prop_data_t enaddrp;
 	struct ifnet *ifp;
 	bus_dma_segment_t seg;
 	bus_dmamap_t dmamap;
 	int rseg, i;
 	uint32_t maddrh, maddrl;
 	uint8_t enaddr[ETHER_ADDR_LEN];
 	void *kva;
 	aprint_naive("\n");
 	aprint_normal("\n");
 	dict = device_properties(parent);
 	if (dict)
 		enaddrp = prop_dictionary_get(dict, "mac-address");
 	else
 		enaddrp = NULL;
 	sc->sc_dev = self;
 	sc->sc_port = mva->mva_unit;
 	sc->sc_iot = mva->mva_iot;
 	callout_init(&sc->sc_tick_ch, 0);
 	callout_setfunc(&sc->sc_tick_ch, mvgbe_tick, sc);
 	if (bus_space_subregion(mva->mva_iot, mva->mva_ioh,
 	    MVGBE_PORTR_BASE + mva->mva_unit * MVGBE_PORTR_SIZE,
 	    MVGBE_PORTR_SIZE, &sc->sc_ioh)) {
 		aprint_error_dev(self, "Cannot map registers\n");
 		return;
+	}
 	if (bus_space_subregion(mva->mva_iot, mva->mva_ioh,
 	    MVGBE_PORTDAFR_BASE + mva->mva_unit * MVGBE_PORTDAFR_SIZE,
 @@ -741,26 +757,38 @@ mvgbe_attach(device_t parent, device_t s
 			return;
+		}
 		sc->sc_linkup.bit = MVGBE_PS0_LINKUP;
 		csc->sc_flags |= FLAGS_IPG2;
 	} else {
 		if (bus_space_subregion(mva->mva_iot, sc->sc_ioh,
 		    MVGBE_PS, sizeof(uint32_t), &sc->sc_linkup.ioh)) {
 			aprint_error_dev(self, "Cannot map linkup register\n");
 			return;
+		}
 		sc->sc_linkup.bit = MVGBE_PS_LINKUP;
+	}
 	if (enaddrp) {
 		memcpy(enaddr, prop_data_data_nocopy(enaddrp), ETHER_ADDR_LEN);
 		maddrh  = enaddr[0] << 24;
 		maddrh |= enaddr[1] << 16;
 		maddrh |= enaddr[2] << 8;
 		maddrh |= enaddr[3];
 		maddrl  = enaddr[4] << 8;
 		maddrl |= enaddr[5];
 		MVGBE_WRITE(sc, MVGBE_MACAH, maddrh);
 		MVGBE_WRITE(sc, MVGBE_MACAL, maddrl);
+	}
 	maddrh = MVGBE_READ(sc, MVGBE_MACAH);
 	maddrl = MVGBE_READ(sc, MVGBE_MACAL);
 	sc->sc_enaddr[0] = maddrh >> 24;
 	sc->sc_enaddr[1] = maddrh >> 16;
 	sc->sc_enaddr[2] = maddrh >> 8;
 	sc->sc_enaddr[3] = maddrh >> 0;
 	sc->sc_enaddr[4] = maddrl >> 8;
 	sc->sc_enaddr[5] = maddrl >> 0;
 	aprint_normal_dev(self, "Ethernet address %s\n",
 	    ether_sprintf(sc->sc_enaddr));
 	/* clear all ethernet port interrupts */
 	MVGBE_WRITE(sc, MVGBE_IC, 0);