Wed Jul 8 15:26:19 2015 UTC ()
aprint_verbose [sa]ctlr


(skrll)
diff -r1.109 -r1.110 src/sys/arch/arm/arm32/cpu.c

cvs diff -r1.109 -r1.110 src/sys/arch/arm/arm32/cpu.c (expand / switch to unified diff)

--- src/sys/arch/arm/arm32/cpu.c 2015/06/05 07:04:46 1.109
+++ src/sys/arch/arm/arm32/cpu.c 2015/07/08 15:26:19 1.110
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: cpu.c,v 1.109 2015/06/05 07:04:46 skrll Exp $ */ 1/* $NetBSD: cpu.c,v 1.110 2015/07/08 15:26:19 skrll Exp $ */
2 2
3/* 3/*
4 * Copyright (c) 1995 Mark Brinicombe. 4 * Copyright (c) 1995 Mark Brinicombe.
5 * Copyright (c) 1995 Brini. 5 * Copyright (c) 1995 Brini.
6 * All rights reserved. 6 * All rights reserved.
7 * 7 *
8 * Redistribution and use in source and binary forms, with or without 8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions 9 * modification, are permitted provided that the following conditions
10 * are met: 10 * are met:
11 * 1. Redistributions of source code must retain the above copyright 11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer. 12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright 13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the 14 * notice, this list of conditions and the following disclaimer in the
@@ -36,27 +36,27 @@ @@ -36,27 +36,27 @@
36 * 36 *
37 * cpu.c 37 * cpu.c
38 * 38 *
39 * Probing and configuration for the master CPU 39 * Probing and configuration for the master CPU
40 * 40 *
41 * Created : 10/10/95 41 * Created : 10/10/95
42 */ 42 */
43 43
44#include "opt_armfpe.h" 44#include "opt_armfpe.h"
45#include "opt_multiprocessor.h" 45#include "opt_multiprocessor.h"
46 46
47#include <sys/param.h> 47#include <sys/param.h>
48 48
49__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.109 2015/06/05 07:04:46 skrll Exp $"); 49__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.110 2015/07/08 15:26:19 skrll Exp $");
50 50
51#include <sys/systm.h> 51#include <sys/systm.h>
52#include <sys/conf.h> 52#include <sys/conf.h>
53#include <sys/cpu.h> 53#include <sys/cpu.h>
54#include <sys/device.h> 54#include <sys/device.h>
55#include <sys/kmem.h> 55#include <sys/kmem.h>
56#include <sys/proc.h> 56#include <sys/proc.h>
57 57
58#include <uvm/uvm_extern.h> 58#include <uvm/uvm_extern.h>
59 59
60#include <arm/locore.h> 60#include <arm/locore.h>
61#include <arm/undefined.h> 61#include <arm/undefined.h>
62 62
@@ -830,26 +830,28 @@ identify_features(device_t dv) @@ -830,26 +830,28 @@ identify_features(device_t dv)
830 if (__SHIFTOUT(cpu_memory_model_features[3], __BITS(23,20))) { 830 if (__SHIFTOUT(cpu_memory_model_features[3], __BITS(23,20))) {
831 /* 831 /*
832 * Updates to the translation tables do not require a clean 832 * Updates to the translation tables do not require a clean
833 * to the point of unification to ensure visibility by 833 * to the point of unification to ensure visibility by
834 * subsequent translation table walks. 834 * subsequent translation table walks.
835 */ 835 */
836 pmap_needs_pte_sync = 0; 836 pmap_needs_pte_sync = 0;
837 } 837 }
838#endif 838#endif
839 839
840 cpu_processor_features[0] = armreg_pfr0_read(); 840 cpu_processor_features[0] = armreg_pfr0_read();
841 cpu_processor_features[1] = armreg_pfr1_read(); 841 cpu_processor_features[1] = armreg_pfr1_read();
842 842
 843 aprint_verbose_dev(dv, "sctlr: %#x\n", armreg_sctlr_read());
 844 aprint_verbose_dev(dv, "actlr: %#x\n", armreg_auxctl_read());
843 aprint_verbose_dev(dv, "revidr: %#x\n", armreg_revidr_read()); 845 aprint_verbose_dev(dv, "revidr: %#x\n", armreg_revidr_read());
844#ifdef MULTIPROCESSOR 846#ifdef MULTIPROCESSOR
845 aprint_verbose_dev(dv, "mpidr: %#x\n", armreg_mpidr_read()); 847 aprint_verbose_dev(dv, "mpidr: %#x\n", armreg_mpidr_read());
846#endif 848#endif
847 aprint_verbose_dev(dv, 849 aprint_verbose_dev(dv,
848 "isar: [0]=%#x [1]=%#x [2]=%#x [3]=%#x, [4]=%#x, [5]=%#x\n", 850 "isar: [0]=%#x [1]=%#x [2]=%#x [3]=%#x, [4]=%#x, [5]=%#x\n",
849 cpu_instruction_set_attributes[0], 851 cpu_instruction_set_attributes[0],
850 cpu_instruction_set_attributes[1], 852 cpu_instruction_set_attributes[1],
851 cpu_instruction_set_attributes[2], 853 cpu_instruction_set_attributes[2],
852 cpu_instruction_set_attributes[3], 854 cpu_instruction_set_attributes[3],
853 cpu_instruction_set_attributes[4], 855 cpu_instruction_set_attributes[4],
854 cpu_instruction_set_attributes[5]); 856 cpu_instruction_set_attributes[5]);
855 aprint_verbose_dev(dv, 857 aprint_verbose_dev(dv,