| @@ -1,1159 +1,1157 @@ | | | @@ -1,1159 +1,1157 @@ |
1 | /* $NetBSD: if_wm.c,v 1.340 2015/07/21 03:15:50 knakahara Exp $ */ | | 1 | /* $NetBSD: if_wm.c,v 1.341 2015/07/22 08:22:55 knakahara Exp $ */ |
2 | | | 2 | |
3 | /* | | 3 | /* |
4 | * Copyright (c) 2001, 2002, 2003, 2004 Wasabi Systems, Inc. | | 4 | * Copyright (c) 2001, 2002, 2003, 2004 Wasabi Systems, Inc. |
5 | * All rights reserved. | | 5 | * All rights reserved. |
6 | * | | 6 | * |
7 | * Written by Jason R. Thorpe for Wasabi Systems, Inc. | | 7 | * Written by Jason R. Thorpe for Wasabi Systems, Inc. |
8 | * | | 8 | * |
9 | * Redistribution and use in source and binary forms, with or without | | 9 | * Redistribution and use in source and binary forms, with or without |
10 | * modification, are permitted provided that the following conditions | | 10 | * modification, are permitted provided that the following conditions |
11 | * are met: | | 11 | * are met: |
12 | * 1. Redistributions of source code must retain the above copyright | | 12 | * 1. Redistributions of source code must retain the above copyright |
13 | * notice, this list of conditions and the following disclaimer. | | 13 | * notice, this list of conditions and the following disclaimer. |
14 | * 2. Redistributions in binary form must reproduce the above copyright | | 14 | * 2. Redistributions in binary form must reproduce the above copyright |
15 | * notice, this list of conditions and the following disclaimer in the | | 15 | * notice, this list of conditions and the following disclaimer in the |
16 | * documentation and/or other materials provided with the distribution. | | 16 | * documentation and/or other materials provided with the distribution. |
17 | * 3. All advertising materials mentioning features or use of this software | | 17 | * 3. All advertising materials mentioning features or use of this software |
18 | * must display the following acknowledgement: | | 18 | * must display the following acknowledgement: |
19 | * This product includes software developed for the NetBSD Project by | | 19 | * This product includes software developed for the NetBSD Project by |
20 | * Wasabi Systems, Inc. | | 20 | * Wasabi Systems, Inc. |
21 | * 4. The name of Wasabi Systems, Inc. may not be used to endorse | | 21 | * 4. The name of Wasabi Systems, Inc. may not be used to endorse |
22 | * or promote products derived from this software without specific prior | | 22 | * or promote products derived from this software without specific prior |
23 | * written permission. | | 23 | * written permission. |
24 | * | | 24 | * |
25 | * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND | | 25 | * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND |
26 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED | | 26 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED |
27 | * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR | | 27 | * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR |
28 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC | | 28 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC |
29 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR | | 29 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
30 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF | | 30 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
31 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS | | 31 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
32 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN | | 32 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
33 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) | | 33 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
34 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE | | 34 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
35 | * POSSIBILITY OF SUCH DAMAGE. | | 35 | * POSSIBILITY OF SUCH DAMAGE. |
36 | */ | | 36 | */ |
37 | | | 37 | |
38 | /******************************************************************************* | | 38 | /******************************************************************************* |
39 | | | 39 | |
40 | Copyright (c) 2001-2005, Intel Corporation | | 40 | Copyright (c) 2001-2005, Intel Corporation |
41 | All rights reserved. | | 41 | All rights reserved. |
42 | | | 42 | |
43 | Redistribution and use in source and binary forms, with or without | | 43 | Redistribution and use in source and binary forms, with or without |
44 | modification, are permitted provided that the following conditions are met: | | 44 | modification, are permitted provided that the following conditions are met: |
45 | | | 45 | |
46 | 1. Redistributions of source code must retain the above copyright notice, | | 46 | 1. Redistributions of source code must retain the above copyright notice, |
47 | this list of conditions and the following disclaimer. | | 47 | this list of conditions and the following disclaimer. |
48 | | | 48 | |
49 | 2. Redistributions in binary form must reproduce the above copyright | | 49 | 2. Redistributions in binary form must reproduce the above copyright |
50 | notice, this list of conditions and the following disclaimer in the | | 50 | notice, this list of conditions and the following disclaimer in the |
51 | documentation and/or other materials provided with the distribution. | | 51 | documentation and/or other materials provided with the distribution. |
52 | | | 52 | |
53 | 3. Neither the name of the Intel Corporation nor the names of its | | 53 | 3. Neither the name of the Intel Corporation nor the names of its |
54 | contributors may be used to endorse or promote products derived from | | 54 | contributors may be used to endorse or promote products derived from |
55 | this software without specific prior written permission. | | 55 | this software without specific prior written permission. |
56 | | | 56 | |
57 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" | | 57 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
58 | AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | | 58 | AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
59 | IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE | | 59 | IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
60 | ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE | | 60 | ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE |
61 | LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR | | 61 | LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
62 | CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF | | 62 | CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
63 | SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS | | 63 | SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
64 | INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN | | 64 | INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
65 | CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) | | 65 | CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
66 | ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE | | 66 | ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
67 | POSSIBILITY OF SUCH DAMAGE. | | 67 | POSSIBILITY OF SUCH DAMAGE. |
68 | | | 68 | |
69 | *******************************************************************************/ | | 69 | *******************************************************************************/ |
70 | /* | | 70 | /* |
71 | * Device driver for the Intel i8254x family of Gigabit Ethernet chips. | | 71 | * Device driver for the Intel i8254x family of Gigabit Ethernet chips. |
72 | * | | 72 | * |
73 | * TODO (in order of importance): | | 73 | * TODO (in order of importance): |
74 | * | | 74 | * |
75 | * - Check XXX'ed comments | | 75 | * - Check XXX'ed comments |
76 | * - EEE (Energy Efficiency Ethernet) | | 76 | * - EEE (Energy Efficiency Ethernet) |
77 | * - MSI/MSI-X | | 77 | * - MSI/MSI-X |
78 | * - Virtual Function | | 78 | * - Virtual Function |
79 | * - Set LED correctly (based on contents in EEPROM) | | 79 | * - Set LED correctly (based on contents in EEPROM) |
80 | * - Rework how parameters are loaded from the EEPROM. | | 80 | * - Rework how parameters are loaded from the EEPROM. |
81 | */ | | 81 | */ |
82 | | | 82 | |
83 | #include <sys/cdefs.h> | | 83 | #include <sys/cdefs.h> |
84 | __KERNEL_RCSID(0, "$NetBSD: if_wm.c,v 1.340 2015/07/21 03:15:50 knakahara Exp $"); | | 84 | __KERNEL_RCSID(0, "$NetBSD: if_wm.c,v 1.341 2015/07/22 08:22:55 knakahara Exp $"); |
85 | | | 85 | |
86 | #ifdef _KERNEL_OPT | | 86 | #ifdef _KERNEL_OPT |
87 | #include "opt_net_mpsafe.h" | | 87 | #include "opt_net_mpsafe.h" |
88 | #endif | | 88 | #endif |
89 | | | 89 | |
90 | #include <sys/param.h> | | 90 | #include <sys/param.h> |
91 | #include <sys/systm.h> | | 91 | #include <sys/systm.h> |
92 | #include <sys/callout.h> | | 92 | #include <sys/callout.h> |
93 | #include <sys/mbuf.h> | | 93 | #include <sys/mbuf.h> |
94 | #include <sys/malloc.h> | | 94 | #include <sys/malloc.h> |
95 | #include <sys/kernel.h> | | 95 | #include <sys/kernel.h> |
96 | #include <sys/socket.h> | | 96 | #include <sys/socket.h> |
97 | #include <sys/ioctl.h> | | 97 | #include <sys/ioctl.h> |
98 | #include <sys/errno.h> | | 98 | #include <sys/errno.h> |
99 | #include <sys/device.h> | | 99 | #include <sys/device.h> |
100 | #include <sys/queue.h> | | 100 | #include <sys/queue.h> |
101 | #include <sys/syslog.h> | | 101 | #include <sys/syslog.h> |
102 | | | 102 | |
103 | #include <sys/rndsource.h> | | 103 | #include <sys/rndsource.h> |
104 | | | 104 | |
105 | #include <net/if.h> | | 105 | #include <net/if.h> |
106 | #include <net/if_dl.h> | | 106 | #include <net/if_dl.h> |
107 | #include <net/if_media.h> | | 107 | #include <net/if_media.h> |
108 | #include <net/if_ether.h> | | 108 | #include <net/if_ether.h> |
109 | | | 109 | |
110 | #include <net/bpf.h> | | 110 | #include <net/bpf.h> |
111 | | | 111 | |
112 | #include <netinet/in.h> /* XXX for struct ip */ | | 112 | #include <netinet/in.h> /* XXX for struct ip */ |
113 | #include <netinet/in_systm.h> /* XXX for struct ip */ | | 113 | #include <netinet/in_systm.h> /* XXX for struct ip */ |
114 | #include <netinet/ip.h> /* XXX for struct ip */ | | 114 | #include <netinet/ip.h> /* XXX for struct ip */ |
115 | #include <netinet/ip6.h> /* XXX for struct ip6_hdr */ | | 115 | #include <netinet/ip6.h> /* XXX for struct ip6_hdr */ |
116 | #include <netinet/tcp.h> /* XXX for struct tcphdr */ | | 116 | #include <netinet/tcp.h> /* XXX for struct tcphdr */ |
117 | | | 117 | |
118 | #include <sys/bus.h> | | 118 | #include <sys/bus.h> |
119 | #include <sys/intr.h> | | 119 | #include <sys/intr.h> |
120 | #include <machine/endian.h> | | 120 | #include <machine/endian.h> |
121 | | | 121 | |
122 | #include <dev/mii/mii.h> | | 122 | #include <dev/mii/mii.h> |
123 | #include <dev/mii/miivar.h> | | 123 | #include <dev/mii/miivar.h> |
124 | #include <dev/mii/miidevs.h> | | 124 | #include <dev/mii/miidevs.h> |
125 | #include <dev/mii/mii_bitbang.h> | | 125 | #include <dev/mii/mii_bitbang.h> |
126 | #include <dev/mii/ikphyreg.h> | | 126 | #include <dev/mii/ikphyreg.h> |
127 | #include <dev/mii/igphyreg.h> | | 127 | #include <dev/mii/igphyreg.h> |
128 | #include <dev/mii/igphyvar.h> | | 128 | #include <dev/mii/igphyvar.h> |
129 | #include <dev/mii/inbmphyreg.h> | | 129 | #include <dev/mii/inbmphyreg.h> |
130 | | | 130 | |
131 | #include <dev/pci/pcireg.h> | | 131 | #include <dev/pci/pcireg.h> |
132 | #include <dev/pci/pcivar.h> | | 132 | #include <dev/pci/pcivar.h> |
133 | #include <dev/pci/pcidevs.h> | | 133 | #include <dev/pci/pcidevs.h> |
134 | | | 134 | |
135 | #include <dev/pci/if_wmreg.h> | | 135 | #include <dev/pci/if_wmreg.h> |
136 | #include <dev/pci/if_wmvar.h> | | 136 | #include <dev/pci/if_wmvar.h> |
137 | | | 137 | |
138 | #ifdef WM_DEBUG | | 138 | #ifdef WM_DEBUG |
139 | #define WM_DEBUG_LINK 0x01 | | 139 | #define WM_DEBUG_LINK 0x01 |
140 | #define WM_DEBUG_TX 0x02 | | 140 | #define WM_DEBUG_TX 0x02 |
141 | #define WM_DEBUG_RX 0x04 | | 141 | #define WM_DEBUG_RX 0x04 |
142 | #define WM_DEBUG_GMII 0x08 | | 142 | #define WM_DEBUG_GMII 0x08 |
143 | #define WM_DEBUG_MANAGE 0x10 | | 143 | #define WM_DEBUG_MANAGE 0x10 |
144 | #define WM_DEBUG_NVM 0x20 | | 144 | #define WM_DEBUG_NVM 0x20 |
145 | int wm_debug = WM_DEBUG_TX | WM_DEBUG_RX | WM_DEBUG_LINK | WM_DEBUG_GMII | | 145 | int wm_debug = WM_DEBUG_TX | WM_DEBUG_RX | WM_DEBUG_LINK | WM_DEBUG_GMII |
146 | | WM_DEBUG_MANAGE | WM_DEBUG_NVM; | | 146 | | WM_DEBUG_MANAGE | WM_DEBUG_NVM; |
147 | | | 147 | |
148 | #define DPRINTF(x, y) if (wm_debug & (x)) printf y | | 148 | #define DPRINTF(x, y) if (wm_debug & (x)) printf y |
149 | #else | | 149 | #else |
150 | #define DPRINTF(x, y) /* nothing */ | | 150 | #define DPRINTF(x, y) /* nothing */ |
151 | #endif /* WM_DEBUG */ | | 151 | #endif /* WM_DEBUG */ |
152 | | | 152 | |
153 | #ifdef NET_MPSAFE | | 153 | #ifdef NET_MPSAFE |
154 | #define WM_MPSAFE 1 | | 154 | #define WM_MPSAFE 1 |
155 | #endif | | 155 | #endif |
156 | | | 156 | |
157 | #ifdef __HAVE_PCI_MSI_MSIX | | 157 | #ifdef __HAVE_PCI_MSI_MSIX |
158 | #if 0 /* off by default */ | | 158 | #define WM_MSI_MSIX 1 /* Enable by default */ |
159 | #define WM_MSI_MSIX 1 | | | |
160 | #endif | | | |
161 | #endif | | 159 | #endif |
162 | | | 160 | |
163 | /* | | 161 | /* |
164 | * This device driver divides interrupt to TX, RX and link state. | | 162 | * This device driver divides interrupt to TX, RX and link state. |
165 | * Each MSI-X vector indexes are below. | | 163 | * Each MSI-X vector indexes are below. |
166 | */ | | 164 | */ |
167 | #define WM_MSIX_NINTR 3 | | 165 | #define WM_MSIX_NINTR 3 |
168 | #define WM_MSIX_TXINTR_IDX 0 | | 166 | #define WM_MSIX_TXINTR_IDX 0 |
169 | #define WM_MSIX_RXINTR_IDX 1 | | 167 | #define WM_MSIX_RXINTR_IDX 1 |
170 | #define WM_MSIX_LINKINTR_IDX 2 | | 168 | #define WM_MSIX_LINKINTR_IDX 2 |
171 | #define WM_MAX_NINTR WM_MSIX_NINTR | | 169 | #define WM_MAX_NINTR WM_MSIX_NINTR |
172 | | | 170 | |
173 | /* | | 171 | /* |
174 | * This device driver set affinity to each interrupts like below (round-robin). | | 172 | * This device driver set affinity to each interrupts like below (round-robin). |
175 | * If the number CPUs is less than the number of interrupts, this driver usase | | 173 | * If the number CPUs is less than the number of interrupts, this driver usase |
176 | * the same CPU for multiple interrupts. | | 174 | * the same CPU for multiple interrupts. |
177 | */ | | 175 | */ |
178 | #define WM_MSIX_TXINTR_CPUID 0 | | 176 | #define WM_MSIX_TXINTR_CPUID 0 |
179 | #define WM_MSIX_RXINTR_CPUID 1 | | 177 | #define WM_MSIX_RXINTR_CPUID 1 |
180 | #define WM_MSIX_LINKINTR_CPUID 2 | | 178 | #define WM_MSIX_LINKINTR_CPUID 2 |
181 | | | 179 | |
182 | /* | | 180 | /* |
183 | * Transmit descriptor list size. Due to errata, we can only have | | 181 | * Transmit descriptor list size. Due to errata, we can only have |
184 | * 256 hardware descriptors in the ring on < 82544, but we use 4096 | | 182 | * 256 hardware descriptors in the ring on < 82544, but we use 4096 |
185 | * on >= 82544. We tell the upper layers that they can queue a lot | | 183 | * on >= 82544. We tell the upper layers that they can queue a lot |
186 | * of packets, and we go ahead and manage up to 64 (16 for the i82547) | | 184 | * of packets, and we go ahead and manage up to 64 (16 for the i82547) |
187 | * of them at a time. | | 185 | * of them at a time. |
188 | * | | 186 | * |
189 | * We allow up to 256 (!) DMA segments per packet. Pathological packet | | 187 | * We allow up to 256 (!) DMA segments per packet. Pathological packet |
190 | * chains containing many small mbufs have been observed in zero-copy | | 188 | * chains containing many small mbufs have been observed in zero-copy |
191 | * situations with jumbo frames. | | 189 | * situations with jumbo frames. |
192 | */ | | 190 | */ |
193 | #define WM_NTXSEGS 256 | | 191 | #define WM_NTXSEGS 256 |
194 | #define WM_IFQUEUELEN 256 | | 192 | #define WM_IFQUEUELEN 256 |
195 | #define WM_TXQUEUELEN_MAX 64 | | 193 | #define WM_TXQUEUELEN_MAX 64 |
196 | #define WM_TXQUEUELEN_MAX_82547 16 | | 194 | #define WM_TXQUEUELEN_MAX_82547 16 |
197 | #define WM_TXQUEUELEN(sc) ((sc)->sc_txnum) | | 195 | #define WM_TXQUEUELEN(sc) ((sc)->sc_txnum) |
198 | #define WM_TXQUEUELEN_MASK(sc) (WM_TXQUEUELEN(sc) - 1) | | 196 | #define WM_TXQUEUELEN_MASK(sc) (WM_TXQUEUELEN(sc) - 1) |
199 | #define WM_TXQUEUE_GC(sc) (WM_TXQUEUELEN(sc) / 8) | | 197 | #define WM_TXQUEUE_GC(sc) (WM_TXQUEUELEN(sc) / 8) |
200 | #define WM_NTXDESC_82542 256 | | 198 | #define WM_NTXDESC_82542 256 |
201 | #define WM_NTXDESC_82544 4096 | | 199 | #define WM_NTXDESC_82544 4096 |
202 | #define WM_NTXDESC(sc) ((sc)->sc_ntxdesc) | | 200 | #define WM_NTXDESC(sc) ((sc)->sc_ntxdesc) |
203 | #define WM_NTXDESC_MASK(sc) (WM_NTXDESC(sc) - 1) | | 201 | #define WM_NTXDESC_MASK(sc) (WM_NTXDESC(sc) - 1) |
204 | #define WM_TXDESCSIZE(sc) (WM_NTXDESC(sc) * sizeof(wiseman_txdesc_t)) | | 202 | #define WM_TXDESCSIZE(sc) (WM_NTXDESC(sc) * sizeof(wiseman_txdesc_t)) |
205 | #define WM_NEXTTX(sc, x) (((x) + 1) & WM_NTXDESC_MASK(sc)) | | 203 | #define WM_NEXTTX(sc, x) (((x) + 1) & WM_NTXDESC_MASK(sc)) |
206 | #define WM_NEXTTXS(sc, x) (((x) + 1) & WM_TXQUEUELEN_MASK(sc)) | | 204 | #define WM_NEXTTXS(sc, x) (((x) + 1) & WM_TXQUEUELEN_MASK(sc)) |
207 | | | 205 | |
208 | #define WM_MAXTXDMA (2 * round_page(IP_MAXPACKET)) /* for TSO */ | | 206 | #define WM_MAXTXDMA (2 * round_page(IP_MAXPACKET)) /* for TSO */ |
209 | | | 207 | |
210 | /* | | 208 | /* |
211 | * Receive descriptor list size. We have one Rx buffer for normal | | 209 | * Receive descriptor list size. We have one Rx buffer for normal |
212 | * sized packets. Jumbo packets consume 5 Rx buffers for a full-sized | | 210 | * sized packets. Jumbo packets consume 5 Rx buffers for a full-sized |
213 | * packet. We allocate 256 receive descriptors, each with a 2k | | 211 | * packet. We allocate 256 receive descriptors, each with a 2k |
214 | * buffer (MCLBYTES), which gives us room for 50 jumbo packets. | | 212 | * buffer (MCLBYTES), which gives us room for 50 jumbo packets. |
215 | */ | | 213 | */ |
216 | #define WM_NRXDESC 256 | | 214 | #define WM_NRXDESC 256 |
217 | #define WM_NRXDESC_MASK (WM_NRXDESC - 1) | | 215 | #define WM_NRXDESC_MASK (WM_NRXDESC - 1) |
218 | #define WM_NEXTRX(x) (((x) + 1) & WM_NRXDESC_MASK) | | 216 | #define WM_NEXTRX(x) (((x) + 1) & WM_NRXDESC_MASK) |
219 | #define WM_PREVRX(x) (((x) - 1) & WM_NRXDESC_MASK) | | 217 | #define WM_PREVRX(x) (((x) - 1) & WM_NRXDESC_MASK) |
220 | | | 218 | |
221 | /* | | 219 | /* |
222 | * Control structures are DMA'd to the i82542 chip. We allocate them in | | 220 | * Control structures are DMA'd to the i82542 chip. We allocate them in |
223 | * a single clump that maps to a single DMA segment to make several things | | 221 | * a single clump that maps to a single DMA segment to make several things |
224 | * easier. | | 222 | * easier. |
225 | */ | | 223 | */ |
226 | struct wm_control_data_82544 { | | 224 | struct wm_control_data_82544 { |
227 | /* | | 225 | /* |
228 | * The receive descriptors. | | 226 | * The receive descriptors. |
229 | */ | | 227 | */ |
230 | wiseman_rxdesc_t wcd_rxdescs[WM_NRXDESC]; | | 228 | wiseman_rxdesc_t wcd_rxdescs[WM_NRXDESC]; |
231 | | | 229 | |
232 | /* | | 230 | /* |
233 | * The transmit descriptors. Put these at the end, because | | 231 | * The transmit descriptors. Put these at the end, because |
234 | * we might use a smaller number of them. | | 232 | * we might use a smaller number of them. |
235 | */ | | 233 | */ |
236 | union { | | 234 | union { |
237 | wiseman_txdesc_t wcdu_txdescs[WM_NTXDESC_82544]; | | 235 | wiseman_txdesc_t wcdu_txdescs[WM_NTXDESC_82544]; |
238 | nq_txdesc_t wcdu_nq_txdescs[WM_NTXDESC_82544]; | | 236 | nq_txdesc_t wcdu_nq_txdescs[WM_NTXDESC_82544]; |
239 | } wdc_u; | | 237 | } wdc_u; |
240 | }; | | 238 | }; |
241 | | | 239 | |
242 | struct wm_control_data_82542 { | | 240 | struct wm_control_data_82542 { |
243 | wiseman_rxdesc_t wcd_rxdescs[WM_NRXDESC]; | | 241 | wiseman_rxdesc_t wcd_rxdescs[WM_NRXDESC]; |
244 | wiseman_txdesc_t wcd_txdescs[WM_NTXDESC_82542]; | | 242 | wiseman_txdesc_t wcd_txdescs[WM_NTXDESC_82542]; |
245 | }; | | 243 | }; |
246 | | | 244 | |
247 | #define WM_CDOFF(x) offsetof(struct wm_control_data_82544, x) | | 245 | #define WM_CDOFF(x) offsetof(struct wm_control_data_82544, x) |
248 | #define WM_CDTXOFF(x) WM_CDOFF(wdc_u.wcdu_txdescs[(x)]) | | 246 | #define WM_CDTXOFF(x) WM_CDOFF(wdc_u.wcdu_txdescs[(x)]) |
249 | #define WM_CDRXOFF(x) WM_CDOFF(wcd_rxdescs[(x)]) | | 247 | #define WM_CDRXOFF(x) WM_CDOFF(wcd_rxdescs[(x)]) |
250 | | | 248 | |
251 | /* | | 249 | /* |
252 | * Software state for transmit jobs. | | 250 | * Software state for transmit jobs. |
253 | */ | | 251 | */ |
254 | struct wm_txsoft { | | 252 | struct wm_txsoft { |
255 | struct mbuf *txs_mbuf; /* head of our mbuf chain */ | | 253 | struct mbuf *txs_mbuf; /* head of our mbuf chain */ |
256 | bus_dmamap_t txs_dmamap; /* our DMA map */ | | 254 | bus_dmamap_t txs_dmamap; /* our DMA map */ |
257 | int txs_firstdesc; /* first descriptor in packet */ | | 255 | int txs_firstdesc; /* first descriptor in packet */ |
258 | int txs_lastdesc; /* last descriptor in packet */ | | 256 | int txs_lastdesc; /* last descriptor in packet */ |
259 | int txs_ndesc; /* # of descriptors used */ | | 257 | int txs_ndesc; /* # of descriptors used */ |
260 | }; | | 258 | }; |
261 | | | 259 | |
262 | /* | | 260 | /* |
263 | * Software state for receive buffers. Each descriptor gets a | | 261 | * Software state for receive buffers. Each descriptor gets a |
264 | * 2k (MCLBYTES) buffer and a DMA map. For packets which fill | | 262 | * 2k (MCLBYTES) buffer and a DMA map. For packets which fill |
265 | * more than one buffer, we chain them together. | | 263 | * more than one buffer, we chain them together. |
266 | */ | | 264 | */ |
267 | struct wm_rxsoft { | | 265 | struct wm_rxsoft { |
268 | struct mbuf *rxs_mbuf; /* head of our mbuf chain */ | | 266 | struct mbuf *rxs_mbuf; /* head of our mbuf chain */ |
269 | bus_dmamap_t rxs_dmamap; /* our DMA map */ | | 267 | bus_dmamap_t rxs_dmamap; /* our DMA map */ |
270 | }; | | 268 | }; |
271 | | | 269 | |
272 | #define WM_LINKUP_TIMEOUT 50 | | 270 | #define WM_LINKUP_TIMEOUT 50 |
273 | | | 271 | |
274 | static uint16_t swfwphysem[] = { | | 272 | static uint16_t swfwphysem[] = { |
275 | SWFW_PHY0_SM, | | 273 | SWFW_PHY0_SM, |
276 | SWFW_PHY1_SM, | | 274 | SWFW_PHY1_SM, |
277 | SWFW_PHY2_SM, | | 275 | SWFW_PHY2_SM, |
278 | SWFW_PHY3_SM | | 276 | SWFW_PHY3_SM |
279 | }; | | 277 | }; |
280 | | | 278 | |
281 | static const uint32_t wm_82580_rxpbs_table[] = { | | 279 | static const uint32_t wm_82580_rxpbs_table[] = { |
282 | 36, 72, 144, 1, 2, 4, 8, 16, 35, 70, 140 | | 280 | 36, 72, 144, 1, 2, 4, 8, 16, 35, 70, 140 |
283 | }; | | 281 | }; |
284 | | | 282 | |
285 | /* | | 283 | /* |
286 | * Software state per device. | | 284 | * Software state per device. |
287 | */ | | 285 | */ |
288 | struct wm_softc { | | 286 | struct wm_softc { |
289 | device_t sc_dev; /* generic device information */ | | 287 | device_t sc_dev; /* generic device information */ |
290 | bus_space_tag_t sc_st; /* bus space tag */ | | 288 | bus_space_tag_t sc_st; /* bus space tag */ |
291 | bus_space_handle_t sc_sh; /* bus space handle */ | | 289 | bus_space_handle_t sc_sh; /* bus space handle */ |
292 | bus_size_t sc_ss; /* bus space size */ | | 290 | bus_size_t sc_ss; /* bus space size */ |
293 | bus_space_tag_t sc_iot; /* I/O space tag */ | | 291 | bus_space_tag_t sc_iot; /* I/O space tag */ |
294 | bus_space_handle_t sc_ioh; /* I/O space handle */ | | 292 | bus_space_handle_t sc_ioh; /* I/O space handle */ |
295 | bus_size_t sc_ios; /* I/O space size */ | | 293 | bus_size_t sc_ios; /* I/O space size */ |
296 | bus_space_tag_t sc_flasht; /* flash registers space tag */ | | 294 | bus_space_tag_t sc_flasht; /* flash registers space tag */ |
297 | bus_space_handle_t sc_flashh; /* flash registers space handle */ | | 295 | bus_space_handle_t sc_flashh; /* flash registers space handle */ |
298 | bus_size_t sc_flashs; /* flash registers space size */ | | 296 | bus_size_t sc_flashs; /* flash registers space size */ |
299 | bus_dma_tag_t sc_dmat; /* bus DMA tag */ | | 297 | bus_dma_tag_t sc_dmat; /* bus DMA tag */ |
300 | | | 298 | |
301 | struct ethercom sc_ethercom; /* ethernet common data */ | | 299 | struct ethercom sc_ethercom; /* ethernet common data */ |
302 | struct mii_data sc_mii; /* MII/media information */ | | 300 | struct mii_data sc_mii; /* MII/media information */ |
303 | | | 301 | |
304 | pci_chipset_tag_t sc_pc; | | 302 | pci_chipset_tag_t sc_pc; |
305 | pcitag_t sc_pcitag; | | 303 | pcitag_t sc_pcitag; |
306 | int sc_bus_speed; /* PCI/PCIX bus speed */ | | 304 | int sc_bus_speed; /* PCI/PCIX bus speed */ |
307 | int sc_pcixe_capoff; /* PCI[Xe] capability reg offset */ | | 305 | int sc_pcixe_capoff; /* PCI[Xe] capability reg offset */ |
308 | | | 306 | |
309 | uint16_t sc_pcidevid; /* PCI device ID */ | | 307 | uint16_t sc_pcidevid; /* PCI device ID */ |
310 | wm_chip_type sc_type; /* MAC type */ | | 308 | wm_chip_type sc_type; /* MAC type */ |
311 | int sc_rev; /* MAC revision */ | | 309 | int sc_rev; /* MAC revision */ |
312 | wm_phy_type sc_phytype; /* PHY type */ | | 310 | wm_phy_type sc_phytype; /* PHY type */ |
313 | uint32_t sc_mediatype; /* Media type (Copper, Fiber, SERDES)*/ | | 311 | uint32_t sc_mediatype; /* Media type (Copper, Fiber, SERDES)*/ |
314 | #define WM_MEDIATYPE_UNKNOWN 0x00 | | 312 | #define WM_MEDIATYPE_UNKNOWN 0x00 |
315 | #define WM_MEDIATYPE_FIBER 0x01 | | 313 | #define WM_MEDIATYPE_FIBER 0x01 |
316 | #define WM_MEDIATYPE_COPPER 0x02 | | 314 | #define WM_MEDIATYPE_COPPER 0x02 |
317 | #define WM_MEDIATYPE_SERDES 0x03 /* Internal SERDES */ | | 315 | #define WM_MEDIATYPE_SERDES 0x03 /* Internal SERDES */ |
318 | int sc_funcid; /* unit number of the chip (0 to 3) */ | | 316 | int sc_funcid; /* unit number of the chip (0 to 3) */ |
319 | int sc_flags; /* flags; see below */ | | 317 | int sc_flags; /* flags; see below */ |
320 | int sc_if_flags; /* last if_flags */ | | 318 | int sc_if_flags; /* last if_flags */ |
321 | int sc_flowflags; /* 802.3x flow control flags */ | | 319 | int sc_flowflags; /* 802.3x flow control flags */ |
322 | int sc_align_tweak; | | 320 | int sc_align_tweak; |
323 | | | 321 | |
324 | void *sc_ihs[WM_MAX_NINTR]; /* | | 322 | void *sc_ihs[WM_MAX_NINTR]; /* |
325 | * interrupt cookie. | | 323 | * interrupt cookie. |
326 | * legacy and msi use sc_ihs[0]. | | 324 | * legacy and msi use sc_ihs[0]. |
327 | */ | | 325 | */ |
328 | pci_intr_handle_t *sc_intrs; /* legacy and msi use sc_intrs[0] */ | | 326 | pci_intr_handle_t *sc_intrs; /* legacy and msi use sc_intrs[0] */ |
329 | int sc_nintrs; /* number of interrupts */ | | 327 | int sc_nintrs; /* number of interrupts */ |
330 | | | 328 | |
331 | callout_t sc_tick_ch; /* tick callout */ | | 329 | callout_t sc_tick_ch; /* tick callout */ |
332 | bool sc_stopping; | | 330 | bool sc_stopping; |
333 | | | 331 | |
334 | int sc_nvm_ver_major; | | 332 | int sc_nvm_ver_major; |
335 | int sc_nvm_ver_minor; | | 333 | int sc_nvm_ver_minor; |
336 | int sc_nvm_addrbits; /* NVM address bits */ | | 334 | int sc_nvm_addrbits; /* NVM address bits */ |
337 | unsigned int sc_nvm_wordsize; /* NVM word size */ | | 335 | unsigned int sc_nvm_wordsize; /* NVM word size */ |
338 | int sc_ich8_flash_base; | | 336 | int sc_ich8_flash_base; |
339 | int sc_ich8_flash_bank_size; | | 337 | int sc_ich8_flash_bank_size; |
340 | int sc_nvm_k1_enabled; | | 338 | int sc_nvm_k1_enabled; |
341 | | | 339 | |
342 | /* Software state for the transmit and receive descriptors. */ | | 340 | /* Software state for the transmit and receive descriptors. */ |
343 | int sc_txnum; /* must be a power of two */ | | 341 | int sc_txnum; /* must be a power of two */ |
344 | struct wm_txsoft sc_txsoft[WM_TXQUEUELEN_MAX]; | | 342 | struct wm_txsoft sc_txsoft[WM_TXQUEUELEN_MAX]; |
345 | struct wm_rxsoft sc_rxsoft[WM_NRXDESC]; | | 343 | struct wm_rxsoft sc_rxsoft[WM_NRXDESC]; |
346 | | | 344 | |
347 | /* Control data structures. */ | | 345 | /* Control data structures. */ |
348 | int sc_ntxdesc; /* must be a power of two */ | | 346 | int sc_ntxdesc; /* must be a power of two */ |
349 | struct wm_control_data_82544 *sc_control_data; | | 347 | struct wm_control_data_82544 *sc_control_data; |
350 | bus_dmamap_t sc_cddmamap; /* control data DMA map */ | | 348 | bus_dmamap_t sc_cddmamap; /* control data DMA map */ |
351 | bus_dma_segment_t sc_cd_seg; /* control data segment */ | | 349 | bus_dma_segment_t sc_cd_seg; /* control data segment */ |
352 | int sc_cd_rseg; /* real number of control segment */ | | 350 | int sc_cd_rseg; /* real number of control segment */ |
353 | size_t sc_cd_size; /* control data size */ | | 351 | size_t sc_cd_size; /* control data size */ |
354 | #define sc_cddma sc_cddmamap->dm_segs[0].ds_addr | | 352 | #define sc_cddma sc_cddmamap->dm_segs[0].ds_addr |
355 | #define sc_txdescs sc_control_data->wdc_u.wcdu_txdescs | | 353 | #define sc_txdescs sc_control_data->wdc_u.wcdu_txdescs |
356 | #define sc_nq_txdescs sc_control_data->wdc_u.wcdu_nq_txdescs | | 354 | #define sc_nq_txdescs sc_control_data->wdc_u.wcdu_nq_txdescs |
357 | #define sc_rxdescs sc_control_data->wcd_rxdescs | | 355 | #define sc_rxdescs sc_control_data->wcd_rxdescs |
358 | | | 356 | |
359 | #ifdef WM_EVENT_COUNTERS | | 357 | #ifdef WM_EVENT_COUNTERS |
360 | /* Event counters. */ | | 358 | /* Event counters. */ |
361 | struct evcnt sc_ev_txsstall; /* Tx stalled due to no txs */ | | 359 | struct evcnt sc_ev_txsstall; /* Tx stalled due to no txs */ |
362 | struct evcnt sc_ev_txdstall; /* Tx stalled due to no txd */ | | 360 | struct evcnt sc_ev_txdstall; /* Tx stalled due to no txd */ |
363 | struct evcnt sc_ev_txfifo_stall;/* Tx FIFO stalls (82547) */ | | 361 | struct evcnt sc_ev_txfifo_stall;/* Tx FIFO stalls (82547) */ |
364 | struct evcnt sc_ev_txdw; /* Tx descriptor interrupts */ | | 362 | struct evcnt sc_ev_txdw; /* Tx descriptor interrupts */ |
365 | struct evcnt sc_ev_txqe; /* Tx queue empty interrupts */ | | 363 | struct evcnt sc_ev_txqe; /* Tx queue empty interrupts */ |
366 | struct evcnt sc_ev_rxintr; /* Rx interrupts */ | | 364 | struct evcnt sc_ev_rxintr; /* Rx interrupts */ |
367 | struct evcnt sc_ev_linkintr; /* Link interrupts */ | | 365 | struct evcnt sc_ev_linkintr; /* Link interrupts */ |
368 | | | 366 | |
369 | struct evcnt sc_ev_rxipsum; /* IP checksums checked in-bound */ | | 367 | struct evcnt sc_ev_rxipsum; /* IP checksums checked in-bound */ |
370 | struct evcnt sc_ev_rxtusum; /* TCP/UDP cksums checked in-bound */ | | 368 | struct evcnt sc_ev_rxtusum; /* TCP/UDP cksums checked in-bound */ |
371 | struct evcnt sc_ev_txipsum; /* IP checksums comp. out-bound */ | | 369 | struct evcnt sc_ev_txipsum; /* IP checksums comp. out-bound */ |
372 | struct evcnt sc_ev_txtusum; /* TCP/UDP cksums comp. out-bound */ | | 370 | struct evcnt sc_ev_txtusum; /* TCP/UDP cksums comp. out-bound */ |
373 | struct evcnt sc_ev_txtusum6; /* TCP/UDP v6 cksums comp. out-bound */ | | 371 | struct evcnt sc_ev_txtusum6; /* TCP/UDP v6 cksums comp. out-bound */ |
374 | struct evcnt sc_ev_txtso; /* TCP seg offload out-bound (IPv4) */ | | 372 | struct evcnt sc_ev_txtso; /* TCP seg offload out-bound (IPv4) */ |
375 | struct evcnt sc_ev_txtso6; /* TCP seg offload out-bound (IPv6) */ | | 373 | struct evcnt sc_ev_txtso6; /* TCP seg offload out-bound (IPv6) */ |
376 | struct evcnt sc_ev_txtsopain; /* painful header manip. for TSO */ | | 374 | struct evcnt sc_ev_txtsopain; /* painful header manip. for TSO */ |
377 | | | 375 | |
378 | struct evcnt sc_ev_txseg[WM_NTXSEGS]; /* Tx packets w/ N segments */ | | 376 | struct evcnt sc_ev_txseg[WM_NTXSEGS]; /* Tx packets w/ N segments */ |
379 | struct evcnt sc_ev_txdrop; /* Tx packets dropped (too many segs) */ | | 377 | struct evcnt sc_ev_txdrop; /* Tx packets dropped (too many segs) */ |
380 | | | 378 | |
381 | struct evcnt sc_ev_tu; /* Tx underrun */ | | 379 | struct evcnt sc_ev_tu; /* Tx underrun */ |
382 | | | 380 | |
383 | struct evcnt sc_ev_tx_xoff; /* Tx PAUSE(!0) frames */ | | 381 | struct evcnt sc_ev_tx_xoff; /* Tx PAUSE(!0) frames */ |
384 | struct evcnt sc_ev_tx_xon; /* Tx PAUSE(0) frames */ | | 382 | struct evcnt sc_ev_tx_xon; /* Tx PAUSE(0) frames */ |
385 | struct evcnt sc_ev_rx_xoff; /* Rx PAUSE(!0) frames */ | | 383 | struct evcnt sc_ev_rx_xoff; /* Rx PAUSE(!0) frames */ |
386 | struct evcnt sc_ev_rx_xon; /* Rx PAUSE(0) frames */ | | 384 | struct evcnt sc_ev_rx_xon; /* Rx PAUSE(0) frames */ |
387 | struct evcnt sc_ev_rx_macctl; /* Rx Unsupported */ | | 385 | struct evcnt sc_ev_rx_macctl; /* Rx Unsupported */ |
388 | #endif /* WM_EVENT_COUNTERS */ | | 386 | #endif /* WM_EVENT_COUNTERS */ |
389 | | | 387 | |
390 | bus_addr_t sc_tdt_reg; /* offset of TDT register */ | | 388 | bus_addr_t sc_tdt_reg; /* offset of TDT register */ |
391 | | | 389 | |
392 | int sc_txfree; /* number of free Tx descriptors */ | | 390 | int sc_txfree; /* number of free Tx descriptors */ |
393 | int sc_txnext; /* next ready Tx descriptor */ | | 391 | int sc_txnext; /* next ready Tx descriptor */ |
394 | | | 392 | |
395 | int sc_txsfree; /* number of free Tx jobs */ | | 393 | int sc_txsfree; /* number of free Tx jobs */ |
396 | int sc_txsnext; /* next free Tx job */ | | 394 | int sc_txsnext; /* next free Tx job */ |
397 | int sc_txsdirty; /* dirty Tx jobs */ | | 395 | int sc_txsdirty; /* dirty Tx jobs */ |
398 | | | 396 | |
399 | /* These 5 variables are used only on the 82547. */ | | 397 | /* These 5 variables are used only on the 82547. */ |
400 | int sc_txfifo_size; /* Tx FIFO size */ | | 398 | int sc_txfifo_size; /* Tx FIFO size */ |
401 | int sc_txfifo_head; /* current head of FIFO */ | | 399 | int sc_txfifo_head; /* current head of FIFO */ |
402 | uint32_t sc_txfifo_addr; /* internal address of start of FIFO */ | | 400 | uint32_t sc_txfifo_addr; /* internal address of start of FIFO */ |
403 | int sc_txfifo_stall; /* Tx FIFO is stalled */ | | 401 | int sc_txfifo_stall; /* Tx FIFO is stalled */ |
404 | callout_t sc_txfifo_ch; /* Tx FIFO stall work-around timer */ | | 402 | callout_t sc_txfifo_ch; /* Tx FIFO stall work-around timer */ |
405 | | | 403 | |
406 | bus_addr_t sc_rdt_reg; /* offset of RDT register */ | | 404 | bus_addr_t sc_rdt_reg; /* offset of RDT register */ |
407 | | | 405 | |
408 | int sc_rxptr; /* next ready Rx descriptor/queue ent */ | | 406 | int sc_rxptr; /* next ready Rx descriptor/queue ent */ |
409 | int sc_rxdiscard; | | 407 | int sc_rxdiscard; |
410 | int sc_rxlen; | | 408 | int sc_rxlen; |
411 | struct mbuf *sc_rxhead; | | 409 | struct mbuf *sc_rxhead; |
412 | struct mbuf *sc_rxtail; | | 410 | struct mbuf *sc_rxtail; |
413 | struct mbuf **sc_rxtailp; | | 411 | struct mbuf **sc_rxtailp; |
414 | | | 412 | |
415 | uint32_t sc_ctrl; /* prototype CTRL register */ | | 413 | uint32_t sc_ctrl; /* prototype CTRL register */ |
416 | #if 0 | | 414 | #if 0 |
417 | uint32_t sc_ctrl_ext; /* prototype CTRL_EXT register */ | | 415 | uint32_t sc_ctrl_ext; /* prototype CTRL_EXT register */ |
418 | #endif | | 416 | #endif |
419 | uint32_t sc_icr; /* prototype interrupt bits */ | | 417 | uint32_t sc_icr; /* prototype interrupt bits */ |
420 | uint32_t sc_itr; /* prototype intr throttling reg */ | | 418 | uint32_t sc_itr; /* prototype intr throttling reg */ |
421 | uint32_t sc_tctl; /* prototype TCTL register */ | | 419 | uint32_t sc_tctl; /* prototype TCTL register */ |
422 | uint32_t sc_rctl; /* prototype RCTL register */ | | 420 | uint32_t sc_rctl; /* prototype RCTL register */ |
423 | uint32_t sc_txcw; /* prototype TXCW register */ | | 421 | uint32_t sc_txcw; /* prototype TXCW register */ |
424 | uint32_t sc_tipg; /* prototype TIPG register */ | | 422 | uint32_t sc_tipg; /* prototype TIPG register */ |
425 | uint32_t sc_fcrtl; /* prototype FCRTL register */ | | 423 | uint32_t sc_fcrtl; /* prototype FCRTL register */ |
426 | uint32_t sc_pba; /* prototype PBA register */ | | 424 | uint32_t sc_pba; /* prototype PBA register */ |
427 | | | 425 | |
428 | int sc_tbi_linkup; /* TBI link status */ | | 426 | int sc_tbi_linkup; /* TBI link status */ |
429 | int sc_tbi_serdes_anegticks; /* autonegotiation ticks */ | | 427 | int sc_tbi_serdes_anegticks; /* autonegotiation ticks */ |
430 | int sc_tbi_serdes_ticks; /* tbi ticks */ | | 428 | int sc_tbi_serdes_ticks; /* tbi ticks */ |
431 | | | 429 | |
432 | int sc_mchash_type; /* multicast filter offset */ | | 430 | int sc_mchash_type; /* multicast filter offset */ |
433 | | | 431 | |
434 | krndsource_t rnd_source; /* random source */ | | 432 | krndsource_t rnd_source; /* random source */ |
435 | | | 433 | |
436 | kmutex_t *sc_tx_lock; /* lock for tx operations */ | | 434 | kmutex_t *sc_tx_lock; /* lock for tx operations */ |
437 | kmutex_t *sc_rx_lock; /* lock for rx operations */ | | 435 | kmutex_t *sc_rx_lock; /* lock for rx operations */ |
438 | }; | | 436 | }; |
439 | | | 437 | |
440 | #define WM_TX_LOCK(_sc) if ((_sc)->sc_tx_lock) mutex_enter((_sc)->sc_tx_lock) | | 438 | #define WM_TX_LOCK(_sc) if ((_sc)->sc_tx_lock) mutex_enter((_sc)->sc_tx_lock) |
441 | #define WM_TX_UNLOCK(_sc) if ((_sc)->sc_tx_lock) mutex_exit((_sc)->sc_tx_lock) | | 439 | #define WM_TX_UNLOCK(_sc) if ((_sc)->sc_tx_lock) mutex_exit((_sc)->sc_tx_lock) |
442 | #define WM_TX_LOCKED(_sc) (!(_sc)->sc_tx_lock || mutex_owned((_sc)->sc_tx_lock)) | | 440 | #define WM_TX_LOCKED(_sc) (!(_sc)->sc_tx_lock || mutex_owned((_sc)->sc_tx_lock)) |
443 | #define WM_RX_LOCK(_sc) if ((_sc)->sc_rx_lock) mutex_enter((_sc)->sc_rx_lock) | | 441 | #define WM_RX_LOCK(_sc) if ((_sc)->sc_rx_lock) mutex_enter((_sc)->sc_rx_lock) |
444 | #define WM_RX_UNLOCK(_sc) if ((_sc)->sc_rx_lock) mutex_exit((_sc)->sc_rx_lock) | | 442 | #define WM_RX_UNLOCK(_sc) if ((_sc)->sc_rx_lock) mutex_exit((_sc)->sc_rx_lock) |
445 | #define WM_RX_LOCKED(_sc) (!(_sc)->sc_rx_lock || mutex_owned((_sc)->sc_rx_lock)) | | 443 | #define WM_RX_LOCKED(_sc) (!(_sc)->sc_rx_lock || mutex_owned((_sc)->sc_rx_lock)) |
446 | #define WM_BOTH_LOCK(_sc) do {WM_TX_LOCK(_sc); WM_RX_LOCK(_sc);} while (0) | | 444 | #define WM_BOTH_LOCK(_sc) do {WM_TX_LOCK(_sc); WM_RX_LOCK(_sc);} while (0) |
447 | #define WM_BOTH_UNLOCK(_sc) do {WM_RX_UNLOCK(_sc); WM_TX_UNLOCK(_sc);} while (0) | | 445 | #define WM_BOTH_UNLOCK(_sc) do {WM_RX_UNLOCK(_sc); WM_TX_UNLOCK(_sc);} while (0) |
448 | #define WM_BOTH_LOCKED(_sc) (WM_TX_LOCKED(_sc) && WM_RX_LOCKED(_sc)) | | 446 | #define WM_BOTH_LOCKED(_sc) (WM_TX_LOCKED(_sc) && WM_RX_LOCKED(_sc)) |
449 | | | 447 | |
450 | #ifdef WM_MPSAFE | | 448 | #ifdef WM_MPSAFE |
451 | #define CALLOUT_FLAGS CALLOUT_MPSAFE | | 449 | #define CALLOUT_FLAGS CALLOUT_MPSAFE |
452 | #else | | 450 | #else |
453 | #define CALLOUT_FLAGS 0 | | 451 | #define CALLOUT_FLAGS 0 |
454 | #endif | | 452 | #endif |
455 | | | 453 | |
456 | #define WM_RXCHAIN_RESET(sc) \ | | 454 | #define WM_RXCHAIN_RESET(sc) \ |
457 | do { \ | | 455 | do { \ |
458 | (sc)->sc_rxtailp = &(sc)->sc_rxhead; \ | | 456 | (sc)->sc_rxtailp = &(sc)->sc_rxhead; \ |
459 | *(sc)->sc_rxtailp = NULL; \ | | 457 | *(sc)->sc_rxtailp = NULL; \ |
460 | (sc)->sc_rxlen = 0; \ | | 458 | (sc)->sc_rxlen = 0; \ |
461 | } while (/*CONSTCOND*/0) | | 459 | } while (/*CONSTCOND*/0) |
462 | | | 460 | |
463 | #define WM_RXCHAIN_LINK(sc, m) \ | | 461 | #define WM_RXCHAIN_LINK(sc, m) \ |
464 | do { \ | | 462 | do { \ |
465 | *(sc)->sc_rxtailp = (sc)->sc_rxtail = (m); \ | | 463 | *(sc)->sc_rxtailp = (sc)->sc_rxtail = (m); \ |
466 | (sc)->sc_rxtailp = &(m)->m_next; \ | | 464 | (sc)->sc_rxtailp = &(m)->m_next; \ |
467 | } while (/*CONSTCOND*/0) | | 465 | } while (/*CONSTCOND*/0) |
468 | | | 466 | |
469 | #ifdef WM_EVENT_COUNTERS | | 467 | #ifdef WM_EVENT_COUNTERS |
470 | #define WM_EVCNT_INCR(ev) (ev)->ev_count++ | | 468 | #define WM_EVCNT_INCR(ev) (ev)->ev_count++ |
471 | #define WM_EVCNT_ADD(ev, val) (ev)->ev_count += (val) | | 469 | #define WM_EVCNT_ADD(ev, val) (ev)->ev_count += (val) |
472 | #else | | 470 | #else |
473 | #define WM_EVCNT_INCR(ev) /* nothing */ | | 471 | #define WM_EVCNT_INCR(ev) /* nothing */ |
474 | #define WM_EVCNT_ADD(ev, val) /* nothing */ | | 472 | #define WM_EVCNT_ADD(ev, val) /* nothing */ |
475 | #endif | | 473 | #endif |
476 | | | 474 | |
477 | #define CSR_READ(sc, reg) \ | | 475 | #define CSR_READ(sc, reg) \ |
478 | bus_space_read_4((sc)->sc_st, (sc)->sc_sh, (reg)) | | 476 | bus_space_read_4((sc)->sc_st, (sc)->sc_sh, (reg)) |
479 | #define CSR_WRITE(sc, reg, val) \ | | 477 | #define CSR_WRITE(sc, reg, val) \ |
480 | bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val)) | | 478 | bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val)) |
481 | #define CSR_WRITE_FLUSH(sc) \ | | 479 | #define CSR_WRITE_FLUSH(sc) \ |
482 | (void) CSR_READ((sc), WMREG_STATUS) | | 480 | (void) CSR_READ((sc), WMREG_STATUS) |
483 | | | 481 | |
484 | #define ICH8_FLASH_READ32(sc, reg) \ | | 482 | #define ICH8_FLASH_READ32(sc, reg) \ |
485 | bus_space_read_4((sc)->sc_flasht, (sc)->sc_flashh, (reg)) | | 483 | bus_space_read_4((sc)->sc_flasht, (sc)->sc_flashh, (reg)) |
486 | #define ICH8_FLASH_WRITE32(sc, reg, data) \ | | 484 | #define ICH8_FLASH_WRITE32(sc, reg, data) \ |
487 | bus_space_write_4((sc)->sc_flasht, (sc)->sc_flashh, (reg), (data)) | | 485 | bus_space_write_4((sc)->sc_flasht, (sc)->sc_flashh, (reg), (data)) |
488 | | | 486 | |
489 | #define ICH8_FLASH_READ16(sc, reg) \ | | 487 | #define ICH8_FLASH_READ16(sc, reg) \ |
490 | bus_space_read_2((sc)->sc_flasht, (sc)->sc_flashh, (reg)) | | 488 | bus_space_read_2((sc)->sc_flasht, (sc)->sc_flashh, (reg)) |
491 | #define ICH8_FLASH_WRITE16(sc, reg, data) \ | | 489 | #define ICH8_FLASH_WRITE16(sc, reg, data) \ |
492 | bus_space_write_2((sc)->sc_flasht, (sc)->sc_flashh, (reg), (data)) | | 490 | bus_space_write_2((sc)->sc_flasht, (sc)->sc_flashh, (reg), (data)) |
493 | | | 491 | |
494 | #define WM_CDTXADDR(sc, x) ((sc)->sc_cddma + WM_CDTXOFF((x))) | | 492 | #define WM_CDTXADDR(sc, x) ((sc)->sc_cddma + WM_CDTXOFF((x))) |
495 | #define WM_CDRXADDR(sc, x) ((sc)->sc_cddma + WM_CDRXOFF((x))) | | 493 | #define WM_CDRXADDR(sc, x) ((sc)->sc_cddma + WM_CDRXOFF((x))) |
496 | | | 494 | |
497 | #define WM_CDTXADDR_LO(sc, x) (WM_CDTXADDR((sc), (x)) & 0xffffffffU) | | 495 | #define WM_CDTXADDR_LO(sc, x) (WM_CDTXADDR((sc), (x)) & 0xffffffffU) |
498 | #define WM_CDTXADDR_HI(sc, x) \ | | 496 | #define WM_CDTXADDR_HI(sc, x) \ |
499 | (sizeof(bus_addr_t) == 8 ? \ | | 497 | (sizeof(bus_addr_t) == 8 ? \ |
500 | (uint64_t)WM_CDTXADDR((sc), (x)) >> 32 : 0) | | 498 | (uint64_t)WM_CDTXADDR((sc), (x)) >> 32 : 0) |
501 | | | 499 | |
502 | #define WM_CDRXADDR_LO(sc, x) (WM_CDRXADDR((sc), (x)) & 0xffffffffU) | | 500 | #define WM_CDRXADDR_LO(sc, x) (WM_CDRXADDR((sc), (x)) & 0xffffffffU) |
503 | #define WM_CDRXADDR_HI(sc, x) \ | | 501 | #define WM_CDRXADDR_HI(sc, x) \ |
504 | (sizeof(bus_addr_t) == 8 ? \ | | 502 | (sizeof(bus_addr_t) == 8 ? \ |
505 | (uint64_t)WM_CDRXADDR((sc), (x)) >> 32 : 0) | | 503 | (uint64_t)WM_CDRXADDR((sc), (x)) >> 32 : 0) |
506 | | | 504 | |
507 | #define WM_CDTXSYNC(sc, x, n, ops) \ | | 505 | #define WM_CDTXSYNC(sc, x, n, ops) \ |
508 | do { \ | | 506 | do { \ |
509 | int __x, __n; \ | | 507 | int __x, __n; \ |
510 | \ | | 508 | \ |
511 | __x = (x); \ | | 509 | __x = (x); \ |
512 | __n = (n); \ | | 510 | __n = (n); \ |
513 | \ | | 511 | \ |
514 | /* If it will wrap around, sync to the end of the ring. */ \ | | 512 | /* If it will wrap around, sync to the end of the ring. */ \ |
515 | if ((__x + __n) > WM_NTXDESC(sc)) { \ | | 513 | if ((__x + __n) > WM_NTXDESC(sc)) { \ |
516 | bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap, \ | | 514 | bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap, \ |
517 | WM_CDTXOFF(__x), sizeof(wiseman_txdesc_t) * \ | | 515 | WM_CDTXOFF(__x), sizeof(wiseman_txdesc_t) * \ |
518 | (WM_NTXDESC(sc) - __x), (ops)); \ | | 516 | (WM_NTXDESC(sc) - __x), (ops)); \ |
519 | __n -= (WM_NTXDESC(sc) - __x); \ | | 517 | __n -= (WM_NTXDESC(sc) - __x); \ |
520 | __x = 0; \ | | 518 | __x = 0; \ |
521 | } \ | | 519 | } \ |
522 | \ | | 520 | \ |
523 | /* Now sync whatever is left. */ \ | | 521 | /* Now sync whatever is left. */ \ |
524 | bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap, \ | | 522 | bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap, \ |
525 | WM_CDTXOFF(__x), sizeof(wiseman_txdesc_t) * __n, (ops)); \ | | 523 | WM_CDTXOFF(__x), sizeof(wiseman_txdesc_t) * __n, (ops)); \ |
526 | } while (/*CONSTCOND*/0) | | 524 | } while (/*CONSTCOND*/0) |
527 | | | 525 | |
528 | #define WM_CDRXSYNC(sc, x, ops) \ | | 526 | #define WM_CDRXSYNC(sc, x, ops) \ |
529 | do { \ | | 527 | do { \ |
530 | bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap, \ | | 528 | bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap, \ |
531 | WM_CDRXOFF((x)), sizeof(wiseman_rxdesc_t), (ops)); \ | | 529 | WM_CDRXOFF((x)), sizeof(wiseman_rxdesc_t), (ops)); \ |
532 | } while (/*CONSTCOND*/0) | | 530 | } while (/*CONSTCOND*/0) |
533 | | | 531 | |
534 | #define WM_INIT_RXDESC(sc, x) \ | | 532 | #define WM_INIT_RXDESC(sc, x) \ |
535 | do { \ | | 533 | do { \ |
536 | struct wm_rxsoft *__rxs = &(sc)->sc_rxsoft[(x)]; \ | | 534 | struct wm_rxsoft *__rxs = &(sc)->sc_rxsoft[(x)]; \ |
537 | wiseman_rxdesc_t *__rxd = &(sc)->sc_rxdescs[(x)]; \ | | 535 | wiseman_rxdesc_t *__rxd = &(sc)->sc_rxdescs[(x)]; \ |
538 | struct mbuf *__m = __rxs->rxs_mbuf; \ | | 536 | struct mbuf *__m = __rxs->rxs_mbuf; \ |
539 | \ | | 537 | \ |
540 | /* \ | | 538 | /* \ |
541 | * Note: We scoot the packet forward 2 bytes in the buffer \ | | 539 | * Note: We scoot the packet forward 2 bytes in the buffer \ |
542 | * so that the payload after the Ethernet header is aligned \ | | 540 | * so that the payload after the Ethernet header is aligned \ |
543 | * to a 4-byte boundary. \ | | 541 | * to a 4-byte boundary. \ |
544 | * \ | | 542 | * \ |
545 | * XXX BRAINDAMAGE ALERT! \ | | 543 | * XXX BRAINDAMAGE ALERT! \ |
546 | * The stupid chip uses the same size for every buffer, which \ | | 544 | * The stupid chip uses the same size for every buffer, which \ |
547 | * is set in the Receive Control register. We are using the 2K \ | | 545 | * is set in the Receive Control register. We are using the 2K \ |
548 | * size option, but what we REALLY want is (2K - 2)! For this \ | | 546 | * size option, but what we REALLY want is (2K - 2)! For this \ |
549 | * reason, we can't "scoot" packets longer than the standard \ | | 547 | * reason, we can't "scoot" packets longer than the standard \ |
550 | * Ethernet MTU. On strict-alignment platforms, if the total \ | | 548 | * Ethernet MTU. On strict-alignment platforms, if the total \ |
551 | * size exceeds (2K - 2) we set align_tweak to 0 and let \ | | 549 | * size exceeds (2K - 2) we set align_tweak to 0 and let \ |
552 | * the upper layer copy the headers. \ | | 550 | * the upper layer copy the headers. \ |
553 | */ \ | | 551 | */ \ |
554 | __m->m_data = __m->m_ext.ext_buf + (sc)->sc_align_tweak; \ | | 552 | __m->m_data = __m->m_ext.ext_buf + (sc)->sc_align_tweak; \ |
555 | \ | | 553 | \ |
556 | wm_set_dma_addr(&__rxd->wrx_addr, \ | | 554 | wm_set_dma_addr(&__rxd->wrx_addr, \ |
557 | __rxs->rxs_dmamap->dm_segs[0].ds_addr + (sc)->sc_align_tweak); \ | | 555 | __rxs->rxs_dmamap->dm_segs[0].ds_addr + (sc)->sc_align_tweak); \ |
558 | __rxd->wrx_len = 0; \ | | 556 | __rxd->wrx_len = 0; \ |
559 | __rxd->wrx_cksum = 0; \ | | 557 | __rxd->wrx_cksum = 0; \ |
560 | __rxd->wrx_status = 0; \ | | 558 | __rxd->wrx_status = 0; \ |
561 | __rxd->wrx_errors = 0; \ | | 559 | __rxd->wrx_errors = 0; \ |
562 | __rxd->wrx_special = 0; \ | | 560 | __rxd->wrx_special = 0; \ |
563 | WM_CDRXSYNC((sc), (x), BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); \ | | 561 | WM_CDRXSYNC((sc), (x), BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); \ |
564 | \ | | 562 | \ |
565 | CSR_WRITE((sc), (sc)->sc_rdt_reg, (x)); \ | | 563 | CSR_WRITE((sc), (sc)->sc_rdt_reg, (x)); \ |
566 | } while (/*CONSTCOND*/0) | | 564 | } while (/*CONSTCOND*/0) |
567 | | | 565 | |
568 | /* | | 566 | /* |
569 | * Register read/write functions. | | 567 | * Register read/write functions. |
570 | * Other than CSR_{READ|WRITE}(). | | 568 | * Other than CSR_{READ|WRITE}(). |
571 | */ | | 569 | */ |
572 | #if 0 | | 570 | #if 0 |
573 | static inline uint32_t wm_io_read(struct wm_softc *, int); | | 571 | static inline uint32_t wm_io_read(struct wm_softc *, int); |
574 | #endif | | 572 | #endif |
575 | static inline void wm_io_write(struct wm_softc *, int, uint32_t); | | 573 | static inline void wm_io_write(struct wm_softc *, int, uint32_t); |
576 | static inline void wm_82575_write_8bit_ctlr_reg(struct wm_softc *, uint32_t, | | 574 | static inline void wm_82575_write_8bit_ctlr_reg(struct wm_softc *, uint32_t, |
577 | uint32_t, uint32_t); | | 575 | uint32_t, uint32_t); |
578 | static inline void wm_set_dma_addr(volatile wiseman_addr_t *, bus_addr_t); | | 576 | static inline void wm_set_dma_addr(volatile wiseman_addr_t *, bus_addr_t); |
579 | | | 577 | |
580 | /* | | 578 | /* |
581 | * Device driver interface functions and commonly used functions. | | 579 | * Device driver interface functions and commonly used functions. |
582 | * match, attach, detach, init, start, stop, ioctl, watchdog and so on. | | 580 | * match, attach, detach, init, start, stop, ioctl, watchdog and so on. |
583 | */ | | 581 | */ |
584 | static const struct wm_product *wm_lookup(const struct pci_attach_args *); | | 582 | static const struct wm_product *wm_lookup(const struct pci_attach_args *); |
585 | static int wm_match(device_t, cfdata_t, void *); | | 583 | static int wm_match(device_t, cfdata_t, void *); |
586 | static void wm_attach(device_t, device_t, void *); | | 584 | static void wm_attach(device_t, device_t, void *); |
587 | static int wm_detach(device_t, int); | | 585 | static int wm_detach(device_t, int); |
588 | static bool wm_suspend(device_t, const pmf_qual_t *); | | 586 | static bool wm_suspend(device_t, const pmf_qual_t *); |
589 | static bool wm_resume(device_t, const pmf_qual_t *); | | 587 | static bool wm_resume(device_t, const pmf_qual_t *); |
590 | static void wm_watchdog(struct ifnet *); | | 588 | static void wm_watchdog(struct ifnet *); |
591 | static void wm_tick(void *); | | 589 | static void wm_tick(void *); |
592 | static int wm_ifflags_cb(struct ethercom *); | | 590 | static int wm_ifflags_cb(struct ethercom *); |
593 | static int wm_ioctl(struct ifnet *, u_long, void *); | | 591 | static int wm_ioctl(struct ifnet *, u_long, void *); |
594 | /* MAC address related */ | | 592 | /* MAC address related */ |
595 | static uint16_t wm_check_alt_mac_addr(struct wm_softc *); | | 593 | static uint16_t wm_check_alt_mac_addr(struct wm_softc *); |
596 | static int wm_read_mac_addr(struct wm_softc *, uint8_t *); | | 594 | static int wm_read_mac_addr(struct wm_softc *, uint8_t *); |
597 | static void wm_set_ral(struct wm_softc *, const uint8_t *, int); | | 595 | static void wm_set_ral(struct wm_softc *, const uint8_t *, int); |
598 | static uint32_t wm_mchash(struct wm_softc *, const uint8_t *); | | 596 | static uint32_t wm_mchash(struct wm_softc *, const uint8_t *); |
599 | static void wm_set_filter(struct wm_softc *); | | 597 | static void wm_set_filter(struct wm_softc *); |
600 | /* Reset and init related */ | | 598 | /* Reset and init related */ |
601 | static void wm_set_vlan(struct wm_softc *); | | 599 | static void wm_set_vlan(struct wm_softc *); |
602 | static void wm_set_pcie_completion_timeout(struct wm_softc *); | | 600 | static void wm_set_pcie_completion_timeout(struct wm_softc *); |
603 | static void wm_get_auto_rd_done(struct wm_softc *); | | 601 | static void wm_get_auto_rd_done(struct wm_softc *); |
604 | static void wm_lan_init_done(struct wm_softc *); | | 602 | static void wm_lan_init_done(struct wm_softc *); |
605 | static void wm_get_cfg_done(struct wm_softc *); | | 603 | static void wm_get_cfg_done(struct wm_softc *); |
606 | static void wm_initialize_hardware_bits(struct wm_softc *); | | 604 | static void wm_initialize_hardware_bits(struct wm_softc *); |
607 | static uint32_t wm_rxpbs_adjust_82580(uint32_t); | | 605 | static uint32_t wm_rxpbs_adjust_82580(uint32_t); |
608 | static void wm_reset(struct wm_softc *); | | 606 | static void wm_reset(struct wm_softc *); |
609 | static int wm_add_rxbuf(struct wm_softc *, int); | | 607 | static int wm_add_rxbuf(struct wm_softc *, int); |
610 | static void wm_rxdrain(struct wm_softc *); | | 608 | static void wm_rxdrain(struct wm_softc *); |
611 | static int wm_init(struct ifnet *); | | 609 | static int wm_init(struct ifnet *); |
612 | static int wm_init_locked(struct ifnet *); | | 610 | static int wm_init_locked(struct ifnet *); |
613 | static void wm_stop(struct ifnet *, int); | | 611 | static void wm_stop(struct ifnet *, int); |
614 | static void wm_stop_locked(struct ifnet *, int); | | 612 | static void wm_stop_locked(struct ifnet *, int); |
615 | static int wm_tx_offload(struct wm_softc *, struct wm_txsoft *, | | 613 | static int wm_tx_offload(struct wm_softc *, struct wm_txsoft *, |
616 | uint32_t *, uint8_t *); | | 614 | uint32_t *, uint8_t *); |
617 | static void wm_dump_mbuf_chain(struct wm_softc *, struct mbuf *); | | 615 | static void wm_dump_mbuf_chain(struct wm_softc *, struct mbuf *); |
618 | static void wm_82547_txfifo_stall(void *); | | 616 | static void wm_82547_txfifo_stall(void *); |
619 | static int wm_82547_txfifo_bugchk(struct wm_softc *, struct mbuf *); | | 617 | static int wm_82547_txfifo_bugchk(struct wm_softc *, struct mbuf *); |
620 | /* Start */ | | 618 | /* Start */ |
621 | static void wm_start(struct ifnet *); | | 619 | static void wm_start(struct ifnet *); |
622 | static void wm_start_locked(struct ifnet *); | | 620 | static void wm_start_locked(struct ifnet *); |
623 | static int wm_nq_tx_offload(struct wm_softc *, struct wm_txsoft *, | | 621 | static int wm_nq_tx_offload(struct wm_softc *, struct wm_txsoft *, |
624 | uint32_t *, uint32_t *, bool *); | | 622 | uint32_t *, uint32_t *, bool *); |
625 | static void wm_nq_start(struct ifnet *); | | 623 | static void wm_nq_start(struct ifnet *); |
626 | static void wm_nq_start_locked(struct ifnet *); | | 624 | static void wm_nq_start_locked(struct ifnet *); |
627 | /* Interrupt */ | | 625 | /* Interrupt */ |
628 | static int wm_txeof(struct wm_softc *); | | 626 | static int wm_txeof(struct wm_softc *); |
629 | static void wm_rxeof(struct wm_softc *); | | 627 | static void wm_rxeof(struct wm_softc *); |
630 | static void wm_linkintr_gmii(struct wm_softc *, uint32_t); | | 628 | static void wm_linkintr_gmii(struct wm_softc *, uint32_t); |
631 | static void wm_linkintr_tbi(struct wm_softc *, uint32_t); | | 629 | static void wm_linkintr_tbi(struct wm_softc *, uint32_t); |
632 | static void wm_linkintr_serdes(struct wm_softc *, uint32_t); | | 630 | static void wm_linkintr_serdes(struct wm_softc *, uint32_t); |
633 | static void wm_linkintr(struct wm_softc *, uint32_t); | | 631 | static void wm_linkintr(struct wm_softc *, uint32_t); |
634 | static int wm_intr_legacy(void *); | | 632 | static int wm_intr_legacy(void *); |
635 | #ifdef WM_MSI_MSIX | | 633 | #ifdef WM_MSI_MSIX |
636 | static int wm_txintr_msix(void *); | | 634 | static int wm_txintr_msix(void *); |
637 | static int wm_rxintr_msix(void *); | | 635 | static int wm_rxintr_msix(void *); |
638 | static int wm_linkintr_msix(void *); | | 636 | static int wm_linkintr_msix(void *); |
639 | #endif | | 637 | #endif |
640 | | | 638 | |
641 | /* | | 639 | /* |
642 | * Media related. | | 640 | * Media related. |
643 | * GMII, SGMII, TBI, SERDES and SFP. | | 641 | * GMII, SGMII, TBI, SERDES and SFP. |
644 | */ | | 642 | */ |
645 | /* Common */ | | 643 | /* Common */ |
646 | static void wm_tbi_serdes_set_linkled(struct wm_softc *); | | 644 | static void wm_tbi_serdes_set_linkled(struct wm_softc *); |
647 | /* GMII related */ | | 645 | /* GMII related */ |
648 | static void wm_gmii_reset(struct wm_softc *); | | 646 | static void wm_gmii_reset(struct wm_softc *); |
649 | static int wm_get_phy_id_82575(struct wm_softc *); | | 647 | static int wm_get_phy_id_82575(struct wm_softc *); |
650 | static void wm_gmii_mediainit(struct wm_softc *, pci_product_id_t); | | 648 | static void wm_gmii_mediainit(struct wm_softc *, pci_product_id_t); |
651 | static int wm_gmii_mediachange(struct ifnet *); | | 649 | static int wm_gmii_mediachange(struct ifnet *); |
652 | static void wm_gmii_mediastatus(struct ifnet *, struct ifmediareq *); | | 650 | static void wm_gmii_mediastatus(struct ifnet *, struct ifmediareq *); |
653 | static void wm_i82543_mii_sendbits(struct wm_softc *, uint32_t, int); | | 651 | static void wm_i82543_mii_sendbits(struct wm_softc *, uint32_t, int); |
654 | static uint32_t wm_i82543_mii_recvbits(struct wm_softc *); | | 652 | static uint32_t wm_i82543_mii_recvbits(struct wm_softc *); |
655 | static int wm_gmii_i82543_readreg(device_t, int, int); | | 653 | static int wm_gmii_i82543_readreg(device_t, int, int); |
656 | static void wm_gmii_i82543_writereg(device_t, int, int, int); | | 654 | static void wm_gmii_i82543_writereg(device_t, int, int, int); |
657 | static int wm_gmii_i82544_readreg(device_t, int, int); | | 655 | static int wm_gmii_i82544_readreg(device_t, int, int); |
658 | static void wm_gmii_i82544_writereg(device_t, int, int, int); | | 656 | static void wm_gmii_i82544_writereg(device_t, int, int, int); |
659 | static int wm_gmii_i80003_readreg(device_t, int, int); | | 657 | static int wm_gmii_i80003_readreg(device_t, int, int); |
660 | static void wm_gmii_i80003_writereg(device_t, int, int, int); | | 658 | static void wm_gmii_i80003_writereg(device_t, int, int, int); |
661 | static int wm_gmii_bm_readreg(device_t, int, int); | | 659 | static int wm_gmii_bm_readreg(device_t, int, int); |
662 | static void wm_gmii_bm_writereg(device_t, int, int, int); | | 660 | static void wm_gmii_bm_writereg(device_t, int, int, int); |
663 | static void wm_access_phy_wakeup_reg_bm(device_t, int, int16_t *, int); | | 661 | static void wm_access_phy_wakeup_reg_bm(device_t, int, int16_t *, int); |
664 | static int wm_gmii_hv_readreg(device_t, int, int); | | 662 | static int wm_gmii_hv_readreg(device_t, int, int); |
665 | static void wm_gmii_hv_writereg(device_t, int, int, int); | | 663 | static void wm_gmii_hv_writereg(device_t, int, int, int); |
666 | static int wm_gmii_82580_readreg(device_t, int, int); | | 664 | static int wm_gmii_82580_readreg(device_t, int, int); |
667 | static void wm_gmii_82580_writereg(device_t, int, int, int); | | 665 | static void wm_gmii_82580_writereg(device_t, int, int, int); |
668 | static int wm_gmii_gs40g_readreg(device_t, int, int); | | 666 | static int wm_gmii_gs40g_readreg(device_t, int, int); |
669 | static void wm_gmii_gs40g_writereg(device_t, int, int, int); | | 667 | static void wm_gmii_gs40g_writereg(device_t, int, int, int); |
670 | static void wm_gmii_statchg(struct ifnet *); | | 668 | static void wm_gmii_statchg(struct ifnet *); |
671 | static int wm_kmrn_readreg(struct wm_softc *, int); | | 669 | static int wm_kmrn_readreg(struct wm_softc *, int); |
672 | static void wm_kmrn_writereg(struct wm_softc *, int, int); | | 670 | static void wm_kmrn_writereg(struct wm_softc *, int, int); |
673 | /* SGMII */ | | 671 | /* SGMII */ |
674 | static bool wm_sgmii_uses_mdio(struct wm_softc *); | | 672 | static bool wm_sgmii_uses_mdio(struct wm_softc *); |
675 | static int wm_sgmii_readreg(device_t, int, int); | | 673 | static int wm_sgmii_readreg(device_t, int, int); |
676 | static void wm_sgmii_writereg(device_t, int, int, int); | | 674 | static void wm_sgmii_writereg(device_t, int, int, int); |
677 | /* TBI related */ | | 675 | /* TBI related */ |
678 | static void wm_tbi_mediainit(struct wm_softc *); | | 676 | static void wm_tbi_mediainit(struct wm_softc *); |
679 | static int wm_tbi_mediachange(struct ifnet *); | | 677 | static int wm_tbi_mediachange(struct ifnet *); |
680 | static void wm_tbi_mediastatus(struct ifnet *, struct ifmediareq *); | | 678 | static void wm_tbi_mediastatus(struct ifnet *, struct ifmediareq *); |
681 | static int wm_check_for_link(struct wm_softc *); | | 679 | static int wm_check_for_link(struct wm_softc *); |
682 | static void wm_tbi_tick(struct wm_softc *); | | 680 | static void wm_tbi_tick(struct wm_softc *); |
683 | /* SERDES related */ | | 681 | /* SERDES related */ |
684 | static void wm_serdes_power_up_link_82575(struct wm_softc *); | | 682 | static void wm_serdes_power_up_link_82575(struct wm_softc *); |
685 | static int wm_serdes_mediachange(struct ifnet *); | | 683 | static int wm_serdes_mediachange(struct ifnet *); |
686 | static void wm_serdes_mediastatus(struct ifnet *, struct ifmediareq *); | | 684 | static void wm_serdes_mediastatus(struct ifnet *, struct ifmediareq *); |
687 | static void wm_serdes_tick(struct wm_softc *); | | 685 | static void wm_serdes_tick(struct wm_softc *); |
688 | /* SFP related */ | | 686 | /* SFP related */ |
689 | static int wm_sfp_read_data_byte(struct wm_softc *, uint16_t, uint8_t *); | | 687 | static int wm_sfp_read_data_byte(struct wm_softc *, uint16_t, uint8_t *); |
690 | static uint32_t wm_sfp_get_media_type(struct wm_softc *); | | 688 | static uint32_t wm_sfp_get_media_type(struct wm_softc *); |
691 | | | 689 | |
692 | /* | | 690 | /* |
693 | * NVM related. | | 691 | * NVM related. |
694 | * Microwire, SPI (w/wo EERD) and Flash. | | 692 | * Microwire, SPI (w/wo EERD) and Flash. |
695 | */ | | 693 | */ |
696 | /* Misc functions */ | | 694 | /* Misc functions */ |
697 | static void wm_eeprom_sendbits(struct wm_softc *, uint32_t, int); | | 695 | static void wm_eeprom_sendbits(struct wm_softc *, uint32_t, int); |
698 | static void wm_eeprom_recvbits(struct wm_softc *, uint32_t *, int); | | 696 | static void wm_eeprom_recvbits(struct wm_softc *, uint32_t *, int); |
699 | static int wm_nvm_set_addrbits_size_eecd(struct wm_softc *); | | 697 | static int wm_nvm_set_addrbits_size_eecd(struct wm_softc *); |
700 | /* Microwire */ | | 698 | /* Microwire */ |
701 | static int wm_nvm_read_uwire(struct wm_softc *, int, int, uint16_t *); | | 699 | static int wm_nvm_read_uwire(struct wm_softc *, int, int, uint16_t *); |
702 | /* SPI */ | | 700 | /* SPI */ |
703 | static int wm_nvm_ready_spi(struct wm_softc *); | | 701 | static int wm_nvm_ready_spi(struct wm_softc *); |
704 | static int wm_nvm_read_spi(struct wm_softc *, int, int, uint16_t *); | | 702 | static int wm_nvm_read_spi(struct wm_softc *, int, int, uint16_t *); |
705 | /* Using with EERD */ | | 703 | /* Using with EERD */ |
706 | static int wm_poll_eerd_eewr_done(struct wm_softc *, int); | | 704 | static int wm_poll_eerd_eewr_done(struct wm_softc *, int); |
707 | static int wm_nvm_read_eerd(struct wm_softc *, int, int, uint16_t *); | | 705 | static int wm_nvm_read_eerd(struct wm_softc *, int, int, uint16_t *); |
708 | /* Flash */ | | 706 | /* Flash */ |
709 | static int wm_nvm_valid_bank_detect_ich8lan(struct wm_softc *, | | 707 | static int wm_nvm_valid_bank_detect_ich8lan(struct wm_softc *, |
710 | unsigned int *); | | 708 | unsigned int *); |
711 | static int32_t wm_ich8_cycle_init(struct wm_softc *); | | 709 | static int32_t wm_ich8_cycle_init(struct wm_softc *); |
712 | static int32_t wm_ich8_flash_cycle(struct wm_softc *, uint32_t); | | 710 | static int32_t wm_ich8_flash_cycle(struct wm_softc *, uint32_t); |
713 | static int32_t wm_read_ich8_data(struct wm_softc *, uint32_t, uint32_t, | | 711 | static int32_t wm_read_ich8_data(struct wm_softc *, uint32_t, uint32_t, |
714 | uint16_t *); | | 712 | uint16_t *); |
715 | static int32_t wm_read_ich8_byte(struct wm_softc *, uint32_t, uint8_t *); | | 713 | static int32_t wm_read_ich8_byte(struct wm_softc *, uint32_t, uint8_t *); |
716 | static int32_t wm_read_ich8_word(struct wm_softc *, uint32_t, uint16_t *); | | 714 | static int32_t wm_read_ich8_word(struct wm_softc *, uint32_t, uint16_t *); |
717 | static int wm_nvm_read_ich8(struct wm_softc *, int, int, uint16_t *); | | 715 | static int wm_nvm_read_ich8(struct wm_softc *, int, int, uint16_t *); |
718 | /* iNVM */ | | 716 | /* iNVM */ |
719 | static int wm_nvm_read_word_invm(struct wm_softc *, uint16_t, uint16_t *); | | 717 | static int wm_nvm_read_word_invm(struct wm_softc *, uint16_t, uint16_t *); |
720 | static int wm_nvm_read_invm(struct wm_softc *, int, int, uint16_t *); | | 718 | static int wm_nvm_read_invm(struct wm_softc *, int, int, uint16_t *); |
721 | /* Lock, detecting NVM type, validate checksum and read */ | | 719 | /* Lock, detecting NVM type, validate checksum and read */ |
722 | static int wm_nvm_acquire(struct wm_softc *); | | 720 | static int wm_nvm_acquire(struct wm_softc *); |
723 | static void wm_nvm_release(struct wm_softc *); | | 721 | static void wm_nvm_release(struct wm_softc *); |
724 | static int wm_nvm_is_onboard_eeprom(struct wm_softc *); | | 722 | static int wm_nvm_is_onboard_eeprom(struct wm_softc *); |
725 | static int wm_nvm_get_flash_presence_i210(struct wm_softc *); | | 723 | static int wm_nvm_get_flash_presence_i210(struct wm_softc *); |
726 | static int wm_nvm_validate_checksum(struct wm_softc *); | | 724 | static int wm_nvm_validate_checksum(struct wm_softc *); |
727 | static void wm_nvm_version(struct wm_softc *); | | 725 | static void wm_nvm_version(struct wm_softc *); |
728 | static int wm_nvm_read(struct wm_softc *, int, int, uint16_t *); | | 726 | static int wm_nvm_read(struct wm_softc *, int, int, uint16_t *); |
729 | | | 727 | |
730 | /* | | 728 | /* |
731 | * Hardware semaphores. | | 729 | * Hardware semaphores. |
732 | * Very complexed... | | 730 | * Very complexed... |
733 | */ | | 731 | */ |
734 | static int wm_get_swsm_semaphore(struct wm_softc *); | | 732 | static int wm_get_swsm_semaphore(struct wm_softc *); |
735 | static void wm_put_swsm_semaphore(struct wm_softc *); | | 733 | static void wm_put_swsm_semaphore(struct wm_softc *); |
736 | static int wm_get_swfw_semaphore(struct wm_softc *, uint16_t); | | 734 | static int wm_get_swfw_semaphore(struct wm_softc *, uint16_t); |
737 | static void wm_put_swfw_semaphore(struct wm_softc *, uint16_t); | | 735 | static void wm_put_swfw_semaphore(struct wm_softc *, uint16_t); |
738 | static int wm_get_swfwhw_semaphore(struct wm_softc *); | | 736 | static int wm_get_swfwhw_semaphore(struct wm_softc *); |
739 | static void wm_put_swfwhw_semaphore(struct wm_softc *); | | 737 | static void wm_put_swfwhw_semaphore(struct wm_softc *); |
740 | static int wm_get_hw_semaphore_82573(struct wm_softc *); | | 738 | static int wm_get_hw_semaphore_82573(struct wm_softc *); |
741 | static void wm_put_hw_semaphore_82573(struct wm_softc *); | | 739 | static void wm_put_hw_semaphore_82573(struct wm_softc *); |
742 | | | 740 | |
743 | /* | | 741 | /* |
744 | * Management mode and power management related subroutines. | | 742 | * Management mode and power management related subroutines. |
745 | * BMC, AMT, suspend/resume and EEE. | | 743 | * BMC, AMT, suspend/resume and EEE. |
746 | */ | | 744 | */ |
747 | static int wm_check_mng_mode(struct wm_softc *); | | 745 | static int wm_check_mng_mode(struct wm_softc *); |
748 | static int wm_check_mng_mode_ich8lan(struct wm_softc *); | | 746 | static int wm_check_mng_mode_ich8lan(struct wm_softc *); |
749 | static int wm_check_mng_mode_82574(struct wm_softc *); | | 747 | static int wm_check_mng_mode_82574(struct wm_softc *); |
750 | static int wm_check_mng_mode_generic(struct wm_softc *); | | 748 | static int wm_check_mng_mode_generic(struct wm_softc *); |
751 | static int wm_enable_mng_pass_thru(struct wm_softc *); | | 749 | static int wm_enable_mng_pass_thru(struct wm_softc *); |
752 | static int wm_check_reset_block(struct wm_softc *); | | 750 | static int wm_check_reset_block(struct wm_softc *); |
753 | static void wm_get_hw_control(struct wm_softc *); | | 751 | static void wm_get_hw_control(struct wm_softc *); |
754 | static void wm_release_hw_control(struct wm_softc *); | | 752 | static void wm_release_hw_control(struct wm_softc *); |
755 | static void wm_gate_hw_phy_config_ich8lan(struct wm_softc *, int); | | 753 | static void wm_gate_hw_phy_config_ich8lan(struct wm_softc *, int); |
756 | static void wm_smbustopci(struct wm_softc *); | | 754 | static void wm_smbustopci(struct wm_softc *); |
757 | static void wm_init_manageability(struct wm_softc *); | | 755 | static void wm_init_manageability(struct wm_softc *); |
758 | static void wm_release_manageability(struct wm_softc *); | | 756 | static void wm_release_manageability(struct wm_softc *); |
759 | static void wm_get_wakeup(struct wm_softc *); | | 757 | static void wm_get_wakeup(struct wm_softc *); |
760 | #ifdef WM_WOL | | 758 | #ifdef WM_WOL |
761 | static void wm_enable_phy_wakeup(struct wm_softc *); | | 759 | static void wm_enable_phy_wakeup(struct wm_softc *); |
762 | static void wm_igp3_phy_powerdown_workaround_ich8lan(struct wm_softc *); | | 760 | static void wm_igp3_phy_powerdown_workaround_ich8lan(struct wm_softc *); |
763 | static void wm_enable_wakeup(struct wm_softc *); | | 761 | static void wm_enable_wakeup(struct wm_softc *); |
764 | #endif | | 762 | #endif |
765 | /* EEE */ | | 763 | /* EEE */ |
766 | static void wm_set_eee_i350(struct wm_softc *); | | 764 | static void wm_set_eee_i350(struct wm_softc *); |
767 | | | 765 | |
768 | /* | | 766 | /* |
769 | * Workarounds (mainly PHY related). | | 767 | * Workarounds (mainly PHY related). |
770 | * Basically, PHY's workarounds are in the PHY drivers. | | 768 | * Basically, PHY's workarounds are in the PHY drivers. |
771 | */ | | 769 | */ |
772 | static void wm_kmrn_lock_loss_workaround_ich8lan(struct wm_softc *); | | 770 | static void wm_kmrn_lock_loss_workaround_ich8lan(struct wm_softc *); |
773 | static void wm_gig_downshift_workaround_ich8lan(struct wm_softc *); | | 771 | static void wm_gig_downshift_workaround_ich8lan(struct wm_softc *); |
774 | static void wm_hv_phy_workaround_ich8lan(struct wm_softc *); | | 772 | static void wm_hv_phy_workaround_ich8lan(struct wm_softc *); |
775 | static void wm_lv_phy_workaround_ich8lan(struct wm_softc *); | | 773 | static void wm_lv_phy_workaround_ich8lan(struct wm_softc *); |
776 | static void wm_k1_gig_workaround_hv(struct wm_softc *, int); | | 774 | static void wm_k1_gig_workaround_hv(struct wm_softc *, int); |
777 | static void wm_set_mdio_slow_mode_hv(struct wm_softc *); | | 775 | static void wm_set_mdio_slow_mode_hv(struct wm_softc *); |
778 | static void wm_configure_k1_ich8lan(struct wm_softc *, int); | | 776 | static void wm_configure_k1_ich8lan(struct wm_softc *, int); |
779 | static void wm_reset_init_script_82575(struct wm_softc *); | | 777 | static void wm_reset_init_script_82575(struct wm_softc *); |
780 | static void wm_reset_mdicnfg_82580(struct wm_softc *); | | 778 | static void wm_reset_mdicnfg_82580(struct wm_softc *); |
781 | static void wm_pll_workaround_i210(struct wm_softc *); | | 779 | static void wm_pll_workaround_i210(struct wm_softc *); |
782 | | | 780 | |
783 | #ifdef WM_MSI_MSIX | | 781 | #ifdef WM_MSI_MSIX |
784 | struct _msix_matrix { | | 782 | struct _msix_matrix { |
785 | const char *intrname; | | 783 | const char *intrname; |
786 | int(*func)(void *); | | 784 | int(*func)(void *); |
787 | int intridx; | | 785 | int intridx; |
788 | int cpuid; | | 786 | int cpuid; |
789 | } msix_matrix[WM_MSIX_NINTR] = { | | 787 | } msix_matrix[WM_MSIX_NINTR] = { |
790 | { "TX", wm_txintr_msix, WM_MSIX_TXINTR_IDX, WM_MSIX_TXINTR_CPUID }, | | 788 | { "TX", wm_txintr_msix, WM_MSIX_TXINTR_IDX, WM_MSIX_TXINTR_CPUID }, |
791 | { "RX", wm_rxintr_msix, WM_MSIX_RXINTR_IDX, WM_MSIX_TXINTR_CPUID }, | | 789 | { "RX", wm_rxintr_msix, WM_MSIX_RXINTR_IDX, WM_MSIX_TXINTR_CPUID }, |
792 | { "LINK", wm_linkintr_msix, WM_MSIX_LINKINTR_IDX, | | 790 | { "LINK", wm_linkintr_msix, WM_MSIX_LINKINTR_IDX, |
793 | WM_MSIX_LINKINTR_CPUID }, | | 791 | WM_MSIX_LINKINTR_CPUID }, |
794 | }; | | 792 | }; |
795 | #endif | | 793 | #endif |
796 | | | 794 | |
797 | CFATTACH_DECL3_NEW(wm, sizeof(struct wm_softc), | | 795 | CFATTACH_DECL3_NEW(wm, sizeof(struct wm_softc), |
798 | wm_match, wm_attach, wm_detach, NULL, NULL, NULL, DVF_DETACH_SHUTDOWN); | | 796 | wm_match, wm_attach, wm_detach, NULL, NULL, NULL, DVF_DETACH_SHUTDOWN); |
799 | | | 797 | |
800 | /* | | 798 | /* |
801 | * Devices supported by this driver. | | 799 | * Devices supported by this driver. |
802 | */ | | 800 | */ |
803 | static const struct wm_product { | | 801 | static const struct wm_product { |
804 | pci_vendor_id_t wmp_vendor; | | 802 | pci_vendor_id_t wmp_vendor; |
805 | pci_product_id_t wmp_product; | | 803 | pci_product_id_t wmp_product; |
806 | const char *wmp_name; | | 804 | const char *wmp_name; |
807 | wm_chip_type wmp_type; | | 805 | wm_chip_type wmp_type; |
808 | uint32_t wmp_flags; | | 806 | uint32_t wmp_flags; |
809 | #define WMP_F_UNKNOWN WM_MEDIATYPE_UNKNOWN | | 807 | #define WMP_F_UNKNOWN WM_MEDIATYPE_UNKNOWN |
810 | #define WMP_F_FIBER WM_MEDIATYPE_FIBER | | 808 | #define WMP_F_FIBER WM_MEDIATYPE_FIBER |
811 | #define WMP_F_COPPER WM_MEDIATYPE_COPPER | | 809 | #define WMP_F_COPPER WM_MEDIATYPE_COPPER |
812 | #define WMP_F_SERDES WM_MEDIATYPE_SERDES | | 810 | #define WMP_F_SERDES WM_MEDIATYPE_SERDES |
813 | #define WMP_MEDIATYPE(x) ((x) & 0x03) | | 811 | #define WMP_MEDIATYPE(x) ((x) & 0x03) |
814 | } wm_products[] = { | | 812 | } wm_products[] = { |
815 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82542, | | 813 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82542, |
816 | "Intel i82542 1000BASE-X Ethernet", | | 814 | "Intel i82542 1000BASE-X Ethernet", |
817 | WM_T_82542_2_1, WMP_F_FIBER }, | | 815 | WM_T_82542_2_1, WMP_F_FIBER }, |
818 | | | 816 | |
819 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82543GC_FIBER, | | 817 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82543GC_FIBER, |
820 | "Intel i82543GC 1000BASE-X Ethernet", | | 818 | "Intel i82543GC 1000BASE-X Ethernet", |
821 | WM_T_82543, WMP_F_FIBER }, | | 819 | WM_T_82543, WMP_F_FIBER }, |
822 | | | 820 | |
823 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82543GC_COPPER, | | 821 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82543GC_COPPER, |
824 | "Intel i82543GC 1000BASE-T Ethernet", | | 822 | "Intel i82543GC 1000BASE-T Ethernet", |
825 | WM_T_82543, WMP_F_COPPER }, | | 823 | WM_T_82543, WMP_F_COPPER }, |
826 | | | 824 | |
827 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82544EI_COPPER, | | 825 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82544EI_COPPER, |
828 | "Intel i82544EI 1000BASE-T Ethernet", | | 826 | "Intel i82544EI 1000BASE-T Ethernet", |
829 | WM_T_82544, WMP_F_COPPER }, | | 827 | WM_T_82544, WMP_F_COPPER }, |
830 | | | 828 | |
831 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82544EI_FIBER, | | 829 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82544EI_FIBER, |
832 | "Intel i82544EI 1000BASE-X Ethernet", | | 830 | "Intel i82544EI 1000BASE-X Ethernet", |
833 | WM_T_82544, WMP_F_FIBER }, | | 831 | WM_T_82544, WMP_F_FIBER }, |
834 | | | 832 | |
835 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82544GC_COPPER, | | 833 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82544GC_COPPER, |
836 | "Intel i82544GC 1000BASE-T Ethernet", | | 834 | "Intel i82544GC 1000BASE-T Ethernet", |
837 | WM_T_82544, WMP_F_COPPER }, | | 835 | WM_T_82544, WMP_F_COPPER }, |
838 | | | 836 | |
839 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82544GC_LOM, | | 837 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82544GC_LOM, |
840 | "Intel i82544GC (LOM) 1000BASE-T Ethernet", | | 838 | "Intel i82544GC (LOM) 1000BASE-T Ethernet", |
841 | WM_T_82544, WMP_F_COPPER }, | | 839 | WM_T_82544, WMP_F_COPPER }, |
842 | | | 840 | |
843 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82540EM, | | 841 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82540EM, |
844 | "Intel i82540EM 1000BASE-T Ethernet", | | 842 | "Intel i82540EM 1000BASE-T Ethernet", |
845 | WM_T_82540, WMP_F_COPPER }, | | 843 | WM_T_82540, WMP_F_COPPER }, |
846 | | | 844 | |
847 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82540EM_LOM, | | 845 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82540EM_LOM, |
848 | "Intel i82540EM (LOM) 1000BASE-T Ethernet", | | 846 | "Intel i82540EM (LOM) 1000BASE-T Ethernet", |
849 | WM_T_82540, WMP_F_COPPER }, | | 847 | WM_T_82540, WMP_F_COPPER }, |
850 | | | 848 | |
851 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82540EP_LOM, | | 849 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82540EP_LOM, |
852 | "Intel i82540EP 1000BASE-T Ethernet", | | 850 | "Intel i82540EP 1000BASE-T Ethernet", |
853 | WM_T_82540, WMP_F_COPPER }, | | 851 | WM_T_82540, WMP_F_COPPER }, |
854 | | | 852 | |
855 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82540EP, | | 853 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82540EP, |
856 | "Intel i82540EP 1000BASE-T Ethernet", | | 854 | "Intel i82540EP 1000BASE-T Ethernet", |
857 | WM_T_82540, WMP_F_COPPER }, | | 855 | WM_T_82540, WMP_F_COPPER }, |
858 | | | 856 | |
859 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82540EP_LP, | | 857 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82540EP_LP, |
860 | "Intel i82540EP 1000BASE-T Ethernet", | | 858 | "Intel i82540EP 1000BASE-T Ethernet", |
861 | WM_T_82540, WMP_F_COPPER }, | | 859 | WM_T_82540, WMP_F_COPPER }, |
862 | | | 860 | |
863 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82545EM_COPPER, | | 861 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82545EM_COPPER, |
864 | "Intel i82545EM 1000BASE-T Ethernet", | | 862 | "Intel i82545EM 1000BASE-T Ethernet", |
865 | WM_T_82545, WMP_F_COPPER }, | | 863 | WM_T_82545, WMP_F_COPPER }, |
866 | | | 864 | |
867 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82545GM_COPPER, | | 865 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82545GM_COPPER, |
868 | "Intel i82545GM 1000BASE-T Ethernet", | | 866 | "Intel i82545GM 1000BASE-T Ethernet", |
869 | WM_T_82545_3, WMP_F_COPPER }, | | 867 | WM_T_82545_3, WMP_F_COPPER }, |
870 | | | 868 | |
871 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82545GM_FIBER, | | 869 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82545GM_FIBER, |
872 | "Intel i82545GM 1000BASE-X Ethernet", | | 870 | "Intel i82545GM 1000BASE-X Ethernet", |
873 | WM_T_82545_3, WMP_F_FIBER }, | | 871 | WM_T_82545_3, WMP_F_FIBER }, |
874 | | | 872 | |
875 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82545GM_SERDES, | | 873 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82545GM_SERDES, |
876 | "Intel i82545GM Gigabit Ethernet (SERDES)", | | 874 | "Intel i82545GM Gigabit Ethernet (SERDES)", |
877 | WM_T_82545_3, WMP_F_SERDES }, | | 875 | WM_T_82545_3, WMP_F_SERDES }, |
878 | | | 876 | |
879 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82546EB_COPPER, | | 877 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82546EB_COPPER, |
880 | "Intel i82546EB 1000BASE-T Ethernet", | | 878 | "Intel i82546EB 1000BASE-T Ethernet", |
881 | WM_T_82546, WMP_F_COPPER }, | | 879 | WM_T_82546, WMP_F_COPPER }, |
882 | | | 880 | |
883 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82546EB_QUAD, | | 881 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82546EB_QUAD, |
884 | "Intel i82546EB 1000BASE-T Ethernet", | | 882 | "Intel i82546EB 1000BASE-T Ethernet", |
885 | WM_T_82546, WMP_F_COPPER }, | | 883 | WM_T_82546, WMP_F_COPPER }, |
886 | | | 884 | |
887 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82545EM_FIBER, | | 885 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82545EM_FIBER, |
888 | "Intel i82545EM 1000BASE-X Ethernet", | | 886 | "Intel i82545EM 1000BASE-X Ethernet", |
889 | WM_T_82545, WMP_F_FIBER }, | | 887 | WM_T_82545, WMP_F_FIBER }, |
890 | | | 888 | |
891 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82546EB_FIBER, | | 889 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82546EB_FIBER, |
892 | "Intel i82546EB 1000BASE-X Ethernet", | | 890 | "Intel i82546EB 1000BASE-X Ethernet", |
893 | WM_T_82546, WMP_F_FIBER }, | | 891 | WM_T_82546, WMP_F_FIBER }, |
894 | | | 892 | |
895 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82546GB_COPPER, | | 893 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82546GB_COPPER, |
896 | "Intel i82546GB 1000BASE-T Ethernet", | | 894 | "Intel i82546GB 1000BASE-T Ethernet", |
897 | WM_T_82546_3, WMP_F_COPPER }, | | 895 | WM_T_82546_3, WMP_F_COPPER }, |
898 | | | 896 | |
899 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82546GB_FIBER, | | 897 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82546GB_FIBER, |
900 | "Intel i82546GB 1000BASE-X Ethernet", | | 898 | "Intel i82546GB 1000BASE-X Ethernet", |
901 | WM_T_82546_3, WMP_F_FIBER }, | | 899 | WM_T_82546_3, WMP_F_FIBER }, |
902 | | | 900 | |
903 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82546GB_SERDES, | | 901 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82546GB_SERDES, |
904 | "Intel i82546GB Gigabit Ethernet (SERDES)", | | 902 | "Intel i82546GB Gigabit Ethernet (SERDES)", |
905 | WM_T_82546_3, WMP_F_SERDES }, | | 903 | WM_T_82546_3, WMP_F_SERDES }, |
906 | | | 904 | |
907 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82546GB_QUAD_COPPER, | | 905 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82546GB_QUAD_COPPER, |
908 | "i82546GB quad-port Gigabit Ethernet", | | 906 | "i82546GB quad-port Gigabit Ethernet", |
909 | WM_T_82546_3, WMP_F_COPPER }, | | 907 | WM_T_82546_3, WMP_F_COPPER }, |
910 | | | 908 | |
911 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82546GB_QUAD_COPPER_KSP3, | | 909 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82546GB_QUAD_COPPER_KSP3, |
912 | "i82546GB quad-port Gigabit Ethernet (KSP3)", | | 910 | "i82546GB quad-port Gigabit Ethernet (KSP3)", |
913 | WM_T_82546_3, WMP_F_COPPER }, | | 911 | WM_T_82546_3, WMP_F_COPPER }, |
914 | | | 912 | |
915 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82546GB_PCIE, | | 913 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82546GB_PCIE, |
916 | "Intel PRO/1000MT (82546GB)", | | 914 | "Intel PRO/1000MT (82546GB)", |
917 | WM_T_82546_3, WMP_F_COPPER }, | | 915 | WM_T_82546_3, WMP_F_COPPER }, |
918 | | | 916 | |
919 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82541EI, | | 917 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82541EI, |
920 | "Intel i82541EI 1000BASE-T Ethernet", | | 918 | "Intel i82541EI 1000BASE-T Ethernet", |
921 | WM_T_82541, WMP_F_COPPER }, | | 919 | WM_T_82541, WMP_F_COPPER }, |
922 | | | 920 | |
923 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82541ER_LOM, | | 921 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82541ER_LOM, |
924 | "Intel i82541ER (LOM) 1000BASE-T Ethernet", | | 922 | "Intel i82541ER (LOM) 1000BASE-T Ethernet", |
925 | WM_T_82541, WMP_F_COPPER }, | | 923 | WM_T_82541, WMP_F_COPPER }, |
926 | | | 924 | |
927 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82541EI_MOBILE, | | 925 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82541EI_MOBILE, |
928 | "Intel i82541EI Mobile 1000BASE-T Ethernet", | | 926 | "Intel i82541EI Mobile 1000BASE-T Ethernet", |
929 | WM_T_82541, WMP_F_COPPER }, | | 927 | WM_T_82541, WMP_F_COPPER }, |
930 | | | 928 | |
931 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82541ER, | | 929 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82541ER, |
932 | "Intel i82541ER 1000BASE-T Ethernet", | | 930 | "Intel i82541ER 1000BASE-T Ethernet", |
933 | WM_T_82541_2, WMP_F_COPPER }, | | 931 | WM_T_82541_2, WMP_F_COPPER }, |
934 | | | 932 | |
935 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82541GI, | | 933 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82541GI, |
936 | "Intel i82541GI 1000BASE-T Ethernet", | | 934 | "Intel i82541GI 1000BASE-T Ethernet", |
937 | WM_T_82541_2, WMP_F_COPPER }, | | 935 | WM_T_82541_2, WMP_F_COPPER }, |
938 | | | 936 | |
939 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82541GI_MOBILE, | | 937 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82541GI_MOBILE, |
940 | "Intel i82541GI Mobile 1000BASE-T Ethernet", | | 938 | "Intel i82541GI Mobile 1000BASE-T Ethernet", |
941 | WM_T_82541_2, WMP_F_COPPER }, | | 939 | WM_T_82541_2, WMP_F_COPPER }, |
942 | | | 940 | |
943 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82541PI, | | 941 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82541PI, |
944 | "Intel i82541PI 1000BASE-T Ethernet", | | 942 | "Intel i82541PI 1000BASE-T Ethernet", |
945 | WM_T_82541_2, WMP_F_COPPER }, | | 943 | WM_T_82541_2, WMP_F_COPPER }, |
946 | | | 944 | |
947 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82547EI, | | 945 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82547EI, |
948 | "Intel i82547EI 1000BASE-T Ethernet", | | 946 | "Intel i82547EI 1000BASE-T Ethernet", |
949 | WM_T_82547, WMP_F_COPPER }, | | 947 | WM_T_82547, WMP_F_COPPER }, |
950 | | | 948 | |
951 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82547EI_MOBILE, | | 949 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82547EI_MOBILE, |
952 | "Intel i82547EI Mobile 1000BASE-T Ethernet", | | 950 | "Intel i82547EI Mobile 1000BASE-T Ethernet", |
953 | WM_T_82547, WMP_F_COPPER }, | | 951 | WM_T_82547, WMP_F_COPPER }, |
954 | | | 952 | |
955 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82547GI, | | 953 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82547GI, |
956 | "Intel i82547GI 1000BASE-T Ethernet", | | 954 | "Intel i82547GI 1000BASE-T Ethernet", |
957 | WM_T_82547_2, WMP_F_COPPER }, | | 955 | WM_T_82547_2, WMP_F_COPPER }, |
958 | | | 956 | |
959 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82571EB_COPPER, | | 957 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82571EB_COPPER, |
960 | "Intel PRO/1000 PT (82571EB)", | | 958 | "Intel PRO/1000 PT (82571EB)", |
961 | WM_T_82571, WMP_F_COPPER }, | | 959 | WM_T_82571, WMP_F_COPPER }, |
962 | | | 960 | |
963 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82571EB_FIBER, | | 961 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82571EB_FIBER, |
964 | "Intel PRO/1000 PF (82571EB)", | | 962 | "Intel PRO/1000 PF (82571EB)", |
965 | WM_T_82571, WMP_F_FIBER }, | | 963 | WM_T_82571, WMP_F_FIBER }, |
966 | | | 964 | |
967 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82571EB_SERDES, | | 965 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82571EB_SERDES, |
968 | "Intel PRO/1000 PB (82571EB)", | | 966 | "Intel PRO/1000 PB (82571EB)", |
969 | WM_T_82571, WMP_F_SERDES }, | | 967 | WM_T_82571, WMP_F_SERDES }, |
970 | | | 968 | |
971 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82571EB_QUAD_COPPER, | | 969 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82571EB_QUAD_COPPER, |
972 | "Intel PRO/1000 QT (82571EB)", | | 970 | "Intel PRO/1000 QT (82571EB)", |
973 | WM_T_82571, WMP_F_COPPER }, | | 971 | WM_T_82571, WMP_F_COPPER }, |
974 | | | 972 | |
975 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82571GB_QUAD_COPPER, | | 973 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82571GB_QUAD_COPPER, |
976 | "Intel PRO/1000 PT Quad Port Server Adapter", | | 974 | "Intel PRO/1000 PT Quad Port Server Adapter", |
977 | WM_T_82571, WMP_F_COPPER, }, | | 975 | WM_T_82571, WMP_F_COPPER, }, |
978 | | | 976 | |
979 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82571PT_QUAD_COPPER, | | 977 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82571PT_QUAD_COPPER, |
980 | "Intel Gigabit PT Quad Port Server ExpressModule", | | 978 | "Intel Gigabit PT Quad Port Server ExpressModule", |
981 | WM_T_82571, WMP_F_COPPER, }, | | 979 | WM_T_82571, WMP_F_COPPER, }, |
982 | | | 980 | |
983 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82571EB_DUAL_SERDES, | | 981 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82571EB_DUAL_SERDES, |
984 | "Intel 82571EB Dual Gigabit Ethernet (SERDES)", | | 982 | "Intel 82571EB Dual Gigabit Ethernet (SERDES)", |
985 | WM_T_82571, WMP_F_SERDES, }, | | 983 | WM_T_82571, WMP_F_SERDES, }, |
986 | | | 984 | |
987 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82571EB_QUAD_SERDES, | | 985 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82571EB_QUAD_SERDES, |
988 | "Intel 82571EB Quad Gigabit Ethernet (SERDES)", | | 986 | "Intel 82571EB Quad Gigabit Ethernet (SERDES)", |
989 | WM_T_82571, WMP_F_SERDES, }, | | 987 | WM_T_82571, WMP_F_SERDES, }, |
990 | | | 988 | |
991 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82571EB_QUAD_FIBER, | | 989 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82571EB_QUAD_FIBER, |
992 | "Intel 82571EB Quad 1000baseX Ethernet", | | 990 | "Intel 82571EB Quad 1000baseX Ethernet", |
993 | WM_T_82571, WMP_F_FIBER, }, | | 991 | WM_T_82571, WMP_F_FIBER, }, |
994 | | | 992 | |
995 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82572EI_COPPER, | | 993 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82572EI_COPPER, |
996 | "Intel i82572EI 1000baseT Ethernet", | | 994 | "Intel i82572EI 1000baseT Ethernet", |
997 | WM_T_82572, WMP_F_COPPER }, | | 995 | WM_T_82572, WMP_F_COPPER }, |
998 | | | 996 | |
999 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82572EI_FIBER, | | 997 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82572EI_FIBER, |
1000 | "Intel i82572EI 1000baseX Ethernet", | | 998 | "Intel i82572EI 1000baseX Ethernet", |
1001 | WM_T_82572, WMP_F_FIBER }, | | 999 | WM_T_82572, WMP_F_FIBER }, |
1002 | | | 1000 | |
1003 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82572EI_SERDES, | | 1001 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82572EI_SERDES, |
1004 | "Intel i82572EI Gigabit Ethernet (SERDES)", | | 1002 | "Intel i82572EI Gigabit Ethernet (SERDES)", |
1005 | WM_T_82572, WMP_F_SERDES }, | | 1003 | WM_T_82572, WMP_F_SERDES }, |
1006 | | | 1004 | |
1007 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82572EI, | | 1005 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82572EI, |
1008 | "Intel i82572EI 1000baseT Ethernet", | | 1006 | "Intel i82572EI 1000baseT Ethernet", |
1009 | WM_T_82572, WMP_F_COPPER }, | | 1007 | WM_T_82572, WMP_F_COPPER }, |
1010 | | | 1008 | |
1011 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82573E, | | 1009 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82573E, |
1012 | "Intel i82573E", | | 1010 | "Intel i82573E", |
1013 | WM_T_82573, WMP_F_COPPER }, | | 1011 | WM_T_82573, WMP_F_COPPER }, |
1014 | | | 1012 | |
1015 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82573E_IAMT, | | 1013 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82573E_IAMT, |
1016 | "Intel i82573E IAMT", | | 1014 | "Intel i82573E IAMT", |
1017 | WM_T_82573, WMP_F_COPPER }, | | 1015 | WM_T_82573, WMP_F_COPPER }, |
1018 | | | 1016 | |
1019 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82573L, | | 1017 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82573L, |
1020 | "Intel i82573L Gigabit Ethernet", | | 1018 | "Intel i82573L Gigabit Ethernet", |
1021 | WM_T_82573, WMP_F_COPPER }, | | 1019 | WM_T_82573, WMP_F_COPPER }, |
1022 | | | 1020 | |
1023 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82574L, | | 1021 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82574L, |
1024 | "Intel i82574L", | | 1022 | "Intel i82574L", |
1025 | WM_T_82574, WMP_F_COPPER }, | | 1023 | WM_T_82574, WMP_F_COPPER }, |
1026 | | | 1024 | |
1027 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82574LA, | | 1025 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82574LA, |
1028 | "Intel i82574L", | | 1026 | "Intel i82574L", |
1029 | WM_T_82574, WMP_F_COPPER }, | | 1027 | WM_T_82574, WMP_F_COPPER }, |
1030 | | | 1028 | |
1031 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82583V, | | 1029 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82583V, |
1032 | "Intel i82583V", | | 1030 | "Intel i82583V", |
1033 | WM_T_82583, WMP_F_COPPER }, | | 1031 | WM_T_82583, WMP_F_COPPER }, |
1034 | | | 1032 | |
1035 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_80K3LAN_CPR_DPT, | | 1033 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_80K3LAN_CPR_DPT, |
1036 | "i80003 dual 1000baseT Ethernet", | | 1034 | "i80003 dual 1000baseT Ethernet", |
1037 | WM_T_80003, WMP_F_COPPER }, | | 1035 | WM_T_80003, WMP_F_COPPER }, |
1038 | | | 1036 | |
1039 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_80K3LAN_FIB_DPT, | | 1037 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_80K3LAN_FIB_DPT, |
1040 | "i80003 dual 1000baseX Ethernet", | | 1038 | "i80003 dual 1000baseX Ethernet", |
1041 | WM_T_80003, WMP_F_COPPER }, | | 1039 | WM_T_80003, WMP_F_COPPER }, |
1042 | | | 1040 | |
1043 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_80K3LAN_SDS_DPT, | | 1041 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_80K3LAN_SDS_DPT, |
1044 | "Intel i80003ES2 dual Gigabit Ethernet (SERDES)", | | 1042 | "Intel i80003ES2 dual Gigabit Ethernet (SERDES)", |
1045 | WM_T_80003, WMP_F_SERDES }, | | 1043 | WM_T_80003, WMP_F_SERDES }, |
1046 | | | 1044 | |
1047 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_80K3LAN_CPR_SPT, | | 1045 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_80K3LAN_CPR_SPT, |
1048 | "Intel i80003 1000baseT Ethernet", | | 1046 | "Intel i80003 1000baseT Ethernet", |
1049 | WM_T_80003, WMP_F_COPPER }, | | 1047 | WM_T_80003, WMP_F_COPPER }, |
1050 | | | 1048 | |
1051 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_80K3LAN_SDS_SPT, | | 1049 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_80K3LAN_SDS_SPT, |
1052 | "Intel i80003 Gigabit Ethernet (SERDES)", | | 1050 | "Intel i80003 Gigabit Ethernet (SERDES)", |
1053 | WM_T_80003, WMP_F_SERDES }, | | 1051 | WM_T_80003, WMP_F_SERDES }, |
1054 | | | 1052 | |
1055 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801H_M_AMT, | | 1053 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801H_M_AMT, |
1056 | "Intel i82801H (M_AMT) LAN Controller", | | 1054 | "Intel i82801H (M_AMT) LAN Controller", |
1057 | WM_T_ICH8, WMP_F_COPPER }, | | 1055 | WM_T_ICH8, WMP_F_COPPER }, |
1058 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801H_AMT, | | 1056 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801H_AMT, |
1059 | "Intel i82801H (AMT) LAN Controller", | | 1057 | "Intel i82801H (AMT) LAN Controller", |
1060 | WM_T_ICH8, WMP_F_COPPER }, | | 1058 | WM_T_ICH8, WMP_F_COPPER }, |
1061 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801H_LAN, | | 1059 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801H_LAN, |
1062 | "Intel i82801H LAN Controller", | | 1060 | "Intel i82801H LAN Controller", |
1063 | WM_T_ICH8, WMP_F_COPPER }, | | 1061 | WM_T_ICH8, WMP_F_COPPER }, |
1064 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801H_IFE_LAN, | | 1062 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801H_IFE_LAN, |
1065 | "Intel i82801H (IFE) LAN Controller", | | 1063 | "Intel i82801H (IFE) LAN Controller", |
1066 | WM_T_ICH8, WMP_F_COPPER }, | | 1064 | WM_T_ICH8, WMP_F_COPPER }, |
1067 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801H_M_LAN, | | 1065 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801H_M_LAN, |
1068 | "Intel i82801H (M) LAN Controller", | | 1066 | "Intel i82801H (M) LAN Controller", |
1069 | WM_T_ICH8, WMP_F_COPPER }, | | 1067 | WM_T_ICH8, WMP_F_COPPER }, |
1070 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801H_IFE_GT, | | 1068 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801H_IFE_GT, |
1071 | "Intel i82801H IFE (GT) LAN Controller", | | 1069 | "Intel i82801H IFE (GT) LAN Controller", |
1072 | WM_T_ICH8, WMP_F_COPPER }, | | 1070 | WM_T_ICH8, WMP_F_COPPER }, |
1073 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801H_IFE_G, | | 1071 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801H_IFE_G, |
1074 | "Intel i82801H IFE (G) LAN Controller", | | 1072 | "Intel i82801H IFE (G) LAN Controller", |
1075 | WM_T_ICH8, WMP_F_COPPER }, | | 1073 | WM_T_ICH8, WMP_F_COPPER }, |
1076 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801I_IGP_AMT, | | 1074 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801I_IGP_AMT, |
1077 | "82801I (AMT) LAN Controller", | | 1075 | "82801I (AMT) LAN Controller", |
1078 | WM_T_ICH9, WMP_F_COPPER }, | | 1076 | WM_T_ICH9, WMP_F_COPPER }, |
1079 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801I_IFE, | | 1077 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801I_IFE, |
1080 | "82801I LAN Controller", | | 1078 | "82801I LAN Controller", |
1081 | WM_T_ICH9, WMP_F_COPPER }, | | 1079 | WM_T_ICH9, WMP_F_COPPER }, |
1082 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801I_IFE_G, | | 1080 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801I_IFE_G, |
1083 | "82801I (G) LAN Controller", | | 1081 | "82801I (G) LAN Controller", |
1084 | WM_T_ICH9, WMP_F_COPPER }, | | 1082 | WM_T_ICH9, WMP_F_COPPER }, |
1085 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801I_IFE_GT, | | 1083 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801I_IFE_GT, |
1086 | "82801I (GT) LAN Controller", | | 1084 | "82801I (GT) LAN Controller", |
1087 | WM_T_ICH9, WMP_F_COPPER }, | | 1085 | WM_T_ICH9, WMP_F_COPPER }, |
1088 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801I_IGP_C, | | 1086 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801I_IGP_C, |
1089 | "82801I (C) LAN Controller", | | 1087 | "82801I (C) LAN Controller", |
1090 | WM_T_ICH9, WMP_F_COPPER }, | | 1088 | WM_T_ICH9, WMP_F_COPPER }, |
1091 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801I_IGP_M, | | 1089 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801I_IGP_M, |
1092 | "82801I mobile LAN Controller", | | 1090 | "82801I mobile LAN Controller", |
1093 | WM_T_ICH9, WMP_F_COPPER }, | | 1091 | WM_T_ICH9, WMP_F_COPPER }, |
1094 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801H_IGP_M_V, | | 1092 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801H_IGP_M_V, |
1095 | "82801I mobile (V) LAN Controller", | | 1093 | "82801I mobile (V) LAN Controller", |
1096 | WM_T_ICH9, WMP_F_COPPER }, | | 1094 | WM_T_ICH9, WMP_F_COPPER }, |
1097 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801I_IGP_M_AMT, | | 1095 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801I_IGP_M_AMT, |
1098 | "82801I mobile (AMT) LAN Controller", | | 1096 | "82801I mobile (AMT) LAN Controller", |
1099 | WM_T_ICH9, WMP_F_COPPER }, | | 1097 | WM_T_ICH9, WMP_F_COPPER }, |
1100 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801I_BM, | | 1098 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801I_BM, |
1101 | "82567LM-4 LAN Controller", | | 1099 | "82567LM-4 LAN Controller", |
1102 | WM_T_ICH9, WMP_F_COPPER }, | | 1100 | WM_T_ICH9, WMP_F_COPPER }, |
1103 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801I_82567V_3, | | 1101 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801I_82567V_3, |
1104 | "82567V-3 LAN Controller", | | 1102 | "82567V-3 LAN Controller", |
1105 | WM_T_ICH9, WMP_F_COPPER }, | | 1103 | WM_T_ICH9, WMP_F_COPPER }, |
1106 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801J_R_BM_LM, | | 1104 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801J_R_BM_LM, |
1107 | "82567LM-2 LAN Controller", | | 1105 | "82567LM-2 LAN Controller", |
1108 | WM_T_ICH10, WMP_F_COPPER }, | | 1106 | WM_T_ICH10, WMP_F_COPPER }, |
1109 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801J_R_BM_LF, | | 1107 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801J_R_BM_LF, |
1110 | "82567LF-2 LAN Controller", | | 1108 | "82567LF-2 LAN Controller", |
1111 | WM_T_ICH10, WMP_F_COPPER }, | | 1109 | WM_T_ICH10, WMP_F_COPPER }, |
1112 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801J_D_BM_LM, | | 1110 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801J_D_BM_LM, |
1113 | "82567LM-3 LAN Controller", | | 1111 | "82567LM-3 LAN Controller", |
1114 | WM_T_ICH10, WMP_F_COPPER }, | | 1112 | WM_T_ICH10, WMP_F_COPPER }, |
1115 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801J_D_BM_LF, | | 1113 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801J_D_BM_LF, |
1116 | "82567LF-3 LAN Controller", | | 1114 | "82567LF-3 LAN Controller", |
1117 | WM_T_ICH10, WMP_F_COPPER }, | | 1115 | WM_T_ICH10, WMP_F_COPPER }, |
1118 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801J_R_BM_V, | | 1116 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801J_R_BM_V, |
1119 | "82567V-2 LAN Controller", | | 1117 | "82567V-2 LAN Controller", |
1120 | WM_T_ICH10, WMP_F_COPPER }, | | 1118 | WM_T_ICH10, WMP_F_COPPER }, |
1121 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801J_D_BM_V, | | 1119 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801J_D_BM_V, |
1122 | "82567V-3? LAN Controller", | | 1120 | "82567V-3? LAN Controller", |
1123 | WM_T_ICH10, WMP_F_COPPER }, | | 1121 | WM_T_ICH10, WMP_F_COPPER }, |
1124 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_HANKSVILLE, | | 1122 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_HANKSVILLE, |
1125 | "HANKSVILLE LAN Controller", | | 1123 | "HANKSVILLE LAN Controller", |
1126 | WM_T_ICH10, WMP_F_COPPER }, | | 1124 | WM_T_ICH10, WMP_F_COPPER }, |
1127 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PCH_M_LM, | | 1125 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PCH_M_LM, |
1128 | "PCH LAN (82577LM) Controller", | | 1126 | "PCH LAN (82577LM) Controller", |
1129 | WM_T_PCH, WMP_F_COPPER }, | | 1127 | WM_T_PCH, WMP_F_COPPER }, |
1130 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PCH_M_LC, | | 1128 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PCH_M_LC, |
1131 | "PCH LAN (82577LC) Controller", | | 1129 | "PCH LAN (82577LC) Controller", |
1132 | WM_T_PCH, WMP_F_COPPER }, | | 1130 | WM_T_PCH, WMP_F_COPPER }, |
1133 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PCH_D_DM, | | 1131 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PCH_D_DM, |
1134 | "PCH LAN (82578DM) Controller", | | 1132 | "PCH LAN (82578DM) Controller", |
1135 | WM_T_PCH, WMP_F_COPPER }, | | 1133 | WM_T_PCH, WMP_F_COPPER }, |
1136 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PCH_D_DC, | | 1134 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PCH_D_DC, |
1137 | "PCH LAN (82578DC) Controller", | | 1135 | "PCH LAN (82578DC) Controller", |
1138 | WM_T_PCH, WMP_F_COPPER }, | | 1136 | WM_T_PCH, WMP_F_COPPER }, |
1139 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PCH2_LV_LM, | | 1137 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PCH2_LV_LM, |
1140 | "PCH2 LAN (82579LM) Controller", | | 1138 | "PCH2 LAN (82579LM) Controller", |
1141 | WM_T_PCH2, WMP_F_COPPER }, | | 1139 | WM_T_PCH2, WMP_F_COPPER }, |
1142 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PCH2_LV_V, | | 1140 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PCH2_LV_V, |
1143 | "PCH2 LAN (82579V) Controller", | | 1141 | "PCH2 LAN (82579V) Controller", |
1144 | WM_T_PCH2, WMP_F_COPPER }, | | 1142 | WM_T_PCH2, WMP_F_COPPER }, |
1145 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82575EB_COPPER, | | 1143 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82575EB_COPPER, |
1146 | "82575EB dual-1000baseT Ethernet", | | 1144 | "82575EB dual-1000baseT Ethernet", |
1147 | WM_T_82575, WMP_F_COPPER }, | | 1145 | WM_T_82575, WMP_F_COPPER }, |
1148 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82575EB_FIBER_SERDES, | | 1146 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82575EB_FIBER_SERDES, |
1149 | "82575EB dual-1000baseX Ethernet (SERDES)", | | 1147 | "82575EB dual-1000baseX Ethernet (SERDES)", |
1150 | WM_T_82575, WMP_F_SERDES }, | | 1148 | WM_T_82575, WMP_F_SERDES }, |
1151 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82575GB_QUAD_COPPER, | | 1149 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82575GB_QUAD_COPPER, |
1152 | "82575GB quad-1000baseT Ethernet", | | 1150 | "82575GB quad-1000baseT Ethernet", |
1153 | WM_T_82575, WMP_F_COPPER }, | | 1151 | WM_T_82575, WMP_F_COPPER }, |
1154 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82575GB_QUAD_COPPER_PM, | | 1152 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82575GB_QUAD_COPPER_PM, |
1155 | "82575GB quad-1000baseT Ethernet (PM)", | | 1153 | "82575GB quad-1000baseT Ethernet (PM)", |
1156 | WM_T_82575, WMP_F_COPPER }, | | 1154 | WM_T_82575, WMP_F_COPPER }, |
1157 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82576_COPPER, | | 1155 | { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82576_COPPER, |
1158 | "82576 1000BaseT Ethernet", | | 1156 | "82576 1000BaseT Ethernet", |
1159 | WM_T_82576, WMP_F_COPPER }, | | 1157 | WM_T_82576, WMP_F_COPPER }, |