 @@ -1,14 +1,14 @@
-/*	$NetBSD: if_wm.c,v 1.351 2015/10/08 09:28:13 msaitoh Exp $	*/
+/*	$NetBSD: if_wm.c,v 1.352 2015/10/13 07:47:45 knakahara Exp $	*/
 /*
  * Copyright (c) 2001, 2002, 2003, 2004 Wasabi Systems, Inc.
  * All rights reserved.
+ *
  * Written by Jason R. Thorpe for Wasabi Systems, Inc.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
 @@ -73,27 +73,27 @@
  * TODO (in order of importance):
+ *
  *	- Check XXX'ed comments
  *	- EEE (Energy Efficiency Ethernet)
  *	- Multi queue
  *	- Image Unique ID
  *	- LPLU other than PCH*
  *	- Virtual Function
  *	- Set LED correctly (based on contents in EEPROM)
  *	- Rework how parameters are loaded from the EEPROM.
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: if_wm.c,v 1.351 2015/10/08 09:28:13 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_wm.c,v 1.352 2015/10/13 07:47:45 knakahara Exp $");
 #ifdef _KERNEL_OPT
 #include "opt_net_mpsafe.h"
 #endif
 #include <sys/param.h>
 #include <sys/systm.h>
 #include <sys/callout.h>
 #include <sys/mbuf.h>
 #include <sys/malloc.h>
 #include <sys/kernel.h>
 #include <sys/socket.h>
 #include <sys/ioctl.h>
 @@ -496,100 +496,46 @@ do {									\
 #define	WM_CDTXADDR(sc, x)	((sc)->sc_cddma + WM_CDTXOFF((x)))
 #define	WM_CDRXADDR(sc, x)	((sc)->sc_cddma + WM_CDRXOFF((x)))
 #define	WM_CDTXADDR_LO(sc, x)	(WM_CDTXADDR((sc), (x)) & 0xffffffffU)
 #define	WM_CDTXADDR_HI(sc, x)						\
 	(sizeof(bus_addr_t) == 8 ?					\
 	 (uint64_t)WM_CDTXADDR((sc), (x)) >> 32 : 0)
 #define	WM_CDRXADDR_LO(sc, x)	(WM_CDRXADDR((sc), (x)) & 0xffffffffU)
 #define	WM_CDRXADDR_HI(sc, x)						\
 	(sizeof(bus_addr_t) == 8 ?					\
 	 (uint64_t)WM_CDRXADDR((sc), (x)) >> 32 : 0)
 #define	WM_CDTXSYNC(sc, x, n, ops)					\
 do {									\
 	int __x, __n;							\
 	__x = (x);							\
 	__n = (n);							\
 	/* If it will wrap around, sync to the end of the ring. */	\
 	if ((__x + __n) > WM_NTXDESC(sc)) {				\
 		bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap,	\
 		    WM_CDTXOFF(__x), sizeof(wiseman_txdesc_t) *		\
 		    (WM_NTXDESC(sc) - __x), (ops));			\
 		__n -= (WM_NTXDESC(sc) - __x);				\
 		__x = 0;						\
 	}								\
 	/* Now sync whatever is left. */				\
 	bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap,		\
 	    WM_CDTXOFF(__x), sizeof(wiseman_txdesc_t) * __n, (ops));	\
 } while (/*CONSTCOND*/0)
 #define	WM_CDRXSYNC(sc, x, ops)						\
 do {									\
 	bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap,		\
 	   WM_CDRXOFF((x)), sizeof(wiseman_rxdesc_t), (ops));		\
 } while (/*CONSTCOND*/0)
 #define	WM_INIT_RXDESC(sc, x)						\
 do {									\
 	struct wm_rxsoft *__rxs = &(sc)->sc_rxsoft[(x)];		\
 	wiseman_rxdesc_t *__rxd = &(sc)->sc_rxdescs[(x)];		\
 	struct mbuf *__m = __rxs->rxs_mbuf;				\
 	/*								\
 	 * Note: We scoot the packet forward 2 bytes in the buffer	\
 	 * so that the payload after the Ethernet header is aligned	\
 	 * to a 4-byte boundary.					\
 	 *								\
 	 * XXX BRAINDAMAGE ALERT!					\
 	 * The stupid chip uses the same size for every buffer, which	\
 	 * is set in the Receive Control register.  We are using the 2K	\
 	 * size option, but what we REALLY want is (2K - 2)!  For this	\
 	 * reason, we can't "scoot" packets longer than the standard	\
 	 * Ethernet MTU.  On strict-alignment platforms, if the total	\
 	 * size exceeds (2K - 2) we set align_tweak to 0 and let	\
 	 * the upper layer copy the headers.				\
 	 */								\
 	__m->m_data = __m->m_ext.ext_buf + (sc)->sc_align_tweak;	\
 	wm_set_dma_addr(&__rxd->wrx_addr,				\
 	    __rxs->rxs_dmamap->dm_segs[0].ds_addr + (sc)->sc_align_tweak); \
 	__rxd->wrx_len = 0;						\
 	__rxd->wrx_cksum = 0;						\
 	__rxd->wrx_status = 0;						\
 	__rxd->wrx_errors = 0;						\
 	__rxd->wrx_special = 0;						\
 	WM_CDRXSYNC((sc), (x), BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); \
 	CSR_WRITE((sc), (sc)->sc_rdt_reg, (x));				\
 } while (/*CONSTCOND*/0)
 /*
  * Register read/write functions.
  * Other than CSR_{READ|WRITE}().
  */
 #if 0
 static inline uint32_t wm_io_read(struct wm_softc *, int);
 #endif
 static inline void wm_io_write(struct wm_softc *, int, uint32_t);
 static inline void wm_82575_write_8bit_ctlr_reg(struct wm_softc *, uint32_t,
 	uint32_t, uint32_t);
 static inline void wm_set_dma_addr(volatile wiseman_addr_t *, bus_addr_t);
 /*
  * Descriptor sync/init functions.
  */
 static inline void wm_cdtxsync(struct wm_softc *, int, int, int);
 static inline void wm_cdrxsync(struct wm_softc *, int, int);
 static inline void wm_init_rxdesc(struct wm_softc *, int);
 /*
  * Device driver interface functions and commonly used functions.
  * match, attach, detach, init, start, stop, ioctl, watchdog and so on.
  */
 static const struct wm_product *wm_lookup(const struct pci_attach_args *);
 static int	wm_match(device_t, cfdata_t, void *);
 static void	wm_attach(device_t, device_t, void *);
 static int	wm_detach(device_t, int);
 static bool	wm_suspend(device_t, const pmf_qual_t *);
 static bool	wm_resume(device_t, const pmf_qual_t *);
 static void	wm_watchdog(struct ifnet *);
 static void	wm_tick(void *);
 static int	wm_ifflags_cb(struct ethercom *);
 static int	wm_ioctl(struct ifnet *, u_long, void *);
 @@ -1373,26 +1319,90 @@ wm_82575_write_8bit_ctlr_reg(struct wm_s
+}
 static inline void
 wm_set_dma_addr(volatile wiseman_addr_t *wa, bus_addr_t v)
+{
 	wa->wa_low = htole32(v & 0xffffffffU);
 	if (sizeof(bus_addr_t) == 8)
 		wa->wa_high = htole32((uint64_t) v >> 32);
 	else
 		wa->wa_high = 0;
+}
 /*
  * Descriptor sync/init functions.
  */
 static inline void
 wm_cdtxsync(struct wm_softc *sc, int start, int num, int ops)
+{
 	/* If it will wrap around, sync to the end of the ring. */
 	if ((start + num) > WM_NTXDESC(sc)) {
 		bus_dmamap_sync(sc->sc_dmat, sc->sc_cddmamap,
 		    WM_CDTXOFF(start), sizeof(wiseman_txdesc_t) *
 		    (WM_NTXDESC(sc) - start), ops);
 		num -= (WM_NTXDESC(sc) - start);
 		start = 0;
+	}
 	/* Now sync whatever is left. */
 	bus_dmamap_sync(sc->sc_dmat, sc->sc_cddmamap,
 	    WM_CDTXOFF(start), sizeof(wiseman_txdesc_t) * num, ops);
+}
 static inline void
 wm_cdrxsync(struct wm_softc *sc, int start, int ops)
+{
 	bus_dmamap_sync(sc->sc_dmat, sc->sc_cddmamap,
 	    WM_CDRXOFF(start), sizeof(wiseman_rxdesc_t), ops);
+}
 static inline void
 wm_init_rxdesc(struct wm_softc *sc, int start)
+{
 	struct wm_rxsoft *rxs = &sc->sc_rxsoft[start];
 	wiseman_rxdesc_t *rxd = &sc->sc_rxdescs[start];
 	struct mbuf *m = rxs->rxs_mbuf;
 	/*
 	 * Note: We scoot the packet forward 2 bytes in the buffer
 	 * so that the payload after the Ethernet header is aligned
 	 * to a 4-byte boundary.
 	 * XXX BRAINDAMAGE ALERT!
 	 * The stupid chip uses the same size for every buffer, which
 	 * is set in the Receive Control register.  We are using the 2K
 	 * size option, but what we REALLY want is (2K - 2)!  For this
 	 * reason, we can't "scoot" packets longer than the standard
 	 * Ethernet MTU.  On strict-alignment platforms, if the total
 	 * size exceeds (2K - 2) we set align_tweak to 0 and let
 	 * the upper layer copy the headers.
 	 */
 	m->m_data = m->m_ext.ext_buf + sc->sc_align_tweak;
 	wm_set_dma_addr(&rxd->wrx_addr,
 	    rxs->rxs_dmamap->dm_segs[0].ds_addr + sc->sc_align_tweak);
 	rxd->wrx_len = 0;
 	rxd->wrx_cksum = 0;
 	rxd->wrx_status = 0;
 	rxd->wrx_errors = 0;
 	rxd->wrx_special = 0;
 	wm_cdrxsync(sc, start, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
 	CSR_WRITE(sc, sc->sc_rdt_reg, start);
+}
 /*
  * Device driver interface functions and commonly used functions.
  * match, attach, detach, init, start, stop, ioctl, watchdog and so on.
  */
 /* Lookup supported device table */
 static const struct wm_product *
 wm_lookup(const struct pci_attach_args *pa)
+{
 	const struct wm_product *wmp;
 	for (wmp = wm_products; wmp->wmp_name != NULL; wmp++) {
 		if (PCI_VENDOR(pa->pa_id) == wmp->wmp_vendor &&
 		    PCI_PRODUCT(pa->pa_id) == wmp->wmp_product)
 @@ -4138,29 +4148,29 @@ wm_add_rxbuf(struct wm_softc *sc, int id
 	if (error) {
 		/* XXX XXX XXX */
 		aprint_error_dev(sc->sc_dev,
 		    "unable to load rx DMA map %d, error = %d\n",
 		    idx, error);
 		panic("wm_add_rxbuf");
+	}
 	bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0,
 	    rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD);
 	if ((sc->sc_flags & WM_F_NEWQUEUE) != 0) {
 		if ((sc->sc_rctl & RCTL_EN) != 0)
-			WM_INIT_RXDESC(sc, idx);
+			wm_init_rxdesc(sc, idx);
 	} else
-		WM_INIT_RXDESC(sc, idx);
+		wm_init_rxdesc(sc, idx);
 	return 0;
+}
 /*
  * wm_rxdrain:
+ *
  *	Drain the receive queue.
  */
 static void
 wm_rxdrain(struct wm_softc *sc)
+{
 	struct wm_rxsoft *rxs;
 @@ -4280,27 +4290,27 @@ wm_init_locked(struct ifnet *ifp)
 		/*
 		 * For N interrupts/sec, set this value to:
 		 * 1000000000 / (N * 256).  Note that we set the
 		 * absolute and packet timer values to this value
 		 * divided by 4 to get "simple timer" behavior.
 		 */
 		sc->sc_itr = 1500;		/* 2604 ints/sec */
+	}
 	/* Initialize the transmit descriptor ring. */
 	memset(sc->sc_txdescs, 0, WM_TXDESCSIZE(sc));
-	WM_CDTXSYNC(sc, 0, WM_NTXDESC(sc),
+	wm_cdtxsync(sc, 0, WM_NTXDESC(sc),
 	    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
 	sc->sc_txfree = WM_NTXDESC(sc);
 	sc->sc_txnext = 0;
 	if (sc->sc_type < WM_T_82543) {
 		CSR_WRITE(sc, WMREG_OLD_TDBAH, WM_CDTXADDR_HI(sc, 0));
 		CSR_WRITE(sc, WMREG_OLD_TDBAL, WM_CDTXADDR_LO(sc, 0));
 		CSR_WRITE(sc, WMREG_OLD_TDLEN, WM_TXDESCSIZE(sc));
 		CSR_WRITE(sc, WMREG_OLD_TDH, 0);
 		CSR_WRITE(sc, WMREG_OLD_TDT, 0);
 		CSR_WRITE(sc, WMREG_OLD_TIDV, 128);
 	} else {
 		CSR_WRITE(sc, WMREG_TDBAH, WM_CDTXADDR_HI(sc, 0));
 @@ -4385,27 +4395,27 @@ wm_init_locked(struct ifnet *ifp)
 			if ((error = wm_add_rxbuf(sc, i)) != 0) {
 				log(LOG_ERR, "%s: unable to allocate or map "
 				    "rx buffer %d, error = %d\n",
 				    device_xname(sc->sc_dev), i, error);
 				/*
 				 * XXX Should attempt to run with fewer receive
 				 * XXX buffers instead of just failing.
 				 */
 				wm_rxdrain(sc);
 				goto out;
+			}
 		} else {
 			if ((sc->sc_flags & WM_F_NEWQUEUE) == 0)
-				WM_INIT_RXDESC(sc, i);
+				wm_init_rxdesc(sc, i);
 			/*
 			 * For 82575 and newer device, the RX descriptors
 			 * must be initialized after the setting of RCTL.EN in
 			 * wm_set_filter()
 			 */
+		}
+	}
 	sc->sc_rxptr = 0;
 	sc->sc_rxdiscard = 0;
 	WM_RXCHAIN_RESET(sc);
 	/*
 	 * Clear out the VLAN table -- we don't use it (yet).
 @@ -4760,27 +4770,27 @@ wm_init_locked(struct ifnet *ifp)
 		CSR_WRITE(sc, WMREG_PBECCSTS, reg);
 		reg = CSR_READ(sc, WMREG_CTRL);
 		reg |= CTRL_MEHE;
 		CSR_WRITE(sc, WMREG_CTRL, reg);
 		break;
 	default:
 		break;
+	}
 	/* On 575 and later set RDT only if RX enabled */
 	if ((sc->sc_flags & WM_F_NEWQUEUE) != 0)
 		for (i = 0; i < WM_NRXDESC; i++)
-			WM_INIT_RXDESC(sc, i);
+			wm_init_rxdesc(sc, i);
 	sc->sc_stopping = false;
 	/* Start the one second link check clock. */
 	callout_reset(&sc->sc_tick_ch, hz, wm_tick, sc);
 	/* ...all done! */
 	ifp->if_flags |= IFF_RUNNING;
 	ifp->if_flags &= ~IFF_OACTIVE;
  out:
 	sc->sc_if_flags = ifp->if_flags;
 	if (error)
 @@ -5050,27 +5060,27 @@ wm_tx_offload(struct wm_softc *sc, struc
 		/* Just initialize it to a valid TCP context. */
 		tucs = WTX_TCPIP_TUCSS(offset) |
 		    WTX_TCPIP_TUCSO(offset + offsetof(struct tcphdr, th_sum)) |
 		    WTX_TCPIP_TUCSE(0) /* rest of packet */;
+	}
 	/* Fill in the context descriptor. */
 	t = (struct livengood_tcpip_ctxdesc *)
 	    &sc->sc_txdescs[sc->sc_txnext];
 	t->tcpip_ipcs = htole32(ipcs);
 	t->tcpip_tucs = htole32(tucs);
 	t->tcpip_cmdlen = htole32(cmdlen);
 	t->tcpip_seg = htole32(seg);
-	WM_CDTXSYNC(sc, sc->sc_txnext, 1, BUS_DMASYNC_PREWRITE);
+	wm_cdtxsync(sc, sc->sc_txnext, 1, BUS_DMASYNC_PREWRITE);
 	sc->sc_txnext = WM_NEXTTX(sc, sc->sc_txnext);
 	txs->txs_ndesc++;
 	*cmdp = cmd;
 	*fieldsp = fields;
 	return 0;
+}
 static void
 wm_dump_mbuf_chain(struct wm_softc *sc, struct mbuf *m0)
+{
 @@ -5453,27 +5463,27 @@ wm_start_locked(struct ifnet *ifp)
 			    htole32(WTX_CMD_VLE);
 			sc->sc_txdescs[lasttx].wtx_fields.wtxu_vlan
 			    = htole16(VLAN_TAG_VALUE(mtag) & 0xffff);
+		}
 		txs->txs_lastdesc = lasttx;
 		DPRINTF(WM_DEBUG_TX,
 		    ("%s: TX: desc %d: cmdlen 0x%08x\n",
 		    device_xname(sc->sc_dev),
 		    lasttx, le32toh(sc->sc_txdescs[lasttx].wtx_cmdlen)));
 		/* Sync the descriptors we're using. */
-		WM_CDTXSYNC(sc, sc->sc_txnext, txs->txs_ndesc,
+		wm_cdtxsync(sc, sc->sc_txnext, txs->txs_ndesc,
 		    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
 		/* Give the packet to the chip. */
 		CSR_WRITE(sc, sc->sc_tdt_reg, nexttx);
 		DPRINTF(WM_DEBUG_TX,
 		    ("%s: TX: TDT -> %d\n", device_xname(sc->sc_dev), nexttx));
 		DPRINTF(WM_DEBUG_TX,
 		    ("%s: TX: finished transmitting packet, job %d\n",
 		    device_xname(sc->sc_dev), sc->sc_txsnext));
 		/* Advance the tx pointer. */
 @@ -5683,27 +5693,27 @@ wm_nq_tx_offload(struct wm_softc *sc, st
+		}
 		cmdc |= NQTXC_CMD_IP6;
 		*fieldsp |= NQTXD_FIELDS_TUXSM;
+	}
 	/* Fill in the context descriptor. */
 	sc->sc_nq_txdescs[sc->sc_txnext].nqrx_ctx.nqtxc_vl_len =
 	    htole32(vl_len);
 	sc->sc_nq_txdescs[sc->sc_txnext].nqrx_ctx.nqtxc_sn = 0;
 	sc->sc_nq_txdescs[sc->sc_txnext].nqrx_ctx.nqtxc_cmd =
 	    htole32(cmdc);
 	sc->sc_nq_txdescs[sc->sc_txnext].nqrx_ctx.nqtxc_mssidx =
 	    htole32(mssidx);
-	WM_CDTXSYNC(sc, sc->sc_txnext, 1, BUS_DMASYNC_PREWRITE);
+	wm_cdtxsync(sc, sc->sc_txnext, 1, BUS_DMASYNC_PREWRITE);
 	DPRINTF(WM_DEBUG_TX,
 	    ("%s: TX: context desc %d 0x%08x%08x\n", device_xname(sc->sc_dev),
 	    sc->sc_txnext, 0, vl_len));
 	DPRINTF(WM_DEBUG_TX, ("\t0x%08x%08x\n", mssidx, cmdc));
 	sc->sc_txnext = WM_NEXTTX(sc, sc->sc_txnext);
 	txs->txs_ndesc++;
 	return 0;
+}
 /*
  * wm_nq_start:		[ifnet interface function]
+ *
  *	Start packet transmission on the interface for NEWQUEUE devices
 @@ -5940,27 +5950,27 @@ wm_nq_start_locked(struct ifnet *ifp)
 		KASSERT((WTX_CMD_EOP | WTX_CMD_RS) ==
 		    (NQTX_CMD_EOP | NQTX_CMD_RS));
 		sc->sc_txdescs[lasttx].wtx_cmdlen |=
 		    htole32(WTX_CMD_EOP | WTX_CMD_RS);
 		txs->txs_lastdesc = lasttx;
 		DPRINTF(WM_DEBUG_TX,
 		    ("%s: TX: desc %d: cmdlen 0x%08x\n",
 		    device_xname(sc->sc_dev),
 		    lasttx, le32toh(sc->sc_txdescs[lasttx].wtx_cmdlen)));
 		/* Sync the descriptors we're using. */
-		WM_CDTXSYNC(sc, sc->sc_txnext, txs->txs_ndesc,
+		wm_cdtxsync(sc, sc->sc_txnext, txs->txs_ndesc,
 		    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
 		/* Give the packet to the chip. */
 		CSR_WRITE(sc, sc->sc_tdt_reg, nexttx);
 		sent = true;
 		DPRINTF(WM_DEBUG_TX,
 		    ("%s: TX: TDT -> %d\n", device_xname(sc->sc_dev), nexttx));
 		DPRINTF(WM_DEBUG_TX,
 		    ("%s: TX: finished transmitting packet, job %d\n",
 		    device_xname(sc->sc_dev), sc->sc_txsnext));
 @@ -6016,33 +6026,33 @@ wm_txeof(struct wm_softc *sc)
 	ifp->if_flags &= ~IFF_OACTIVE;
 	/*
 	 * Go through the Tx list and free mbufs for those
 	 * frames which have been transmitted.
 	 */
 	for (i = sc->sc_txsdirty; sc->sc_txsfree != WM_TXQUEUELEN(sc);
 	     i = WM_NEXTTXS(sc, i), sc->sc_txsfree++) {
 		txs = &sc->sc_txsoft[i];
 		DPRINTF(WM_DEBUG_TX,
 		    ("%s: TX: checking job %d\n", device_xname(sc->sc_dev), i));
-		WM_CDTXSYNC(sc, txs->txs_firstdesc, txs->txs_ndesc,
+		wm_cdtxsync(sc, txs->txs_firstdesc, txs->txs_ndesc,
 		    BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
 		status =
 		    sc->sc_txdescs[txs->txs_lastdesc].wtx_fields.wtxu_status;
 		if ((status & WTX_ST_DD) == 0) {
-			WM_CDTXSYNC(sc, txs->txs_lastdesc, 1,
+			wm_cdtxsync(sc, txs->txs_lastdesc, 1,
 			    BUS_DMASYNC_PREREAD);
 			break;
+		}
 		processed = true;
 		count++;
 		DPRINTF(WM_DEBUG_TX,
 		    ("%s: TX: job %d done: descs %d..%d\n",
 		    device_xname(sc->sc_dev), i, txs->txs_firstdesc,
 		    txs->txs_lastdesc));
 		/*
 		 * XXX We should probably be using the statistics
 @@ -6107,45 +6117,45 @@ wm_rxeof(struct wm_softc *sc)
 	struct mbuf *m;
 	int i, len;
 	int count = 0;
 	uint8_t status, errors;
 	uint16_t vlantag;
 	for (i = sc->sc_rxptr;; i = WM_NEXTRX(i)) {
 		rxs = &sc->sc_rxsoft[i];
 		DPRINTF(WM_DEBUG_RX,
 		    ("%s: RX: checking descriptor %d\n",
 		    device_xname(sc->sc_dev), i));
-		WM_CDRXSYNC(sc, i, BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
+		wm_cdrxsync(sc, i, BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
 		status = sc->sc_rxdescs[i].wrx_status;
 		errors = sc->sc_rxdescs[i].wrx_errors;
 		len = le16toh(sc->sc_rxdescs[i].wrx_len);
 		vlantag = sc->sc_rxdescs[i].wrx_special;
 		if ((status & WRX_ST_DD) == 0) {
 			/* We have processed all of the receive descriptors. */
-			WM_CDRXSYNC(sc, i, BUS_DMASYNC_PREREAD);
+			wm_cdrxsync(sc, i, BUS_DMASYNC_PREREAD);
 			break;
+		}
 		count++;
 		if (__predict_false(sc->sc_rxdiscard)) {
 			DPRINTF(WM_DEBUG_RX,
 			    ("%s: RX: discarding contents of descriptor %d\n",
 			    device_xname(sc->sc_dev), i));
-			WM_INIT_RXDESC(sc, i);
+			wm_init_rxdesc(sc, i);
 			if (status & WRX_ST_EOP) {
 				/* Reset our state. */
 				DPRINTF(WM_DEBUG_RX,
 				    ("%s: RX: resetting rxdiscard -> 0\n",
 				    device_xname(sc->sc_dev)));
 				sc->sc_rxdiscard = 0;
+			}
 			continue;
+		}
 		bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0,
 		    rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_POSTREAD);
 @@ -6154,27 +6164,27 @@ wm_rxeof(struct wm_softc *sc)
 		/*
 		 * Add a new receive buffer to the ring, unless of
 		 * course the length is zero. Treat the latter as a
 		 * failed mapping.
 		 */
 		if ((len == 0) || (wm_add_rxbuf(sc, i) != 0)) {
 			/*
 			 * Failed, throw away what we've done so
 			 * far, and discard the rest of the packet.
 			 */
 			ifp->if_ierrors++;
 			bus_dmamap_sync(sc->sc_dmat, rxs->rxs_dmamap, 0,
 			    rxs->rxs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD);
-			WM_INIT_RXDESC(sc, i);
+			wm_init_rxdesc(sc, i);
 			if ((status & WRX_ST_EOP) == 0)
 				sc->sc_rxdiscard = 1;
 			if (sc->sc_rxhead != NULL)
 				m_freem(sc->sc_rxhead);
 			WM_RXCHAIN_RESET(sc);
 			DPRINTF(WM_DEBUG_RX,
 			    ("%s: RX: Rx buffer allocation failed, "
 			    "dropping packet%s\n", device_xname(sc->sc_dev),
 			    sc->sc_rxdiscard ? " (discard)" : ""));
 			continue;
+		}
 		m->m_len = len;