 @@ -1,14 +1,14 @@
-/*	$NetBSD: if_wm.c,v 1.357 2015/10/13 08:11:31 knakahara Exp $	*/
+/*	$NetBSD: if_wm.c,v 1.358 2015/10/13 08:14:27 knakahara Exp $	*/
 /*
  * Copyright (c) 2001, 2002, 2003, 2004 Wasabi Systems, Inc.
  * All rights reserved.
+ *
  * Written by Jason R. Thorpe for Wasabi Systems, Inc.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
 @@ -73,27 +73,27 @@
  * TODO (in order of importance):
+ *
  *	- Check XXX'ed comments
  *	- EEE (Energy Efficiency Ethernet)
  *	- Multi queue
  *	- Image Unique ID
  *	- LPLU other than PCH*
  *	- Virtual Function
  *	- Set LED correctly (based on contents in EEPROM)
  *	- Rework how parameters are loaded from the EEPROM.
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: if_wm.c,v 1.357 2015/10/13 08:11:31 knakahara Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_wm.c,v 1.358 2015/10/13 08:14:27 knakahara Exp $");
 #ifdef _KERNEL_OPT
 #include "opt_net_mpsafe.h"
 #endif
 #include <sys/param.h>
 #include <sys/systm.h>
 #include <sys/callout.h>
 #include <sys/mbuf.h>
 #include <sys/malloc.h>
 #include <sys/kmem.h>
 #include <sys/kernel.h>
 #include <sys/socket.h>
 @@ -572,29 +572,30 @@ static void	wm_rxdrain(struct wm_softc *
 static int	wm_init(struct ifnet *);
 static int	wm_init_locked(struct ifnet *);
 static void	wm_stop(struct ifnet *, int);
 static void	wm_stop_locked(struct ifnet *, int);
 static int	wm_tx_offload(struct wm_softc *, struct wm_txsoft *,
     uint32_t *, uint8_t *);
 static void	wm_dump_mbuf_chain(struct wm_softc *, struct mbuf *);
 static void	wm_82547_txfifo_stall(void *);
 static int	wm_82547_txfifo_bugchk(struct wm_softc *, struct mbuf *);
 /* DMA related */
 static int	wm_alloc_tx_descs(struct wm_softc *);
 static void	wm_free_tx_descs(struct wm_softc *);
 static void	wm_init_tx_descs(struct wm_softc *);
 static void	wm_init_tx_regs(struct wm_softc *);
 static int	wm_alloc_rx_descs(struct wm_softc *);
 static void	wm_free_rx_descs(struct wm_softc *);
-static void	wm_init_rx_descs(struct wm_softc *);
+static void	wm_init_rx_regs(struct wm_softc *);
 static int	wm_alloc_tx_buffer(struct wm_softc *);
 static void	wm_free_tx_buffer(struct wm_softc *);
 static void	wm_init_tx_buffer(struct wm_softc *);
 static int	wm_alloc_rx_buffer(struct wm_softc *);
 static void	wm_free_rx_buffer(struct wm_softc *);
 static int	wm_init_rx_buffer(struct wm_softc *);
 static void	wm_init_tx_queue(struct wm_softc *);
 static int	wm_init_rx_queue(struct wm_softc *);
 static int	wm_alloc_txrx_queues(struct wm_softc *);
 static void	wm_free_txrx_queues(struct wm_softc *);
 static int	wm_init_txrx_queues(struct wm_softc *);
 /* Start */
 static void	wm_start(struct ifnet *);
 @@ -5355,26 +5356,34 @@ wm_free_txrx_queues(struct wm_softc *sc)
 static void
 wm_init_tx_descs(struct wm_softc *sc)
+{
 	struct wm_txqueue *txq = sc->sc_txq;
 	KASSERT(WM_TX_LOCKED(txq));
 	/* Initialize the transmit descriptor ring. */
 	memset(txq->txq_descs, 0, WM_TXDESCSIZE(txq));
 	wm_cdtxsync(sc, 0, WM_NTXDESC(txq),
 	    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
 	txq->txq_free = WM_NTXDESC(txq);
 	txq->txq_next = 0;
+}
 static void
 wm_init_tx_regs(struct wm_softc *sc)
+{
 	struct wm_txqueue *txq = sc->sc_txq;
 	KASSERT(WM_TX_LOCKED(txq));
 	if (sc->sc_type < WM_T_82543) {
 		CSR_WRITE(sc, WMREG_OLD_TDBAH, WM_CDTXADDR_HI(txq, 0));
 		CSR_WRITE(sc, WMREG_OLD_TDBAL, WM_CDTXADDR_LO(txq, 0));
 		CSR_WRITE(sc, WMREG_OLD_TDLEN, WM_TXDESCSIZE(txq));
 		CSR_WRITE(sc, WMREG_OLD_TDH, 0);
 		CSR_WRITE(sc, WMREG_OLD_TDT, 0);
 		CSR_WRITE(sc, WMREG_OLD_TIDV, 128);
 	} else {
 		CSR_WRITE(sc, WMREG_TDBAH, WM_CDTXADDR_HI(txq, 0));
 		CSR_WRITE(sc, WMREG_TDBAL, WM_CDTXADDR_LO(txq, 0));
 		CSR_WRITE(sc, WMREG_TDLEN, WM_TXDESCSIZE(txq));
 		CSR_WRITE(sc, WMREG_TDH, 0);
 @@ -5388,28 +5397,26 @@ wm_init_tx_descs(struct wm_softc *sc)
 			    | TXDCTL_PTHRESH(0) | TXDCTL_HTHRESH(0)
 			    | TXDCTL_WTHRESH(0));
 		else {
 			/* ITR / 4 */
 			CSR_WRITE(sc, WMREG_TIDV, sc->sc_itr / 4);
 			if (sc->sc_type >= WM_T_82540) {
 				/* should be same */
 				CSR_WRITE(sc, WMREG_TADV, sc->sc_itr / 4);
+			}
 			CSR_WRITE(sc, WMREG_TDT, 0);
 			CSR_WRITE(sc, WMREG_TXDCTL(0), TXDCTL_PTHRESH(0) |
 			    TXDCTL_HTHRESH(0) | TXDCTL_WTHRESH(0));
 			CSR_WRITE(sc, WMREG_RXDCTL, RXDCTL_PTHRESH(0) |
 			    RXDCTL_HTHRESH(0) | RXDCTL_WTHRESH(1));
+		}
+	}
+}
 static void
 wm_init_tx_buffer(struct wm_softc *sc)
+{
 	struct wm_txqueue *txq = sc->sc_txq;
 	int i;
 	KASSERT(WM_TX_LOCKED(txq));
 	/* Initialize the transmit job descriptors. */
 @@ -5428,31 +5435,32 @@ wm_init_tx_queue(struct wm_softc *sc)
 	KASSERT(WM_TX_LOCKED(txq));
 	/*
 	 * Set up some register offsets that are different between
 	 * the i82542 and the i82543 and later chips.
 	 */
 	if (sc->sc_type < WM_T_82543) {
 		txq->txq_tdt_reg = WMREG_OLD_TDT;
 	} else {
 		txq->txq_tdt_reg = WMREG_TDT;
+	}
 	wm_init_tx_descs(sc);
 	wm_init_tx_regs(sc);
 	wm_init_tx_buffer(sc);
+}
 static void
-wm_init_rx_descs(struct wm_softc *sc)
+wm_init_rx_regs(struct wm_softc *sc)
+{
 	struct wm_rxqueue *rxq = sc->sc_rxq;
 	KASSERT(WM_RX_LOCKED(rxq));
 	/*
 	 * Initialize the receive descriptor and receive job
 	 * descriptor rings.
 	 */
 	if (sc->sc_type < WM_T_82543) {
 		CSR_WRITE(sc, WMREG_OLD_RDBAH0, WM_CDRXADDR_HI(rxq, 0));
 		CSR_WRITE(sc, WMREG_OLD_RDBAL0, WM_CDRXADDR_LO(rxq, 0));
 		CSR_WRITE(sc, WMREG_OLD_RDLEN0,
 @@ -5476,26 +5484,28 @@ wm_init_rx_descs(struct wm_softc *sc)
 		if ((sc->sc_flags & WM_F_NEWQUEUE) != 0) {
 			if (MCLBYTES & ((1 << SRRCTL_BSIZEPKT_SHIFT) - 1))
 				panic("%s: MCLBYTES %d unsupported for i2575 or higher\n", __func__, MCLBYTES);
 			CSR_WRITE(sc, WMREG_SRRCTL, SRRCTL_DESCTYPE_LEGACY
 			    | (MCLBYTES >> SRRCTL_BSIZEPKT_SHIFT));
 			CSR_WRITE(sc, WMREG_RXDCTL, RXDCTL_QUEUE_ENABLE
 			    | RXDCTL_PTHRESH(16) | RXDCTL_HTHRESH(8)
 			    | RXDCTL_WTHRESH(1));
 		} else {
 			CSR_WRITE(sc, WMREG_RDH, 0);
 			CSR_WRITE(sc, WMREG_RDT, 0);
 			CSR_WRITE(sc, WMREG_RDTR, 375 | RDTR_FPD); /* ITR/4 */
 			CSR_WRITE(sc, WMREG_RADV, 375);	/* MUST be same */
 			CSR_WRITE(sc, WMREG_RXDCTL, RXDCTL_PTHRESH(0) |
 			    RXDCTL_HTHRESH(0) | RXDCTL_WTHRESH(1));
+		}
+	}
+}
 static int
 wm_init_rx_buffer(struct wm_softc *sc)
+{
 	struct wm_rxqueue *rxq = sc->sc_rxq;
 	struct wm_rxsoft *rxs;
 	int error, i;
 	KASSERT(WM_RX_LOCKED(rxq));
 @@ -5537,27 +5547,27 @@ wm_init_rx_queue(struct wm_softc *sc)
 	KASSERT(WM_RX_LOCKED(rxq));
 	/*
 	 * Set up some register offsets that are different between
 	 * the i82542 and the i82543 and later chips.
 	 */
 	if (sc->sc_type < WM_T_82543) {
 		rxq->rxq_rdt_reg = WMREG_OLD_RDT0;
 	} else {
 		rxq->rxq_rdt_reg = WMREG_RDT;
+	}
-	wm_init_rx_descs(sc);
+	wm_init_rx_regs(sc);
 	return wm_init_rx_buffer(sc);
+}
 /*
  * wm_init_quques:
  *	Initialize {tx,rx}descs and {tx,rx} buffers
  */
 static int
 wm_init_txrx_queues(struct wm_softc *sc)
+{
 	struct wm_txqueue *txq = sc->sc_txq;
 	struct wm_rxqueue *rxq = sc->sc_rxq;
 	int error;