 @@ -1,1226 +1,1227 @@
-/*	$NetBSD: ehci.c,v 1.234.2.54 2015/10/11 09:17:51 skrll Exp $ */
+/*	$NetBSD: ehci.c,v 1.234.2.55 2015/10/16 17:00:15 skrll Exp $ */
 /*
  * Copyright (c) 2004-2012 The NetBSD Foundation, Inc.
  * All rights reserved.
+ *
  * This code is derived from software contributed to The NetBSD Foundation
  * by Lennart Augustsson (lennart@augustsson.net), Charles M. Hannum,
  * Jeremy Morse (jeremy.morse@gmail.com), Jared D. McNeill
  * (jmcneill@invisible.ca) and Matthew R. Green (mrg@eterna.com.au).
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
+ *
  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  */
 /*
  * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller.
+ *
  * The EHCI 1.0 spec can be found at
  * http://www.intel.com/technology/usb/spec.htm
  * and the USB 2.0 spec at
  * http://www.usb.org/developers/docs/
+ *
  */
 /*
  * TODO:
  * 1) hold off explorations by companion controllers until ehci has started.
+ *
  * 2) The hub driver needs to handle and schedule the transaction translator,
  *    to assign place in frame where different devices get to go. See chapter
  *    on hubs in USB 2.0 for details.
+ *
  * 3) Command failures are not recovered correctly.
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.234.2.54 2015/10/11 09:17:51 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: ehci.c,v 1.234.2.55 2015/10/16 17:00:15 skrll Exp $");
 #include "ohci.h"
 #include "uhci.h"
 #ifdef _KERNEL_OPT
 #include "opt_usb.h"
 #endif
 #include <sys/param.h>
 #include <sys/bus.h>
 #include <sys/cpu.h>
 #include <sys/device.h>
 #include <sys/kernel.h>
 #include <sys/kmem.h>
 #include <sys/mutex.h>
 #include <sys/proc.h>
 #include <sys/queue.h>
 #include <sys/select.h>
 #include <sys/sysctl.h>
 #include <sys/systm.h>
 #include <machine/endian.h>
 #include <dev/usb/usb.h>
 #include <dev/usb/usbdi.h>
 #include <dev/usb/usbdivar.h>
 #include <dev/usb/usbhist.h>
 #include <dev/usb/usb_mem.h>
 #include <dev/usb/usb_quirks.h>
 #include <dev/usb/ehcireg.h>
 #include <dev/usb/ehcivar.h>
 #include <dev/usb/usbroothub.h>
 #ifdef USB_DEBUG
 #ifndef EHCI_DEBUG
 #define ehcidebug 0
 #else
 static int ehcidebug = 0;
 SYSCTL_SETUP(sysctl_hw_ehci_setup, "sysctl hw.ehci setup")
+{
 	int err;
 	const struct sysctlnode *rnode;
 	const struct sysctlnode *cnode;
 	err = sysctl_createv(clog, 0, NULL, &rnode,
 	    CTLFLAG_PERMANENT, CTLTYPE_NODE, "ehci",
 	    SYSCTL_DESCR("ehci global controls"),
 	    NULL, 0, NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL);
 	if (err)
 		goto fail;
 	/* control debugging printfs */
 	err = sysctl_createv(clog, 0, &rnode, &cnode,
 	    CTLFLAG_PERMANENT|CTLFLAG_READWRITE, CTLTYPE_INT,
 	    "debug", SYSCTL_DESCR("Enable debugging output"),
 	    NULL, 0, &ehcidebug, sizeof(ehcidebug), CTL_CREATE, CTL_EOL);
 	if (err)
 		goto fail;
 	return;
 fail:
 	aprint_error("%s: sysctl_createv failed (err = %d)\n", __func__, err);
+}
 #endif /* EHCI_DEBUG */
 #endif /* USB_DEBUG */
 struct ehci_pipe {
 	struct usbd_pipe pipe;
 	int nexttoggle;
 	ehci_soft_qh_t *sqh;
 	union {
 		/* Control pipe */
 		struct {
 			usb_dma_t reqdma;
 		} ctrl;
 		/* Interrupt pipe */
 		struct {
 			u_int length;
 		} intr;
 		/* Iso pipe */
 		struct {
 			u_int next_frame;
 			u_int cur_xfers;
 		} isoc;
 	};
 };
 Static usbd_status	ehci_open(struct usbd_pipe *);
 Static void		ehci_poll(struct usbd_bus *);
 Static void		ehci_softintr(void *);
 Static int		ehci_intr1(ehci_softc_t *);
 Static void		ehci_waitintr(ehci_softc_t *, struct usbd_xfer *);
 Static void		ehci_check_intr(ehci_softc_t *, struct ehci_xfer *);
 Static void		ehci_check_qh_intr(ehci_softc_t *, struct ehci_xfer *);
 Static void		ehci_check_itd_intr(ehci_softc_t *, struct ehci_xfer *);
 Static void		ehci_check_sitd_intr(ehci_softc_t *, struct ehci_xfer *);
 Static void		ehci_idone(struct ehci_xfer *);
 Static void		ehci_timeout(void *);
 Static void		ehci_timeout_task(void *);
 Static void		ehci_intrlist_timeout(void *);
 Static void		ehci_doorbell(void *);
 Static void		ehci_pcd(void *);
 Static struct usbd_xfer *
 			ehci_allocx(struct usbd_bus *, unsigned int);
 Static void		ehci_freex(struct usbd_bus *, struct usbd_xfer *);
 Static void		ehci_get_lock(struct usbd_bus *, kmutex_t **);
 Static int		ehci_roothub_ctrl(struct usbd_bus *,
-    usb_device_request_t *, void *, int);
+			    usb_device_request_t *, void *, int);
 Static usbd_status	ehci_root_intr_transfer(struct usbd_xfer *);
 Static usbd_status	ehci_root_intr_start(struct usbd_xfer *);
 Static void		ehci_root_intr_abort(struct usbd_xfer *);
 Static void		ehci_root_intr_close(struct usbd_pipe *);
 Static void		ehci_root_intr_done(struct usbd_xfer *);
 Static usbd_status	ehci_device_ctrl_transfer(struct usbd_xfer *);
 Static usbd_status	ehci_device_ctrl_start(struct usbd_xfer *);
 Static void		ehci_device_ctrl_abort(struct usbd_xfer *);
 Static void		ehci_device_ctrl_close(struct usbd_pipe *);
 Static void		ehci_device_ctrl_done(struct usbd_xfer *);
 Static usbd_status	ehci_device_bulk_transfer(struct usbd_xfer *);
 Static usbd_status	ehci_device_bulk_start(struct usbd_xfer *);
 Static void		ehci_device_bulk_abort(struct usbd_xfer *);
 Static void		ehci_device_bulk_close(struct usbd_pipe *);
 Static void		ehci_device_bulk_done(struct usbd_xfer *);
 Static usbd_status	ehci_device_intr_transfer(struct usbd_xfer *);
 Static usbd_status	ehci_device_intr_start(struct usbd_xfer *);
 Static void		ehci_device_intr_abort(struct usbd_xfer *);
 Static void		ehci_device_intr_close(struct usbd_pipe *);
 Static void		ehci_device_intr_done(struct usbd_xfer *);
 Static usbd_status	ehci_device_isoc_transfer(struct usbd_xfer *);
 Static usbd_status	ehci_device_isoc_start(struct usbd_xfer *);
 Static void		ehci_device_isoc_abort(struct usbd_xfer *);
 Static void		ehci_device_isoc_close(struct usbd_pipe *);
 Static void		ehci_device_isoc_done(struct usbd_xfer *);
 Static usbd_status	ehci_device_fs_isoc_transfer(struct usbd_xfer *);
 Static usbd_status	ehci_device_fs_isoc_start(struct usbd_xfer *);
 Static void		ehci_device_fs_isoc_abort(struct usbd_xfer *);
 Static void		ehci_device_fs_isoc_close(struct usbd_pipe *);
 Static void		ehci_device_fs_isoc_done(struct usbd_xfer *);
 Static void		ehci_device_clear_toggle(struct usbd_pipe *);
 Static void		ehci_noop(struct usbd_pipe *);
 Static void		ehci_disown(ehci_softc_t *, int, int);
-Static ehci_soft_qh_t  *ehci_alloc_sqh(ehci_softc_t *);
+Static ehci_soft_qh_t *	ehci_alloc_sqh(ehci_softc_t *);
 Static void		ehci_free_sqh(ehci_softc_t *, ehci_soft_qh_t *);
-Static ehci_soft_qtd_t  *ehci_alloc_sqtd(ehci_softc_t *);
+Static ehci_soft_qtd_t *ehci_alloc_sqtd(ehci_softc_t *);
 Static void		ehci_free_sqtd(ehci_softc_t *, ehci_soft_qtd_t *);
 Static usbd_status	ehci_alloc_sqtd_chain(struct ehci_pipe *,
 			    ehci_softc_t *, int, int, struct usbd_xfer *,
 			    ehci_soft_qtd_t **, ehci_soft_qtd_t **);
 Static void		ehci_free_sqtd_chain(ehci_softc_t *, ehci_soft_qtd_t *,
 					    ehci_soft_qtd_t *);
-Static ehci_soft_itd_t	*ehci_alloc_itd(ehci_softc_t *);
+Static ehci_soft_itd_t *ehci_alloc_itd(ehci_softc_t *);
-Static ehci_soft_sitd_t *ehci_alloc_sitd(ehci_softc_t *);
+Static ehci_soft_sitd_t *
 			ehci_alloc_sitd(ehci_softc_t *);
 Static void		ehci_free_itd(ehci_softc_t *, ehci_soft_itd_t *);
 Static void		ehci_free_sitd(ehci_softc_t *, ehci_soft_sitd_t *);
 Static void 		ehci_rem_free_itd_chain(ehci_softc_t *,
 						struct ehci_xfer *);
 Static void		ehci_rem_free_sitd_chain(ehci_softc_t *,
 						 struct ehci_xfer *);
 Static void 		ehci_abort_isoc_xfer(struct usbd_xfer *,
 						usbd_status);
 Static usbd_status	ehci_device_request(struct usbd_xfer *);
 Static usbd_status	ehci_device_setintr(ehci_softc_t *, ehci_soft_qh_t *,
 			    int);
 Static void		ehci_add_qh(ehci_softc_t *, ehci_soft_qh_t *,
 				    ehci_soft_qh_t *);
 Static void		ehci_rem_qh(ehci_softc_t *, ehci_soft_qh_t *,
 				    ehci_soft_qh_t *);
 Static void		ehci_set_qh_qtd(ehci_soft_qh_t *, ehci_soft_qtd_t *);
 Static void		ehci_sync_hc(ehci_softc_t *);
 Static void		ehci_close_pipe(struct usbd_pipe *, ehci_soft_qh_t *);
 Static void		ehci_abort_xfer(struct usbd_xfer *, usbd_status);
 #ifdef EHCI_DEBUG
 Static ehci_softc_t 	*theehci;
 void			ehci_dump(void);
 #endif
 #ifdef EHCI_DEBUG
 Static void		ehci_dump_regs(ehci_softc_t *);
 Static void		ehci_dump_sqtds(ehci_soft_qtd_t *);
 Static void		ehci_dump_sqtd(ehci_soft_qtd_t *);
 Static void		ehci_dump_qtd(ehci_qtd_t *);
 Static void		ehci_dump_sqh(ehci_soft_qh_t *);
 Static void		ehci_dump_sitd(struct ehci_soft_itd *);
 Static void		ehci_dump_itd(struct ehci_soft_itd *);
 Static void		ehci_dump_exfer(struct ehci_xfer *);
 #endif
 #define EHCI_NULL htole32(EHCI_LINK_TERMINATE)
 #define ehci_add_intr_list(sc, ex) \
 	TAILQ_INSERT_TAIL(&(sc)->sc_intrhead, (ex), ex_next);
 #define ehci_del_intr_list(sc, ex) \
 	do { \
 		TAILQ_REMOVE(&sc->sc_intrhead, (ex), ex_next); \
 		(ex)->ex_next.tqe_prev = NULL; \
 	} while (0)
 #define ehci_active_intr_list(ex) ((ex)->ex_next.tqe_prev != NULL)
 Static const struct usbd_bus_methods ehci_bus_methods = {
 	.ubm_open =	ehci_open,
 	.ubm_softint =	ehci_softintr,
 	.ubm_dopoll =	ehci_poll,
 	.ubm_allocx =	ehci_allocx,
 	.ubm_freex =	ehci_freex,
 	.ubm_getlock =	ehci_get_lock,
 	.ubm_rhctrl =	ehci_roothub_ctrl,
 };
 Static const struct usbd_pipe_methods ehci_root_intr_methods = {
 	.upm_transfer =	ehci_root_intr_transfer,
 	.upm_start =	ehci_root_intr_start,
 	.upm_abort =	ehci_root_intr_abort,
 	.upm_close =	ehci_root_intr_close,
 	.upm_cleartoggle =	ehci_noop,
 	.upm_done =	ehci_root_intr_done,
 };
 Static const struct usbd_pipe_methods ehci_device_ctrl_methods = {
 	.upm_transfer =	ehci_device_ctrl_transfer,
 	.upm_start =	ehci_device_ctrl_start,
 	.upm_abort =	ehci_device_ctrl_abort,
 	.upm_close =	ehci_device_ctrl_close,
 	.upm_cleartoggle =	ehci_noop,
 	.upm_done =	ehci_device_ctrl_done,
 };
 Static const struct usbd_pipe_methods ehci_device_intr_methods = {
 	.upm_transfer =	ehci_device_intr_transfer,
 	.upm_start =	ehci_device_intr_start,
 	.upm_abort =	ehci_device_intr_abort,
 	.upm_close =	ehci_device_intr_close,
 	.upm_cleartoggle =	ehci_device_clear_toggle,
 	.upm_done =	ehci_device_intr_done,
 };
 Static const struct usbd_pipe_methods ehci_device_bulk_methods = {
 	.upm_transfer =	ehci_device_bulk_transfer,
 	.upm_start =	ehci_device_bulk_start,
 	.upm_abort =	ehci_device_bulk_abort,
 	.upm_close =	ehci_device_bulk_close,
 	.upm_cleartoggle =	ehci_device_clear_toggle,
 	.upm_done =	ehci_device_bulk_done,
 };
 Static const struct usbd_pipe_methods ehci_device_isoc_methods = {
 	.upm_transfer =	ehci_device_isoc_transfer,
 	.upm_start =	ehci_device_isoc_start,
 	.upm_abort =	ehci_device_isoc_abort,
 	.upm_close =	ehci_device_isoc_close,
 	.upm_cleartoggle =	ehci_noop,
 	.upm_done =	ehci_device_isoc_done,
 };
 Static const struct usbd_pipe_methods ehci_device_fs_isoc_methods = {
 	.upm_transfer =	ehci_device_fs_isoc_transfer,
 	.upm_start =	ehci_device_fs_isoc_start,
 	.upm_abort =	ehci_device_fs_isoc_abort,
 	.upm_close =	ehci_device_fs_isoc_close,
 	.upm_cleartoggle = ehci_noop,
 	.upm_done =	ehci_device_fs_isoc_done,
 };
 static const uint8_t revbits[EHCI_MAX_POLLRATE] = {
 x00,0x40,0x20,0x60,0x10,0x50,0x30,0x70,0x08,0x48,0x28,0x68,0x18,0x58,0x38,0x78,
 x04,0x44,0x24,0x64,0x14,0x54,0x34,0x74,0x0c,0x4c,0x2c,0x6c,0x1c,0x5c,0x3c,0x7c,
 x02,0x42,0x22,0x62,0x12,0x52,0x32,0x72,0x0a,0x4a,0x2a,0x6a,0x1a,0x5a,0x3a,0x7a,
 x06,0x46,0x26,0x66,0x16,0x56,0x36,0x76,0x0e,0x4e,0x2e,0x6e,0x1e,0x5e,0x3e,0x7e,
 x01,0x41,0x21,0x61,0x11,0x51,0x31,0x71,0x09,0x49,0x29,0x69,0x19,0x59,0x39,0x79,
 x05,0x45,0x25,0x65,0x15,0x55,0x35,0x75,0x0d,0x4d,0x2d,0x6d,0x1d,0x5d,0x3d,0x7d,
 x03,0x43,0x23,0x63,0x13,0x53,0x33,0x73,0x0b,0x4b,0x2b,0x6b,0x1b,0x5b,0x3b,0x7b,
 x07,0x47,0x27,0x67,0x17,0x57,0x37,0x77,0x0f,0x4f,0x2f,0x6f,0x1f,0x5f,0x3f,0x7f,
 };
 int
 ehci_init(ehci_softc_t *sc)
+{
 	uint32_t vers, sparams, cparams, hcr;
 	u_int i;
 	usbd_status err;
 	ehci_soft_qh_t *sqh;
 	u_int ncomp;
 	USBHIST_FUNC(); USBHIST_CALLED(ehcidebug);
 #ifdef EHCI_DEBUG
 	theehci = sc;
 #endif
 	mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_SOFTUSB);
 	mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_USB);
 	cv_init(&sc->sc_softwake_cv, "ehciab");
 	cv_init(&sc->sc_doorbell, "ehcidi");
 	sc->sc_xferpool = pool_cache_init(sizeof(struct ehci_xfer), 0, 0, 0,
 	    "ehcixfer", NULL, IPL_USB, NULL, NULL, NULL);
 	sc->sc_doorbell_si = softint_establish(SOFTINT_NET | SOFTINT_MPSAFE,
 	    ehci_doorbell, sc);
 	KASSERT(sc->sc_doorbell_si != NULL);
 	sc->sc_pcd_si = softint_establish(SOFTINT_NET | SOFTINT_MPSAFE,
 	    ehci_pcd, sc);
 	KASSERT(sc->sc_pcd_si != NULL);
 	sc->sc_offs = EREAD1(sc, EHCI_CAPLENGTH);
 	vers = EREAD2(sc, EHCI_HCIVERSION);
 	aprint_verbose("%s: EHCI version %x.%x\n", device_xname(sc->sc_dev),
 	       vers >> 8, vers & 0xff);
 	sparams = EREAD4(sc, EHCI_HCSPARAMS);
 	USBHIST_LOG(ehcidebug, "sparams=%#x", sparams, 0, 0, 0);
 	sc->sc_npcomp = EHCI_HCS_N_PCC(sparams);
 	ncomp = EHCI_HCS_N_CC(sparams);
 	if (ncomp != sc->sc_ncomp) {
 		aprint_verbose("%s: wrong number of companions (%d != %d)\n",
 			       device_xname(sc->sc_dev), ncomp, sc->sc_ncomp);
 #if NOHCI == 0 || NUHCI == 0
 		aprint_error("%s: ohci or uhci probably not configured\n",
 			     device_xname(sc->sc_dev));
 #endif
 		if (ncomp < sc->sc_ncomp)
 			sc->sc_ncomp = ncomp;
+	}
 	if (sc->sc_ncomp > 0) {
 		KASSERT(!(sc->sc_flags & EHCIF_ETTF));
 		aprint_normal("%s: companion controller%s, %d port%s each:",
 		    device_xname(sc->sc_dev), sc->sc_ncomp!=1 ? "s" : "",
 		    EHCI_HCS_N_PCC(sparams),
 		    EHCI_HCS_N_PCC(sparams)!=1 ? "s" : "");
 		for (i = 0; i < sc->sc_ncomp; i++)
 			aprint_normal(" %s", device_xname(sc->sc_comps[i]));
 		aprint_normal("\n");
+	}
 	sc->sc_noport = EHCI_HCS_N_PORTS(sparams);
 	cparams = EREAD4(sc, EHCI_HCCPARAMS);
 	USBHIST_LOG(ehcidebug, "cparams=%#x", cparams, 0, 0, 0);
 	sc->sc_hasppc = EHCI_HCS_PPC(sparams);
 	if (EHCI_HCC_64BIT(cparams)) {
 		/* MUST clear segment register if 64 bit capable. */
 		EOWRITE4(sc, EHCI_CTRLDSSEGMENT, 0);
+	}
 	sc->sc_bus.ub_revision = USBREV_2_0;
 	sc->sc_bus.ub_usedma = true;
 	sc->sc_bus.ub_dmaflags = USBMALLOC_MULTISEG;
 	/* Reset the controller */
 	USBHIST_LOG(ehcidebug, "resetting", 0, 0, 0, 0);
 	EOWRITE4(sc, EHCI_USBCMD, 0);	/* Halt controller */
 	usb_delay_ms(&sc->sc_bus, 1);
 	EOWRITE4(sc, EHCI_USBCMD, EHCI_CMD_HCRESET);
 	for (i = 0; i < 100; i++) {
 		usb_delay_ms(&sc->sc_bus, 1);
 		hcr = EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_HCRESET;
 		if (!hcr)
 			break;
+	}
 	if (hcr) {
 		aprint_error("%s: reset timeout\n", device_xname(sc->sc_dev));
 		return EIO;
+	}
 	if (sc->sc_vendor_init)
 		sc->sc_vendor_init(sc);
 	/* XXX need proper intr scheduling */
 	sc->sc_rand = 96;
 	/* frame list size at default, read back what we got and use that */
 	switch (EHCI_CMD_FLS(EOREAD4(sc, EHCI_USBCMD))) {
 	case 0: sc->sc_flsize = 1024; break;
 	case 1: sc->sc_flsize = 512; break;
 	case 2: sc->sc_flsize = 256; break;
 	case 3: return EIO;
+	}
 	err = usb_allocmem(&sc->sc_bus, sc->sc_flsize * sizeof(ehci_link_t),
 	    EHCI_FLALIGN_ALIGN, &sc->sc_fldma);
 	if (err)
 		return err;
 	USBHIST_LOG(ehcidebug, "flsize=%d", sc->sc_flsize, 0, 0, 0);
 	sc->sc_flist = KERNADDR(&sc->sc_fldma, 0);
 	for (i = 0; i < sc->sc_flsize; i++) {
 		sc->sc_flist[i] = EHCI_NULL;
+	}
 	EOWRITE4(sc, EHCI_PERIODICLISTBASE, DMAADDR(&sc->sc_fldma, 0));
 	sc->sc_softitds = kmem_zalloc(sc->sc_flsize * sizeof(ehci_soft_itd_t *),
 				     KM_SLEEP);
 	if (sc->sc_softitds == NULL)
 		return ENOMEM;
 	LIST_INIT(&sc->sc_freeitds);
 	LIST_INIT(&sc->sc_freesitds);
 	TAILQ_INIT(&sc->sc_intrhead);
 	/* Set up the bus struct. */
 	sc->sc_bus.ub_methods = &ehci_bus_methods;
 	sc->sc_bus.ub_pipesize= sizeof(struct ehci_pipe);
 	sc->sc_eintrs = EHCI_NORMAL_INTRS;
 	/*
 	 * Allocate the interrupt dummy QHs. These are arranged to give poll
 	 * intervals that are powers of 2 times 1ms.
 	 */
 	for (i = 0; i < EHCI_INTRQHS; i++) {
 		sqh = ehci_alloc_sqh(sc);
 		if (sqh == NULL) {
 			err = ENOMEM;
 			goto bad1;
+		}
 		sc->sc_islots[i].sqh = sqh;
+	}
 	for (i = 0; i < EHCI_INTRQHS; i++) {
 		sqh = sc->sc_islots[i].sqh;
 		if (i == 0) {
 			/* The last (1ms) QH terminates. */
 			sqh->qh.qh_link = EHCI_NULL;
 			sqh->next = NULL;
 		} else {
 			/* Otherwise the next QH has half the poll interval */
 			sqh->next = sc->sc_islots[(i + 1) / 2 - 1].sqh;
 			sqh->qh.qh_link = htole32(sqh->next->physaddr |
 			    EHCI_LINK_QH);
+		}
 		sqh->qh.qh_endp = htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH));
 		sqh->qh.qh_endphub = htole32(EHCI_QH_SET_MULT(1));
 		sqh->qh.qh_curqtd = EHCI_NULL;
 		sqh->qh.qh_qtd.qtd_next = EHCI_NULL;
 		sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
 		sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED);
 		sqh->sqtd = NULL;
 		usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
+	}
 	/* Point the frame list at the last level (128ms). */
 	for (i = 0; i < sc->sc_flsize; i++) {
 		int j;
 		j = (i & ~(EHCI_MAX_POLLRATE-1)) |
 		    revbits[i & (EHCI_MAX_POLLRATE-1)];
 		sc->sc_flist[j] = htole32(EHCI_LINK_QH |
 		    sc->sc_islots[EHCI_IQHIDX(EHCI_IPOLLRATES - 1,
 		    i)].sqh->physaddr);
+	}
 	usb_syncmem(&sc->sc_fldma, 0, sc->sc_flsize * sizeof(ehci_link_t),
 	    BUS_DMASYNC_PREWRITE);
 	/* Allocate dummy QH that starts the async list. */
 	sqh = ehci_alloc_sqh(sc);
 	if (sqh == NULL) {
 		err = ENOMEM;
 		goto bad1;
+	}
 	/* Fill the QH */
 	sqh->qh.qh_endp =
 	    htole32(EHCI_QH_SET_EPS(EHCI_QH_SPEED_HIGH) | EHCI_QH_HRECL);
 	sqh->qh.qh_link =
 	    htole32(sqh->physaddr | EHCI_LINK_QH);
 	sqh->qh.qh_curqtd = EHCI_NULL;
 	sqh->next = NULL;
 	/* Fill the overlay qTD */
 	sqh->qh.qh_qtd.qtd_next = EHCI_NULL;
 	sqh->qh.qh_qtd.qtd_altnext = EHCI_NULL;
 	sqh->qh.qh_qtd.qtd_status = htole32(EHCI_QTD_HALTED);
 	sqh->sqtd = NULL;
 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
 #ifdef EHCI_DEBUG
 	USBHIST_LOGN(ehcidebug, 5, "--- dump start ---", 0, 0, 0, 0);
 	ehci_dump_sqh(sqh);
 	USBHIST_LOGN(ehcidebug, 5, "--- dump end ---", 0, 0, 0, 0);
 #endif
 	/* Point to async list */
 	sc->sc_async_head = sqh;
 	EOWRITE4(sc, EHCI_ASYNCLISTADDR, sqh->physaddr | EHCI_LINK_QH);
 	callout_init(&sc->sc_tmo_intrlist, CALLOUT_MPSAFE);
 	/* Turn on controller */
 	EOWRITE4(sc, EHCI_USBCMD,
 		 EHCI_CMD_ITC_2 | /* 2 microframes interrupt delay */
 		 (EOREAD4(sc, EHCI_USBCMD) & EHCI_CMD_FLS_M) |
 		 EHCI_CMD_ASE |
 		 EHCI_CMD_PSE |
 		 EHCI_CMD_RS);
 	/* Take over port ownership */
 	EOWRITE4(sc, EHCI_CONFIGFLAG, EHCI_CONF_CF);
 	for (i = 0; i < 100; i++) {
 		usb_delay_ms(&sc->sc_bus, 1);
 		hcr = EOREAD4(sc, EHCI_USBSTS) & EHCI_STS_HCH;
 		if (!hcr)
 			break;
+	}
 	if (hcr) {
 		aprint_error("%s: run timeout\n", device_xname(sc->sc_dev));
 		return EIO;
+	}
 	/* Enable interrupts */
 	USBHIST_LOG(ehcidebug, "enabling interupts", 0, 0, 0, 0);
 	EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
 	return 0;
 #if 0
  bad2:
 	ehci_free_sqh(sc, sc->sc_async_head);
 #endif
  bad1:
 	usb_freemem(&sc->sc_bus, &sc->sc_fldma);
 	return err;
+}
 int
 ehci_intr(void *v)
+{
 	ehci_softc_t *sc = v;
 	int ret = 0;
 	USBHIST_FUNC(); USBHIST_CALLED(ehcidebug);
 	if (sc == NULL)
 		return 0;
 	mutex_spin_enter(&sc->sc_intr_lock);
 	if (sc->sc_dying || !device_has_power(sc->sc_dev))
 		goto done;
 	/* If we get an interrupt while polling, then just ignore it. */
 	if (sc->sc_bus.ub_usepolling) {
 		uint32_t intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
 		if (intrs)
 			EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */
 		USBHIST_LOGN(ehcidebug, 16,
 		    "ignored interrupt while polling", 0, 0, 0, 0);
 		goto done;
+	}
 	ret = ehci_intr1(sc);
 done:
 	mutex_spin_exit(&sc->sc_intr_lock);
 	return ret;
+}
 Static int
 ehci_intr1(ehci_softc_t *sc)
+{
 	uint32_t intrs, eintrs;
 	USBHIST_FUNC(); USBHIST_CALLED(ehcidebug);
 	/* In case the interrupt occurs before initialization has completed. */
 	if (sc == NULL) {
 #ifdef DIAGNOSTIC
 		printf("ehci_intr1: sc == NULL\n");
 #endif
 		return 0;
+	}
 	KASSERT(mutex_owned(&sc->sc_intr_lock));
 	intrs = EHCI_STS_INTRS(EOREAD4(sc, EHCI_USBSTS));
 	if (!intrs)
 		return 0;
 	eintrs = intrs & sc->sc_eintrs;
 	USBHIST_LOG(ehcidebug, "sc=%p intrs=%#x(%#x) eintrs=%#x",
 	    sc, intrs, EOREAD4(sc, EHCI_USBSTS), eintrs);
 	if (!eintrs)
 		return 0;
 	EOWRITE4(sc, EHCI_USBSTS, intrs); /* Acknowledge */
 	if (eintrs & EHCI_STS_IAA) {
 		USBHIST_LOG(ehcidebug, "door bell", 0, 0, 0, 0);
 		kpreempt_disable();
 		KASSERT(sc->sc_doorbell_si != NULL);
 		softint_schedule(sc->sc_doorbell_si);
 		kpreempt_enable();
 		eintrs &= ~EHCI_STS_IAA;
+	}
 	if (eintrs & (EHCI_STS_INT | EHCI_STS_ERRINT)) {
 		USBHIST_LOG(ehcidebug, "INT=%d  ERRINT=%d",
 		    eintrs & EHCI_STS_INT ? 1 : 0,
 		    eintrs & EHCI_STS_ERRINT ? 1 : 0, 0, 0);
 		usb_schedsoftintr(&sc->sc_bus);
 		eintrs &= ~(EHCI_STS_INT | EHCI_STS_ERRINT);
+	}
 	if (eintrs & EHCI_STS_HSE) {
 		printf("%s: unrecoverable error, controller halted\n",
 		       device_xname(sc->sc_dev));
 		/* XXX what else */
+	}
 	if (eintrs & EHCI_STS_PCD) {
 		kpreempt_disable();
 		KASSERT(sc->sc_pcd_si != NULL);
 		softint_schedule(sc->sc_pcd_si);
 		kpreempt_enable();
 		eintrs &= ~EHCI_STS_PCD;
+	}
 	if (eintrs != 0) {
 		/* Block unprocessed interrupts. */
 		sc->sc_eintrs &= ~eintrs;
 		EOWRITE4(sc, EHCI_USBINTR, sc->sc_eintrs);
 		printf("%s: blocking intrs 0x%x\n",
 		       device_xname(sc->sc_dev), eintrs);
+	}
 	return 1;
+}
 Static void
 ehci_doorbell(void *addr)
+{
 	ehci_softc_t *sc = addr;
 	mutex_enter(&sc->sc_lock);
 	cv_broadcast(&sc->sc_doorbell);
 	mutex_exit(&sc->sc_lock);
+}
 Static void
 ehci_pcd(void *addr)
+{
 	ehci_softc_t *sc = addr;
 	struct usbd_xfer *xfer;
 	u_char *p;
 	int i, m;
 	USBHIST_FUNC(); USBHIST_CALLED(ehcidebug);
 	mutex_enter(&sc->sc_lock);
 	xfer = sc->sc_intrxfer;
 	if (xfer == NULL) {
 		/* Just ignore the change. */
 		goto done;
+	}
 	p = xfer->ux_buf;
 	m = min(sc->sc_noport, xfer->ux_length * 8 - 1);
 	memset(p, 0, xfer->ux_length);
 	for (i = 1; i <= m; i++) {
 		/* Pick out CHANGE bits from the status reg. */
 		if (EOREAD4(sc, EHCI_PORTSC(i)) & EHCI_PS_CLEAR)
 			p[i/8] |= 1 << (i%8);
 		if (i % 8 == 7)
 			USBHIST_LOG(ehcidebug, "change(%d)=0x%02x", i / 8,
 			    p[i/8], 0, 0);
+	}
 	xfer->ux_actlen = xfer->ux_length;
 	xfer->ux_status = USBD_NORMAL_COMPLETION;
 	usb_transfer_complete(xfer);
 done:
 	mutex_exit(&sc->sc_lock);
+}
 Static void
 ehci_softintr(void *v)
+{
 	struct usbd_bus *bus = v;
 	ehci_softc_t *sc = bus->ub_hcpriv;
 	struct ehci_xfer *ex, *nextex;
 	KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
 	USBHIST_FUNC(); USBHIST_CALLED(ehcidebug);
 	/*
 	 * The only explanation I can think of for why EHCI is as brain dead
 	 * as UHCI interrupt-wise is that Intel was involved in both.
 	 * An interrupt just tells us that something is done, we have no
 	 * clue what, so we need to scan through all active transfers. :-(
 	 */
 	for (ex = TAILQ_FIRST(&sc->sc_intrhead); ex; ex = nextex) {
 		nextex = TAILQ_NEXT(ex, ex_next);
 		ehci_check_intr(sc, ex);
+	}
 	/* Schedule a callout to catch any dropped transactions. */
 	if ((sc->sc_flags & EHCIF_DROPPED_INTR_WORKAROUND) &&
 	    !TAILQ_EMPTY(&sc->sc_intrhead))
 		callout_reset(&sc->sc_tmo_intrlist,
 		    hz, ehci_intrlist_timeout, sc);
 	if (sc->sc_softwake) {
 		sc->sc_softwake = 0;
 		cv_broadcast(&sc->sc_softwake_cv);
+	}
+}
 /* Check for an interrupt. */
 Static void
 ehci_check_intr(ehci_softc_t *sc, struct ehci_xfer *ex)
+{
 	struct usbd_device *dev = ex->ex_xfer.ux_pipe->up_dev;
 	int attr;
 	USBHIST_FUNC();	USBHIST_CALLED(ehcidebug);
 	USBHIST_LOG(ehcidebug, "ex = %p", ex, 0, 0, 0);
 	KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
 	attr = ex->ex_xfer.ux_pipe->up_endpoint->ue_edesc->bmAttributes;
 	if (UE_GET_XFERTYPE(attr) == UE_ISOCHRONOUS) {
 		if (dev->ud_speed == USB_SPEED_HIGH)
 			ehci_check_itd_intr(sc, ex);
 		else
 			ehci_check_sitd_intr(sc, ex);
 	} else
 		ehci_check_qh_intr(sc, ex);
 	return;
+}
 Static void
 ehci_check_qh_intr(ehci_softc_t *sc, struct ehci_xfer *ex)
+{
 	ehci_soft_qtd_t *sqtd, *lsqtd;
 	uint32_t status;
 	USBHIST_FUNC(); USBHIST_CALLED(ehcidebug);
 	KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
 	if (ex->ex_sqtdstart == NULL) {
 		printf("ehci_check_qh_intr: not valid sqtd\n");
 		return;
+	}
 	lsqtd = ex->ex_sqtdend;
 #ifdef DIAGNOSTIC
 	if (lsqtd == NULL) {
 		printf("ehci_check_qh_intr: lsqtd==0\n");
 		return;
+	}
 #endif
 	/*
 	 * If the last TD is still active we need to check whether there
 	 * is an error somewhere in the middle, or whether there was a
 	 * short packet (SPD and not ACTIVE).
 	 */
 	usb_syncmem(&lsqtd->dma,
 	    lsqtd->offs + offsetof(ehci_qtd_t, qtd_status),
 	    sizeof(lsqtd->qtd.qtd_status),
 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
 	status = le32toh(lsqtd->qtd.qtd_status);
 	usb_syncmem(&lsqtd->dma,
 	    lsqtd->offs + offsetof(ehci_qtd_t, qtd_status),
 	    sizeof(lsqtd->qtd.qtd_status), BUS_DMASYNC_PREREAD);
 	if (status & EHCI_QTD_ACTIVE) {
 		USBHIST_LOGN(ehcidebug, 10, "active ex=%p", ex, 0, 0, 0);
 		for (sqtd = ex->ex_sqtdstart; sqtd != lsqtd;
 		     sqtd = sqtd->nextqtd) {
 			usb_syncmem(&sqtd->dma,
 			    sqtd->offs + offsetof(ehci_qtd_t, qtd_status),
 			    sizeof(sqtd->qtd.qtd_status),
 			    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
 			status = le32toh(sqtd->qtd.qtd_status);
 			usb_syncmem(&sqtd->dma,
 			    sqtd->offs + offsetof(ehci_qtd_t, qtd_status),
 			    sizeof(sqtd->qtd.qtd_status), BUS_DMASYNC_PREREAD);
 			/* If there's an active QTD the xfer isn't done. */
 			if (status & EHCI_QTD_ACTIVE)
 				break;
 			/* Any kind of error makes the xfer done. */
 			if (status & EHCI_QTD_HALTED)
 				goto done;
 			/* Handle short packets */
 			if (EHCI_QTD_GET_BYTES(status) != 0) {
 				struct usbd_pipe *pipe = ex->ex_xfer.ux_pipe;
 				usb_endpoint_descriptor_t *ed =
 				    pipe->up_endpoint->ue_edesc;
 				uint8_t xt = UE_GET_XFERTYPE(ed->bmAttributes);
 				/*
 				 * If we get here for a control transfer then
 				 * we need to let the hardware complete the
 				 * status phase.  That is, we're not done
 				 * quite yet.
+				 *
 				 * Otherwise, we're done.
 				 */
 				if (xt == UE_CONTROL) {
 					break;
+				}
 				goto done;
+			}
+		}
 		USBHIST_LOGN(ehcidebug, 10, "ex=%p std=%p still active",
 		    ex, ex->ex_sqtdstart, 0, 0);
 #ifdef EHCI_DEBUG
 		USBHIST_LOGN(ehcidebug, 5, "--- still active start ---", 0, 0,
 , 0);
 		ehci_dump_sqtds(ex->ex_sqtdstart);
 		USBHIST_LOGN(ehcidebug, 5, "--- still active end ---", 0, 0, 0,
 );
 #endif
 		return;
+	}
  done:
 	USBHIST_LOGN(ehcidebug, 10, "ex=%p done", ex, 0, 0, 0);
 	callout_stop(&ex->ex_xfer.ux_callout);
 	ehci_idone(ex);
+}
 Static void
 ehci_check_itd_intr(ehci_softc_t *sc, struct ehci_xfer *ex)
+{
 	ehci_soft_itd_t *itd;
 	int i;
 	USBHIST_FUNC(); USBHIST_CALLED(ehcidebug);
 	KASSERT(mutex_owned(&sc->sc_lock));
 	if (&ex->ex_xfer != SIMPLEQ_FIRST(&ex->ex_xfer.ux_pipe->up_queue))
 		return;
 	if (ex->ex_itdstart == NULL) {
 		printf("ehci_check_itd_intr: not valid itd\n");
 		return;
+	}
 	itd = ex->ex_itdend;
 #ifdef DIAGNOSTIC
 	if (itd == NULL) {
 		printf("ehci_check_itd_intr: itdend == 0\n");
 		return;
+	}
 #endif
 	/*
 	 * check no active transfers in last itd, meaning we're finished
 	 */
 	usb_syncmem(&itd->dma, itd->offs + offsetof(ehci_itd_t, itd_ctl),
 		    sizeof(itd->itd.itd_ctl), BUS_DMASYNC_POSTWRITE |
 		    BUS_DMASYNC_POSTREAD);
 	for (i = 0; i < EHCI_ITD_NUFRAMES; i++) {
 		if (le32toh(itd->itd.itd_ctl[i]) & EHCI_ITD_ACTIVE)
 			break;
+	}
 	if (i == EHCI_ITD_NUFRAMES) {
 		goto done; /* All 8 descriptors inactive, it's done */
+	}
 	usb_syncmem(&itd->dma, itd->offs + offsetof(ehci_itd_t, itd_ctl),
 	    sizeof(itd->itd.itd_ctl), BUS_DMASYNC_PREREAD);
 	USBHIST_LOGN(ehcidebug, 10, "ex %p itd %p still active", ex,
 	    ex->ex_itdstart, 0, 0);
 	return;
 done:
 	USBHIST_LOG(ehcidebug, "ex %p done", ex, 0, 0, 0);
 	callout_stop(&ex->ex_xfer.ux_callout);
 	ehci_idone(ex);
+}
 void
 ehci_check_sitd_intr(ehci_softc_t *sc, struct ehci_xfer *ex)
+{
 	ehci_soft_sitd_t *sitd;
 	USBHIST_FUNC(); USBHIST_CALLED(ehcidebug);
 	KASSERT(mutex_owned(&sc->sc_lock));
 	if (&ex->ex_xfer != SIMPLEQ_FIRST(&ex->ex_xfer.ux_pipe->up_queue))
 		return;
 	if (ex->ex_sitdstart == NULL) {
 		printf("ehci_check_sitd_intr: not valid sitd\n");
 		return;
+	}
 	sitd = ex->ex_sitdend;
 #ifdef DIAGNOSTIC
 	if (sitd == NULL) {
 		printf("ehci_check_sitd_intr: sitdend == 0\n");
 		return;
+	}
 #endif
 	/*
 	 * check no active transfers in last sitd, meaning we're finished
 	 */
 	usb_syncmem(&sitd->dma, sitd->offs + offsetof(ehci_sitd_t, sitd_trans),
 	    sizeof(sitd->sitd.sitd_trans), BUS_DMASYNC_POSTWRITE |
 		    BUS_DMASYNC_POSTREAD);
 	if (le32toh(sitd->sitd.sitd_trans) & EHCI_SITD_ACTIVE)
 		return;
 	usb_syncmem(&sitd->dma, sitd->offs + offsetof(ehci_sitd_t, sitd_trans),
 	    sizeof(sitd->sitd.sitd_trans), BUS_DMASYNC_PREREAD);
 	USBHIST_LOGN(ehcidebug, 10, "ex=%p done", ex, 0, 0, 0);
 	callout_stop(&(ex->ex_xfer.ux_callout));
 	ehci_idone(ex);
+}
 Static void
 ehci_idone(struct ehci_xfer *ex)
+{
 	struct usbd_xfer *xfer = &ex->ex_xfer;
 	struct ehci_pipe *epipe = EHCI_XFER2EPIPE(xfer);
 	struct ehci_softc *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv;
 	ehci_soft_qtd_t *sqtd, *lsqtd;
 	uint32_t status = 0, nstatus = 0;
 	int actlen;
 	USBHIST_FUNC(); USBHIST_CALLED(ehcidebug);
 	KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
 	USBHIST_LOG(ehcidebug, "ex=%p", ex, 0, 0, 0);
 #ifdef DIAGNOSTIC
 #ifdef EHCI_DEBUG
 	if (ex->ex_isdone) {
 		USBHIST_LOGN(ehcidebug, 5, "--- dump start ---", 0, 0, 0, 0);
 		ehci_dump_exfer(ex);
 		USBHIST_LOGN(ehcidebug, 5, "--- dump end ---", 0, 0, 0, 0);
+	}
 #endif
 	KASSERT(!ex->ex_isdone);
 	ex->ex_isdone = true;
 #endif
 	if (xfer->ux_status == USBD_CANCELLED ||
 	    xfer->ux_status == USBD_TIMEOUT) {
 		USBHIST_LOG(ehcidebug, "aborted xfer=%p", xfer, 0, 0, 0);
 		return;
+	}
 	USBHIST_LOG(ehcidebug, "xfer=%p, pipe=%p ready", xfer, epipe, 0, 0);
 	/* The transfer is done, compute actual length and status. */
 	u_int xfertype, speed;
 	xfertype = UE_GET_XFERTYPE(xfer->ux_pipe->up_endpoint->ue_edesc->bmAttributes);
 	speed = xfer->ux_pipe->up_dev->ud_speed;
 	if (xfertype == UE_ISOCHRONOUS && speed == USB_SPEED_HIGH) {
 		/* HS isoc transfer */
 		struct ehci_soft_itd *itd;
 		int i, nframes, len, uframes;
 		nframes = 0;
 		actlen = 0;
 		i = xfer->ux_pipe->up_endpoint->ue_edesc->bInterval;
 		uframes = min(1 << (i - 1), USB_UFRAMES_PER_FRAME);
 		for (itd = ex->ex_itdstart; itd != NULL; itd = itd->xfer_next) {
 			usb_syncmem(&itd->dma,
 			    itd->offs + offsetof(ehci_itd_t,itd_ctl),
 			    sizeof(itd->itd.itd_ctl),
 			    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
 			for (i = 0; i < EHCI_ITD_NUFRAMES; i += uframes) {
 				/*
 				 * XXX - driver didn't fill in the frame full
 				 *   of uframes. This leads to scheduling
 				 *   inefficiencies, but working around
 				 *   this doubles complexity of tracking
 				 *   an xfer.
 				 */
 				if (nframes >= xfer->ux_nframes)
 					break;
 				status = le32toh(itd->itd.itd_ctl[i]);
 				len = EHCI_ITD_GET_LEN(status);
 				if (EHCI_ITD_GET_STATUS(status) != 0)
 					len = 0; /*No valid data on error*/
 				xfer->ux_frlengths[nframes++] = len;
 				actlen += len;
+			}
 			usb_syncmem(&itd->dma,
 			    itd->offs + offsetof(ehci_itd_t,itd_ctl),
 			    sizeof(itd->itd.itd_ctl), BUS_DMASYNC_PREREAD);
 			if (nframes >= xfer->ux_nframes)
 				break;
+	    	}
 		xfer->ux_actlen = actlen;
 		xfer->ux_status = USBD_NORMAL_COMPLETION;
 		goto end;
+	}
 	if (xfertype == UE_ISOCHRONOUS && speed == USB_SPEED_FULL) {
 		/* FS isoc transfer */
 		struct ehci_soft_sitd *sitd;
 		int nframes, len;
 		nframes = 0;
 		actlen = 0;
 		for (sitd = ex->ex_sitdstart; sitd != NULL;
 		     sitd = sitd->xfer_next) {
 			usb_syncmem(&sitd->dma,
 			    sitd->offs + offsetof(ehci_sitd_t, sitd_trans),
 			    sizeof(sitd->sitd.sitd_trans),
 			    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
 			/*
 			 * XXX - driver didn't fill in the frame full
 			 *   of uframes. This leads to scheduling
 			 *   inefficiencies, but working around
 			 *   this doubles complexity of tracking
 			 *   an xfer.
 			 */
 			if (nframes >= xfer->ux_nframes)
 				break;
 			status = le32toh(sitd->sitd.sitd_trans);
 			usb_syncmem(&sitd->dma,
 			    sitd->offs + offsetof(ehci_sitd_t, sitd_trans),
 			    sizeof(sitd->sitd.sitd_trans), BUS_DMASYNC_PREREAD);
 			len = EHCI_SITD_GET_LEN(status);
 			if (status & (EHCI_SITD_ERR|EHCI_SITD_BUFERR|
 			    EHCI_SITD_BABBLE|EHCI_SITD_XACTERR|EHCI_SITD_MISS)) {
 				/* No valid data on error */
 				len = xfer->ux_frlengths[nframes];
+			}
 			/*
 			 * frlengths[i]: # of bytes to send
 			 * len: # of bytes host didn't send
 			 */
 			xfer->ux_frlengths[nframes] -= len;
 			/* frlengths[i]: # of bytes host sent */
 			actlen += xfer->ux_frlengths[nframes++];
 			if (nframes >= xfer->ux_nframes)
 				break;
+	    	}
 		xfer->ux_actlen = actlen;
 		xfer->ux_status = USBD_NORMAL_COMPLETION;
 		goto end;
+	}
 	KASSERT(xfertype != UE_ISOCHRONOUS);
 	/* Continue processing xfers using queue heads */
 #ifdef EHCI_DEBUG
 	USBHIST_LOGN(ehcidebug, 5, "--- dump start ---", 0, 0, 0, 0);
 	ehci_dump_sqtds(ex->ex_sqtdstart);
 	USBHIST_LOGN(ehcidebug, 5, "--- dump end ---", 0, 0, 0, 0);
 #endif
 	lsqtd = ex->ex_sqtdend;
 	actlen = 0;
 	for (sqtd = ex->ex_sqtdstart; sqtd != lsqtd->nextqtd;
 	     sqtd = sqtd->nextqtd) {
 		usb_syncmem(&sqtd->dma, sqtd->offs, sizeof(sqtd->qtd),
 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
 		nstatus = le32toh(sqtd->qtd.qtd_status);
 		usb_syncmem(&sqtd->dma, sqtd->offs, sizeof(sqtd->qtd),
 		    BUS_DMASYNC_PREREAD);
 		if (nstatus & EHCI_QTD_ACTIVE)
 			break;
 		status = nstatus;
 		if (EHCI_QTD_GET_PID(status) != EHCI_QTD_PID_SETUP)
 			actlen += sqtd->len - EHCI_QTD_GET_BYTES(status);
+	}
 	/*
 	 * If there are left over TDs we need to update the toggle.
 	 * The default pipe doesn't need it since control transfers
 	 * start the toggle at 0 every time.
 	 * For a short transfer we need to update the toggle for the missing
 	 * packets within the qTD.
 	 */
 	if ((sqtd != lsqtd->nextqtd || EHCI_QTD_GET_BYTES(status)) &&
 	    xfer->ux_pipe->up_dev->ud_pipe0 != xfer->ux_pipe) {
 		USBHIST_LOG(ehcidebug,
 		    "toggle update status=0x%08x nstatus=0x%08x",
 		    status, nstatus, 0, 0);
 #if 0
 		ehci_dump_sqh(epipe->sqh);
 		ehci_dump_sqtds(ex->ex_sqtdstart);
 #endif
 		epipe->nexttoggle = EHCI_QTD_GET_TOGGLE(nstatus);
+	}
 	USBHIST_LOG(ehcidebug, "len=%d actlen=%d status=0x%08x", xfer->ux_length,
 	    actlen, status, 0);
 	xfer->ux_actlen = actlen;
 	if (status & EHCI_QTD_HALTED) {
 #ifdef EHCI_DEBUG
 		USBHIST_LOG(ehcidebug, "halted addr=%d endpt=0x%02x",
 		    xfer->ux_pipe->up_dev->ud_addr,
 		    xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress, 0, 0);
 		USBHIST_LOG(ehcidebug, "cerr=%d pid=%d",
 		    EHCI_QTD_GET_CERR(status), EHCI_QTD_GET_PID(status),
 , 0);
 		USBHIST_LOG(ehcidebug,
 		    "active =%d halted=%d buferr=%d babble=%d",
 		    status & EHCI_QTD_ACTIVE ? 1 : 0,
 		    status & EHCI_QTD_HALTED ? 1 : 0,
 		    status & EHCI_QTD_BUFERR ? 1 : 0,
 		    status & EHCI_QTD_BABBLE ? 1 : 0);
 		USBHIST_LOG(ehcidebug,
 		    "xacterr=%d missed=%d split =%d ping  =%d",
 		    status & EHCI_QTD_XACTERR ? 1 : 0,
 		    status & EHCI_QTD_MISSEDMICRO ? 1 : 0,
 		    status & EHCI_QTD_SPLITXSTATE ? 1 : 0,
 		    status & EHCI_QTD_PINGSTATE ? 1 : 0);
 		USBHIST_LOGN(ehcidebug, 5, "--- dump start ---", 0, 0, 0, 0);
 		ehci_dump_sqh(epipe->sqh);
 		ehci_dump_sqtds(ex->ex_sqtdstart);
 		USBHIST_LOGN(ehcidebug, 5, "--- dump end ---", 0, 0, 0, 0);
 #endif
 		/* low&full speed has an extra error flag */
 		if (EHCI_QH_GET_EPS(epipe->sqh->qh.qh_endp) !=
 		    EHCI_QH_SPEED_HIGH)
 			status &= EHCI_QTD_STATERRS | EHCI_QTD_PINGSTATE;
 		else
 			status &= EHCI_QTD_STATERRS;
 		if (status == 0) /* no other errors means a stall */ {
 			xfer->ux_status = USBD_STALLED;
 		} else {
 			xfer->ux_status = USBD_IOERROR; /* more info XXX */