Sun Nov 8 14:38:38 2015 UTC ()
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(skrll)
diff -r1.264.4.48 -r1.264.4.49 src/sys/dev/usb/uhci.c
cvs diff -r1.264.4.48 -r1.264.4.49 src/sys/dev/usb/uhci.c (expand / switch to unified diff)

--- src/sys/dev/usb/uhci.c 2015/11/08 13:33:49 1.264.4.48
+++ src/sys/dev/usb/uhci.c 2015/11/08 14:38:38 1.264.4.49
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: uhci.c,v 1.264.4.48 2015/11/08 13:33:49 skrll Exp $ */ 1/* $NetBSD: uhci.c,v 1.264.4.49 2015/11/08 14:38:38 skrll Exp $ */
2 2
3/* 3/*
4 * Copyright (c) 1998, 2004, 2011, 2012 The NetBSD Foundation, Inc. 4 * Copyright (c) 1998, 2004, 2011, 2012 The NetBSD Foundation, Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * This code is derived from software contributed to The NetBSD Foundation 7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Lennart Augustsson (lennart@augustsson.net) at 8 * by Lennart Augustsson (lennart@augustsson.net) at
9 * Carlstedt Research & Technology, Jared D. McNeill (jmcneill@invisible.ca) 9 * Carlstedt Research & Technology, Jared D. McNeill (jmcneill@invisible.ca)
10 * and Matthew R. Green (mrg@eterna.com.au). 10 * and Matthew R. Green (mrg@eterna.com.au).
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions 13 * modification, are permitted provided that the following conditions
14 * are met: 14 * are met:
@@ -32,27 +32,27 @@ @@ -32,27 +32,27 @@
32 */ 32 */
33 33
34/* 34/*
35 * USB Universal Host Controller driver. 35 * USB Universal Host Controller driver.
36 * Handles e.g. PIIX3 and PIIX4. 36 * Handles e.g. PIIX3 and PIIX4.
37 * 37 *
38 * UHCI spec: http://www.intel.com/technology/usb/spec.htm 38 * UHCI spec: http://www.intel.com/technology/usb/spec.htm
39 * USB spec: http://www.usb.org/developers/docs/ 39 * USB spec: http://www.usb.org/developers/docs/
40 * PIIXn spec: ftp://download.intel.com/design/intarch/datashts/29055002.pdf 40 * PIIXn spec: ftp://download.intel.com/design/intarch/datashts/29055002.pdf
41 * ftp://download.intel.com/design/intarch/datashts/29056201.pdf 41 * ftp://download.intel.com/design/intarch/datashts/29056201.pdf
42 */ 42 */
43 43
44#include <sys/cdefs.h> 44#include <sys/cdefs.h>
45__KERNEL_RCSID(0, "$NetBSD: uhci.c,v 1.264.4.48 2015/11/08 13:33:49 skrll Exp $"); 45__KERNEL_RCSID(0, "$NetBSD: uhci.c,v 1.264.4.49 2015/11/08 14:38:38 skrll Exp $");
46 46
47#include "opt_usb.h" 47#include "opt_usb.h"
48 48
49#include <sys/param.h> 49#include <sys/param.h>
50 50
51#include <sys/bus.h> 51#include <sys/bus.h>
52#include <sys/cpu.h> 52#include <sys/cpu.h>
53#include <sys/device.h> 53#include <sys/device.h>
54#include <sys/kernel.h> 54#include <sys/kernel.h>
55#include <sys/kmem.h> 55#include <sys/kmem.h>
56#include <sys/mutex.h> 56#include <sys/mutex.h>
57#include <sys/proc.h> 57#include <sys/proc.h>
58#include <sys/queue.h> 58#include <sys/queue.h>
@@ -420,28 +420,28 @@ uhci_init(uhci_softc_t *sc) @@ -420,28 +420,28 @@ uhci_init(uhci_softc_t *sc)
420 420
421 if (uhcidebug >= 2) 421 if (uhcidebug >= 2)
422 uhci_dumpregs(sc); 422 uhci_dumpregs(sc);
423#endif 423#endif
424 424
425 sc->sc_suspend = PWR_RESUME; 425 sc->sc_suspend = PWR_RESUME;
426 426
427 UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */ 427 UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */
428 uhci_globalreset(sc); /* reset the controller */ 428 uhci_globalreset(sc); /* reset the controller */
429 uhci_reset(sc); 429 uhci_reset(sc);
430 430
431 /* Allocate and initialize real frame array. */ 431 /* Allocate and initialize real frame array. */
432 err = usb_allocmem(&sc->sc_bus, 432 err = usb_allocmem(&sc->sc_bus,
433 UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t), 433 UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t),
434 UHCI_FRAMELIST_ALIGN, &sc->sc_dma); 434 UHCI_FRAMELIST_ALIGN, &sc->sc_dma);
435 if (err) 435 if (err)
436 return err; 436 return err;
437 sc->sc_pframes = KERNADDR(&sc->sc_dma, 0); 437 sc->sc_pframes = KERNADDR(&sc->sc_dma, 0);
438 UWRITE2(sc, UHCI_FRNUM, 0); /* set frame number to 0 */ 438 UWRITE2(sc, UHCI_FRNUM, 0); /* set frame number to 0 */
439 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); /* set frame list*/ 439 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); /* set frame list*/
440 440
441 /* 441 /*
442 * Allocate a TD, inactive, that hangs from the last QH. 442 * Allocate a TD, inactive, that hangs from the last QH.
443 * This is to avoid a bug in the PIIX that makes it run berserk 443 * This is to avoid a bug in the PIIX that makes it run berserk
444 * otherwise. 444 * otherwise.
445 */ 445 */
446 std = uhci_alloc_std(sc); 446 std = uhci_alloc_std(sc);
447 if (std == NULL) 447 if (std == NULL)